Commit 2d4c8495 authored by Sudarsana Reddy Kalluru's avatar Sudarsana Reddy Kalluru Committed by David S. Miller

qed: Add APIs for reading config id attributes.

The patch adds driver support for reading the config id attributes from NVM
flash partition.
Signed-off-by: default avatarSudarsana Reddy Kalluru <skalluru@marvell.com>
Signed-off-by: default avatarAriel Elior <aelior@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b0274eb0
...@@ -69,6 +69,8 @@ ...@@ -69,6 +69,8 @@
#define QED_RDMA_SRQS QED_ROCE_QPS #define QED_RDMA_SRQS QED_ROCE_QPS
#define QED_NVM_CFG_SET_FLAGS 0xE #define QED_NVM_CFG_SET_FLAGS 0xE
#define QED_NVM_CFG_SET_PF_FLAGS 0x1E #define QED_NVM_CFG_SET_PF_FLAGS 0x1E
#define QED_NVM_CFG_GET_FLAGS 0xA
#define QED_NVM_CFG_GET_PF_FLAGS 0x1A
static char version[] = static char version[] =
"QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n"; "QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
...@@ -2298,6 +2300,30 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data) ...@@ -2298,6 +2300,30 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data)
return rc; return rc;
} }
static int qed_nvm_flash_cfg_read(struct qed_dev *cdev, u8 **data,
u32 cmd, u32 entity_id)
{
struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
struct qed_ptt *ptt;
u32 flags, len;
int rc = 0;
ptt = qed_ptt_acquire(hwfn);
if (!ptt)
return -EAGAIN;
DP_VERBOSE(cdev, NETIF_MSG_DRV,
"Read config cmd = %d entity id %d\n", cmd, entity_id);
flags = entity_id ? QED_NVM_CFG_GET_PF_FLAGS : QED_NVM_CFG_GET_FLAGS;
rc = qed_mcp_nvm_get_cfg(hwfn, ptt, cmd, entity_id, flags, *data, &len);
if (rc)
DP_ERR(cdev, "Error %d reading %d\n", rc, cmd);
qed_ptt_release(hwfn, ptt);
return rc;
}
static int qed_nvm_flash(struct qed_dev *cdev, const char *name) static int qed_nvm_flash(struct qed_dev *cdev, const char *name)
{ {
const struct firmware *image; const struct firmware *image;
...@@ -2610,6 +2636,7 @@ const struct qed_common_ops qed_common_ops_pass = { ...@@ -2610,6 +2636,7 @@ const struct qed_common_ops qed_common_ops_pass = {
.db_recovery_del = &qed_db_recovery_del, .db_recovery_del = &qed_db_recovery_del,
.read_module_eeprom = &qed_read_module_eeprom, .read_module_eeprom = &qed_read_module_eeprom,
.get_affin_hwfn_idx = &qed_get_affin_hwfn_idx, .get_affin_hwfn_idx = &qed_get_affin_hwfn_idx,
.read_nvm_cfg = &qed_nvm_flash_cfg_read,
}; };
void qed_get_protocol_stats(struct qed_dev *cdev, void qed_get_protocol_stats(struct qed_dev *cdev,
......
...@@ -3751,6 +3751,35 @@ int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) ...@@ -3751,6 +3751,35 @@ int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
return 0; return 0;
} }
int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
u32 *p_len)
{
u32 mb_param = 0, resp, param;
int rc;
QED_MFW_SET_FIELD(mb_param, DRV_MB_PARAM_NVM_CFG_OPTION_ID, option_id);
if (flags & QED_NVM_CFG_OPTION_INIT)
QED_MFW_SET_FIELD(mb_param,
DRV_MB_PARAM_NVM_CFG_OPTION_INIT, 1);
if (flags & QED_NVM_CFG_OPTION_FREE)
QED_MFW_SET_FIELD(mb_param,
DRV_MB_PARAM_NVM_CFG_OPTION_FREE, 1);
if (flags & QED_NVM_CFG_OPTION_ENTITY_SEL) {
QED_MFW_SET_FIELD(mb_param,
DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_SEL, 1);
QED_MFW_SET_FIELD(mb_param,
DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_ID,
entity_id);
}
rc = qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt,
DRV_MSG_CODE_GET_NVM_CFG_OPTION,
mb_param, &resp, &param, p_len, (u32 *)p_buf);
return rc;
}
int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
u32 len) u32 len)
......
...@@ -1208,6 +1208,21 @@ int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); ...@@ -1208,6 +1208,21 @@ int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
*/ */
int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
/**
* @brief Get NVM config attribute value.
*
* @param p_hwfn
* @param p_ptt
* @param option_id
* @param entity_id
* @param flags
* @param p_buf
* @param p_len
*/
int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
u32 *p_len);
/** /**
* @brief Set NVM config attribute value. * @brief Set NVM config attribute value.
* *
......
...@@ -1132,6 +1132,17 @@ struct qed_common_ops { ...@@ -1132,6 +1132,17 @@ struct qed_common_ops {
* @param cdev * @param cdev
*/ */
u8 (*get_affin_hwfn_idx)(struct qed_dev *cdev); u8 (*get_affin_hwfn_idx)(struct qed_dev *cdev);
/**
* @brief read_nvm_cfg - Read NVM config attribute value.
* @param cdev
* @param buf - buffer
* @param cmd - NVM CFG command id
* @param entity_id - Entity id
*
*/
int (*read_nvm_cfg)(struct qed_dev *cdev, u8 **buf, u32 cmd,
u32 entity_id);
}; };
#define MASK_FIELD(_name, _value) \ #define MASK_FIELD(_name, _value) \
......
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