Commit 2d6a7b75 authored by Yevgeny Petrilin's avatar Yevgeny Petrilin Committed by David S. Miller

mlx4_en: Always allocate RX ring for each interrupt vector

Removed module parameter specifying number of RX rings
Signed-off-by: default avatarYevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c2b559ed
...@@ -169,14 +169,10 @@ static void *mlx4_en_add(struct mlx4_dev *dev) ...@@ -169,14 +169,10 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
mlx4_info(mdev, "Using %d tx rings for port:%d\n", mlx4_info(mdev, "Using %d tx rings for port:%d\n",
mdev->profile.prof[i].tx_ring_num, i); mdev->profile.prof[i].tx_ring_num, i);
if (!mdev->profile.prof[i].rx_ring_num) {
mdev->profile.prof[i].rx_ring_num = mdev->profile.prof[i].rx_ring_num =
min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS); min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS);
mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n", mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n",
mdev->profile.prof[i].rx_ring_num, i); mdev->profile.prof[i].rx_ring_num, i);
} else
mlx4_info(mdev, "Using %d rx rings for port:%d\n",
mdev->profile.prof[i].rx_ring_num, i);
} }
/* Create our own workqueue for reset/multicast tasks /* Create our own workqueue for reset/multicast tasks
......
...@@ -65,9 +65,6 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." ...@@ -65,9 +65,6 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
" Per priority bit mask"); " Per priority bit mask");
MLX4_EN_PARM_INT(rx_ring_num1, 0, "Number or Rx rings for port 1 (0 = #cores)");
MLX4_EN_PARM_INT(rx_ring_num2, 0, "Number or Rx rings for port 2 (0 = #cores)");
MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1"); MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1");
MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2"); MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2");
MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1"); MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1");
...@@ -95,8 +92,6 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev) ...@@ -95,8 +92,6 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
params->prof[1].tx_ring_num = 1; params->prof[1].tx_ring_num = 1;
params->prof[2].tx_ring_num = 1; params->prof[2].tx_ring_num = 1;
} }
params->prof[1].rx_ring_num = min_t(int, rx_ring_num1, MAX_RX_RINGS);
params->prof[2].rx_ring_num = min_t(int, rx_ring_num2, MAX_RX_RINGS);
if (tx_ring_size1 == MLX4_EN_AUTO_CONF) if (tx_ring_size1 == MLX4_EN_AUTO_CONF)
tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE; tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE;
......
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