Commit 303a1e5c authored by Arend van Spriel's avatar Arend van Spriel Committed by Greg Kroah-Hartman

staging: brcm80211: remove PHYSADDR macro from dma.c

Four macros with PHYSADDR name prefix are not doing a lot and
complicate code readability. These have been expanded in the source
code and consequently removed the definitions.
Reviewed-by: default avatarPieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: default avatarHenry Ptasinski <henryp@broadcom.com>
Reviewed-by: default avatarRoland Vossen <rvossen@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 61aee4c1
...@@ -196,14 +196,6 @@ ...@@ -196,14 +196,6 @@
#define DMA_NONE(args) #define DMA_NONE(args)
#define PHYSADDRHI(_pa) (0)
#define PHYSADDRHISET(_pa, _val)
#define PHYSADDRLO(_pa) ((_pa))
#define PHYSADDRLOSET(_pa, _val) \
do { \
(_pa) = (_val); \
} while (0)
#define d64txregs dregs.d64_u.txregs_64 #define d64txregs dregs.d64_u.txregs_64
#define d64rxregs dregs.d64_u.rxregs_64 #define d64rxregs dregs.d64_u.rxregs_64
#define txd64 dregs.d64_u.txd_64 #define txd64 dregs.d64_u.txd_64
...@@ -522,16 +514,14 @@ struct dma_pub *dma_attach(char *name, struct si_pub *sih, ...@@ -522,16 +514,14 @@ struct dma_pub *dma_attach(char *name, struct si_pub *sih,
} }
if ((di->ddoffsetlow != 0) && !di->addrext) { if ((di->ddoffsetlow != 0) && !di->addrext) {
if (PHYSADDRLO(di->txdpa) > SI_PCI_DMA_SZ) { if (di->txdpa > SI_PCI_DMA_SZ) {
DMA_ERROR(("%s: dma_attach: txdpa 0x%x: addrext not " DMA_ERROR(("%s: dma_attach: txdpa 0x%x: addrext not "
"supported\n", di->name, "supported\n", di->name, (u32)di->txdpa));
(u32)PHYSADDRLO(di->txdpa)));
goto fail; goto fail;
} }
if (PHYSADDRLO(di->rxdpa) > SI_PCI_DMA_SZ) { if (di->rxdpa > SI_PCI_DMA_SZ) {
DMA_ERROR(("%s: dma_attach: rxdpa 0x%x: addrext not " DMA_ERROR(("%s: dma_attach: rxdpa 0x%x: addrext not "
"supported\n", di->name, "supported\n", di->name, (u32)di->rxdpa));
(u32)PHYSADDRLO(di->rxdpa)));
goto fail; goto fail;
} }
} }
...@@ -586,28 +576,24 @@ dma64_dd_upd(struct dma_info *di, struct dma64desc *ddring, ...@@ -586,28 +576,24 @@ dma64_dd_upd(struct dma_info *di, struct dma64desc *ddring,
/* PCI bus with big(>1G) physical address, use address extension */ /* PCI bus with big(>1G) physical address, use address extension */
#if defined(__mips__) && defined(IL_BIGENDIAN) #if defined(__mips__) && defined(IL_BIGENDIAN)
if ((di->dataoffsetlow == SI_SDRAM_SWAPPED) if ((di->dataoffsetlow == SI_SDRAM_SWAPPED)
|| !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { || !(pa & PCI32ADDR_HIGH)) {
#else #else
if ((di->dataoffsetlow == 0) || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { if ((di->dataoffsetlow == 0) || !(pa & PCI32ADDR_HIGH)) {
#endif /* defined(__mips__) && defined(IL_BIGENDIAN) */ #endif /* defined(__mips__) && defined(IL_BIGENDIAN) */
ddring[outidx].addrlow = ddring[outidx].addrlow = BUS_SWAP32(pa + di->dataoffsetlow);
BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow); ddring[outidx].addrhigh = BUS_SWAP32(di->dataoffsethigh);
ddring[outidx].addrhigh =
BUS_SWAP32(PHYSADDRHI(pa) + di->dataoffsethigh);
ddring[outidx].ctrl1 = BUS_SWAP32(*flags); ddring[outidx].ctrl1 = BUS_SWAP32(*flags);
ddring[outidx].ctrl2 = BUS_SWAP32(ctrl2); ddring[outidx].ctrl2 = BUS_SWAP32(ctrl2);
} else { } else {
/* address extension for 32-bit PCI */ /* address extension for 32-bit PCI */
u32 ae; u32 ae;
ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT;
PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH; pa &= ~PCI32ADDR_HIGH;
ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE;
ddring[outidx].addrlow = ddring[outidx].addrlow = BUS_SWAP32(pa + di->dataoffsetlow);
BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow); ddring[outidx].addrhigh = BUS_SWAP32(di->dataoffsethigh);
ddring[outidx].addrhigh =
BUS_SWAP32(0 + di->dataoffsethigh);
ddring[outidx].ctrl1 = BUS_SWAP32(*flags); ddring[outidx].ctrl1 = BUS_SWAP32(*flags);
ddring[outidx].ctrl2 = BUS_SWAP32(ctrl2); ddring[outidx].ctrl2 = BUS_SWAP32(ctrl2);
} }
...@@ -716,45 +702,36 @@ _dma_ddtable_init(struct dma_info *di, uint direction, unsigned long pa) ...@@ -716,45 +702,36 @@ _dma_ddtable_init(struct dma_info *di, uint direction, unsigned long pa)
{ {
if (!di->aligndesc_4k) { if (!di->aligndesc_4k) {
if (direction == DMA_TX) if (direction == DMA_TX)
di->xmtptrbase = PHYSADDRLO(pa); di->xmtptrbase = pa;
else else
di->rcvptrbase = PHYSADDRLO(pa); di->rcvptrbase = pa;
} }
if ((di->ddoffsetlow == 0) if ((di->ddoffsetlow == 0)
|| !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { || !(pa & PCI32ADDR_HIGH)) {
if (direction == DMA_TX) { if (direction == DMA_TX) {
W_REG(&di->d64txregs->addrlow, W_REG(&di->d64txregs->addrlow, pa + di->ddoffsetlow);
(PHYSADDRLO(pa) + di->ddoffsetlow)); W_REG(&di->d64txregs->addrhigh, di->ddoffsethigh);
W_REG(&di->d64txregs->addrhigh,
(PHYSADDRHI(pa) + di->ddoffsethigh));
} else { } else {
W_REG(&di->d64rxregs->addrlow, W_REG(&di->d64rxregs->addrlow, pa + di->ddoffsetlow);
(PHYSADDRLO(pa) + di->ddoffsetlow)); W_REG(&di->d64rxregs->addrhigh, di->ddoffsethigh);
W_REG(&di->d64rxregs->addrhigh,
(PHYSADDRHI(pa) + di->ddoffsethigh));
} }
} else { } else {
/* DMA64 32bits address extension */ /* DMA64 32bits address extension */
u32 ae; u32 ae;
/* shift the high bit(s) from pa to ae */ /* shift the high bit(s) from pa to ae */
ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT;
PCI32ADDR_HIGH_SHIFT; pa &= ~PCI32ADDR_HIGH;
PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH;
if (direction == DMA_TX) { if (direction == DMA_TX) {
W_REG(&di->d64txregs->addrlow, W_REG(&di->d64txregs->addrlow, pa + di->ddoffsetlow);
(PHYSADDRLO(pa) + di->ddoffsetlow)); W_REG(&di->d64txregs->addrhigh, di->ddoffsethigh);
W_REG(&di->d64txregs->addrhigh,
di->ddoffsethigh);
SET_REG(&di->d64txregs->control, SET_REG(&di->d64txregs->control,
D64_XC_AE, (ae << D64_XC_AE_SHIFT)); D64_XC_AE, (ae << D64_XC_AE_SHIFT));
} else { } else {
W_REG(&di->d64rxregs->addrlow, W_REG(&di->d64rxregs->addrlow, pa + di->ddoffsetlow);
(PHYSADDRLO(pa) + di->ddoffsetlow)); W_REG(&di->d64rxregs->addrhigh, di->ddoffsethigh);
W_REG(&di->d64rxregs->addrhigh,
di->ddoffsethigh);
SET_REG(&di->d64rxregs->control, SET_REG(&di->d64rxregs->control,
D64_RC_AE, (ae << D64_RC_AE_SHIFT)); D64_RC_AE, (ae << D64_RC_AE_SHIFT));
} }
...@@ -1196,9 +1173,7 @@ static bool dma64_alloc(struct dma_info *di, uint direction) ...@@ -1196,9 +1173,7 @@ static bool dma64_alloc(struct dma_info *di, uint direction)
di->txd64 = (struct dma64desc *) di->txd64 = (struct dma64desc *)
roundup((unsigned long)va, align); roundup((unsigned long)va, align);
di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va); di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va);
PHYSADDRLOSET(di->txdpa, di->txdpa = di->txdpaorig + di->txdalign;
PHYSADDRLO(di->txdpaorig) + di->txdalign);
PHYSADDRHISET(di->txdpa, PHYSADDRHI(di->txdpaorig));
di->txdalloc = alloced; di->txdalloc = alloced;
} else { } else {
va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits, va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits,
...@@ -1212,9 +1187,7 @@ static bool dma64_alloc(struct dma_info *di, uint direction) ...@@ -1212,9 +1187,7 @@ static bool dma64_alloc(struct dma_info *di, uint direction)
di->rxd64 = (struct dma64desc *) di->rxd64 = (struct dma64desc *)
roundup((unsigned long)va, align); roundup((unsigned long)va, align);
di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va); di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va);
PHYSADDRLOSET(di->rxdpa, di->rxdpa = di->rxdpaorig + di->rxdalign;
PHYSADDRLO(di->rxdpaorig) + di->rxdalign);
PHYSADDRHISET(di->rxdpa, PHYSADDRHI(di->rxdpaorig));
di->rxdalloc = alloced; di->rxdalloc = alloced;
} }
...@@ -1451,12 +1424,7 @@ struct sk_buff *dma_getnexttxp(struct dma_pub *pub, enum txd_range range) ...@@ -1451,12 +1424,7 @@ struct sk_buff *dma_getnexttxp(struct dma_pub *pub, enum txd_range range)
struct dma_seg_map *map = NULL; struct dma_seg_map *map = NULL;
uint size, j, nsegs; uint size, j, nsegs;
PHYSADDRLOSET(pa, pa = BUS_SWAP32(di->txd64[i].addrlow) - di->dataoffsetlow;
(BUS_SWAP32(di->txd64[i].addrlow) -
di->dataoffsetlow));
PHYSADDRHISET(pa,
(BUS_SWAP32(di->txd64[i].addrhigh) -
di->dataoffsethigh));
if (DMASGLIST_ENAB) { if (DMASGLIST_ENAB) {
map = &di->txp_dmah[i]; map = &di->txp_dmah[i];
...@@ -1519,12 +1487,7 @@ static struct sk_buff *dma64_getnextrxp(struct dma_info *di, bool forceall) ...@@ -1519,12 +1487,7 @@ static struct sk_buff *dma64_getnextrxp(struct dma_info *di, bool forceall)
rxp = di->rxp[i]; rxp = di->rxp[i];
di->rxp[i] = NULL; di->rxp[i] = NULL;
PHYSADDRLOSET(pa, pa = BUS_SWAP32(di->rxd64[i].addrlow) - di->dataoffsetlow;
(BUS_SWAP32(di->rxd64[i].addrlow) -
di->dataoffsetlow));
PHYSADDRHISET(pa,
(BUS_SWAP32(di->rxd64[i].addrhigh) -
di->dataoffsethigh));
/* clear this packet from the descriptor ring */ /* clear this packet from the descriptor ring */
pci_unmap_single(di->pbus, pa, di->rxbufsize, PCI_DMA_FROMDEVICE); pci_unmap_single(di->pbus, pa, di->rxbufsize, PCI_DMA_FROMDEVICE);
......
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