Commit 31604cf0 authored by Sujith Manoharan's avatar Sujith Manoharan Committed by John W. Linville

ath9k_hw: Cleanup power mode API

The 'setChip' variable is unused, remove it and
simplify the functions.
Signed-off-by: default avatarSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 5955b2b0
...@@ -2004,15 +2004,15 @@ EXPORT_SYMBOL(ath9k_hw_reset); ...@@ -2004,15 +2004,15 @@ EXPORT_SYMBOL(ath9k_hw_reset);
* Notify Power Mgt is disabled in self-generated frames. * Notify Power Mgt is disabled in self-generated frames.
* If requested, force chip to sleep. * If requested, force chip to sleep.
*/ */
static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip) static void ath9k_set_power_sleep(struct ath_hw *ah)
{ {
REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
if (setChip) {
if (AR_SREV_9462(ah)) { if (AR_SREV_9462(ah)) {
REG_WRITE(ah, AR_TIMER_MODE, REG_WRITE(ah, AR_TIMER_MODE,
REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00); REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_READ(ah, REG_WRITE(ah, AR_NDP2_TIMER_MODE,
AR_NDP2_TIMER_MODE) & 0xFFFFFF00); REG_READ(ah, AR_NDP2_TIMER_MODE) & 0xFFFFFF00);
REG_WRITE(ah, AR_SLP32_INC, REG_WRITE(ah, AR_SLP32_INC,
REG_READ(ah, AR_SLP32_INC) & 0xFFF00000); REG_READ(ah, AR_SLP32_INC) & 0xFFF00000);
/* xxx Required for WLAN only case ? */ /* xxx Required for WLAN only case ? */
...@@ -2037,7 +2037,6 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip) ...@@ -2037,7 +2037,6 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN); REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
udelay(2); udelay(2);
} }
}
/* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */ /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
if (AR_SREV_9300_20_OR_LATER(ah)) if (AR_SREV_9300_20_OR_LATER(ah))
...@@ -2049,13 +2048,12 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip) ...@@ -2049,13 +2048,12 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
* frames. If request, set power mode of chip to * frames. If request, set power mode of chip to
* auto/normal. Duration in units of 128us (1/8 TU). * auto/normal. Duration in units of 128us (1/8 TU).
*/ */
static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip) static void ath9k_set_power_network_sleep(struct ath_hw *ah)
{ {
struct ath9k_hw_capabilities *pCap = &ah->caps;
u32 val; u32 val;
REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
if (setChip) {
struct ath9k_hw_capabilities *pCap = &ah->caps;
if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
/* Set WakeOnInterrupt bit; clear ForceWake bit */ /* Set WakeOnInterrupt bit; clear ForceWake bit */
...@@ -2087,14 +2085,13 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip) ...@@ -2087,14 +2085,13 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip)
if (AR_SREV_9462(ah)) if (AR_SREV_9462(ah))
udelay(30); udelay(30);
} }
}
/* Clear Bit 14 of AR_WA after putting chip into Net Sleep mode. */ /* Clear Bit 14 of AR_WA after putting chip into Net Sleep mode. */
if (AR_SREV_9300_20_OR_LATER(ah)) if (AR_SREV_9300_20_OR_LATER(ah))
REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
} }
static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) static bool ath9k_hw_set_power_awake(struct ath_hw *ah)
{ {
u32 val; u32 val;
int i; int i;
...@@ -2105,7 +2102,6 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) ...@@ -2105,7 +2102,6 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
udelay(10); udelay(10);
} }
if (setChip) {
if ((REG_READ(ah, AR_RTC_STATUS) & if ((REG_READ(ah, AR_RTC_STATUS) &
AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) { AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) { if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
...@@ -2136,7 +2132,6 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) ...@@ -2136,7 +2132,6 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
POWER_UP_TIME / 20); POWER_UP_TIME / 20);
return false; return false;
} }
}
REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
...@@ -2146,7 +2141,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) ...@@ -2146,7 +2141,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
int status = true, setChip = true; int status = true;
static const char *modes[] = { static const char *modes[] = {
"AWAKE", "AWAKE",
"FULL-SLEEP", "FULL-SLEEP",
...@@ -2162,17 +2157,17 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) ...@@ -2162,17 +2157,17 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
switch (mode) { switch (mode) {
case ATH9K_PM_AWAKE: case ATH9K_PM_AWAKE:
status = ath9k_hw_set_power_awake(ah, setChip); status = ath9k_hw_set_power_awake(ah);
break; break;
case ATH9K_PM_FULL_SLEEP: case ATH9K_PM_FULL_SLEEP:
if (ath9k_hw_mci_is_enabled(ah)) if (ath9k_hw_mci_is_enabled(ah))
ar9003_mci_set_full_sleep(ah); ar9003_mci_set_full_sleep(ah);
ath9k_set_power_sleep(ah, setChip); ath9k_set_power_sleep(ah);
ah->chip_fullsleep = true; ah->chip_fullsleep = true;
break; break;
case ATH9K_PM_NETWORK_SLEEP: case ATH9K_PM_NETWORK_SLEEP:
ath9k_set_power_network_sleep(ah, setChip); ath9k_set_power_network_sleep(ah);
break; break;
default: default:
ath_err(common, "Unknown power mode %u\n", mode); ath_err(common, "Unknown power mode %u\n", mode);
......
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