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Commit 336a8b22 authored by Linus Torvalds's avatar Linus Torvalds
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Merge http://lia64.bkbits.net/to-linus-2.5 

into laptop.osdl.org:/home/torvalds/v2.5/linux
parents 09095b63 9a9bfbcf
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Showing with 373 additions and 12950 deletions
arch/ia64/Kconfig
View file @ 336a8b22
......@@ -413,6 +413,16 @@ config IA64_PALINFO
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config IA64_SALINFO
tristate "/proc/sal support"
help
The /proc/sal directory exports the SAL (system abstraction layer)
feature bits, like whether the platform is subject to ITC drift. It
is intended to be used by user programs that care about such things.
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config EFI_VARS
tristate "/proc/efi/vars support"
help
......@@ -424,9 +434,15 @@ config EFI_VARS
support" (CONFIG_PROC_FS) is enabled, too.
config NR_CPUS
int "Maximum number of CPUs (2-64)"
int "Maximum number of CPUs"
depends on SMP
default "64"
help
You should set this to the number of CPUs in your system, but
keep in mind that a kernel compiled for, e.g., 2 CPUs will boot but
only use 2 CPUs on a >2 CPU system. Setting this to a value larger
than 64 will cause the use of a CPU mask array, causing a small
performance hit.
source "fs/Kconfig.binfmt"
......
arch/ia64/hp/common/sba_iommu.c
View file @ 336a8b22
......@@ -54,6 +54,11 @@
*/
#define ALLOW_IOV_BYPASS
#ifdef CONFIG_PROC_FS
/* turn it off for now; without per-CPU counters, it's too much of a scalability bottleneck: */
# define SBA_PROC_FS 0
#endif
/*
** If a device prefetches beyond the end of a valid pdir entry, it will cause
** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should
......@@ -193,7 +198,7 @@ struct ioc {
} saved[DELAYED_RESOURCE_CNT];
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
#define SBA_SEARCH_SAMPLE 0x100
unsigned long avg_search[SBA_SEARCH_SAMPLE];
unsigned long avg_idx; /* current index into avg_search */
......@@ -517,7 +522,7 @@ static int
sba_alloc_range(struct ioc *ioc, size_t size)
{
unsigned int pages_needed = size >> IOVP_SHIFT;
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
unsigned long itc_start = ia64_get_itc();
#endif
unsigned long pide;
......@@ -551,7 +556,7 @@ sba_alloc_range(struct ioc *ioc, size_t size)
(uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map),
ioc->res_bitshift );
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
{
unsigned long itc_end = ia64_get_itc();
unsigned long tmp = itc_end - itc_start;
......@@ -593,7 +598,7 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
__FUNCTION__, (uint) iova, size,
bits_not_wanted, m, pide, res_ptr, *res_ptr);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->used_pages -= bits_not_wanted;
#endif
......@@ -785,7 +790,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, int dir)
** Device is bit capable of DMA'ing to the buffer...
** just return the PCI address of ptr
*/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->msingle_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -811,7 +816,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, int dir)
panic("Sanity check failed");
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msingle_calls++;
ioc->msingle_pages += size >> IOVP_SHIFT;
#endif
......@@ -870,7 +875,7 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
/*
** Address does not fall w/in IOVA, must be bypassing
*/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->usingle_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -895,7 +900,7 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
size = ROUNDUP(size, IOVP_SIZE);
spin_lock_irqsave(&ioc->res_lock, flags);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->usingle_calls++;
ioc->usingle_pages += size >> IOVP_SHIFT;
#endif
......@@ -957,15 +962,15 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
/**
* sba_alloc_consistent - allocate/map shared mem for DMA
* @hwdev: instance of PCI owned by the driver that's asking.
* sba_alloc_coherent - allocate/map shared mem for DMA
* @dev: instance of PCI owned by the driver that's asking.
* @size: number of bytes mapped in driver buffer.
* @dma_handle: IOVA of new buffer.
*
* See Documentation/DMA-mapping.txt
*/
void *
sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, int flags)
sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, int flags)
{
struct ioc *ioc;
void *addr;
......@@ -978,7 +983,7 @@ sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, i
* REVISIT: if sba_map_single starts needing more than dma_mask from the
* device, this needs to be updated.
*/
ioc = GET_IOC(hwdev);
ioc = GET_IOC(dev);
ASSERT(ioc);
*dma_handle = sba_map_single(&ioc->sac_only_dev->dev, addr, size, 0);
......@@ -988,17 +993,17 @@ sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, i
/**
* sba_free_consistent - free/unmap shared mem for DMA
* @hwdev: instance of PCI owned by the driver that's asking.
* sba_free_coherent - free/unmap shared mem for DMA
* @dev: instance of PCI owned by the driver that's asking.
* @size: number of bytes mapped in driver buffer.
* @vaddr: virtual address IOVA of "consistent" buffer.
* @dma_handler: IO virtual address of "consistent" buffer.
*
* See Documentation/DMA-mapping.txt
*/
void sba_free_coherent (struct device *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
void sba_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
{
sba_unmap_single(hwdev, dma_handle, size, 0);
sba_unmap_single(dev, dma_handle, size, 0);
free_pages((unsigned long) vaddr, get_order(size));
}
......@@ -1078,7 +1083,7 @@ sba_fill_pdir(
cnt += dma_offset;
dma_offset=0; /* only want offset on first chunk */
cnt = ROUNDUP(cnt, IOVP_SIZE);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msg_pages += cnt >> IOVP_SHIFT;
#endif
do {
......@@ -1268,7 +1273,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
sg->dma_length = sg->length;
sg->dma_address = virt_to_phys(sba_sg_address(sg));
}
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->msg_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -1281,7 +1286,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
sglist->dma_length = sglist->length;
sglist->dma_address = sba_map_single(dev, sba_sg_address(sglist), sglist->length,
dir);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
/*
** Should probably do some stats counting, but trying to
** be precise quickly starts wasting CPU time.
......@@ -1300,7 +1305,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
}
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msg_calls++;
#endif
......@@ -1363,7 +1368,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
ioc = GET_IOC(dev);
ASSERT(ioc);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->usg_calls++;
#endif
......@@ -1376,7 +1381,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
while (nents && sglist->dma_length) {
sba_unmap_single(dev, sglist->dma_address, sglist->dma_length, dir);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
/*
** This leaves inconsistent data in the stats, but we can't
** tell which sg lists were mapped by map_single and which
......@@ -1704,7 +1709,7 @@ ioc_init(u64 hpa, void *handle)
**
**************************************************************************/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
static void *
ioc_start(struct seq_file *s, loff_t *pos)
{
......@@ -1859,7 +1864,7 @@ ioc_proc_init(void)
}
#endif
void
static void
sba_connect_bus(struct pci_bus *bus)
{
acpi_handle handle, parent;
......@@ -1867,7 +1872,7 @@ sba_connect_bus(struct pci_bus *bus)
struct ioc *ioc;
if (!PCI_CONTROLLER(bus))
panic(PFX "no sysdata on bus %d!\n",bus->number);
panic(PFX "no sysdata on bus %d!\n", bus->number);
if (PCI_CONTROLLER(bus)->iommu)
return;
......@@ -1950,7 +1955,7 @@ sba_init(void)
}
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc_proc_init();
#endif
return 0;
......
arch/ia64/ia32/sys_ia32.c
View file @ 336a8b22
......@@ -76,6 +76,7 @@
#define OFFSET4K(a) ((a) & 0xfff)
#define PAGE_START(addr) ((addr) & PAGE_MASK)
#define MINSIGSTKSZ_IA32 2048
#define high2lowuid(uid) ((uid) > 65535 ? 65534 : (uid))
#define high2lowgid(gid) ((gid) > 65535 ? 65534 : (gid))
......@@ -2262,10 +2263,18 @@ sys32_sigaltstack (ia32_stack_t *uss32, ia32_stack_t *uoss32,
return -EFAULT;
uss.ss_sp = (void *) (long) buf32.ss_sp;
uss.ss_flags = buf32.ss_flags;
uss.ss_size = buf32.ss_size;
/* MINSIGSTKSZ is different for ia32 vs ia64. We lie here to pass the
check and set it to the user requested value later */
if (buf32.ss_size < MINSIGSTKSZ_IA32) {
ret = -ENOMEM;
goto out;
}
uss.ss_size = MINSIGSTKSZ;
set_fs(KERNEL_DS);
ret = do_sigaltstack(uss32 ? &uss : NULL, &uoss, pt->r12);
current->sas_ss_size = buf32.ss_size;
set_fs(old_fs);
out:
if (ret < 0)
return(ret);
if (uoss32) {
......
arch/ia64/kernel/Makefile
View file @ 336a8b22
......@@ -14,6 +14,7 @@ obj-$(CONFIG_IA64_GENERIC) += acpi-ext.o
obj-$(CONFIG_IA64_HP_ZX1) += acpi-ext.o
obj-$(CONFIG_IA64_MCA) += mca.o mca_asm.o
obj-$(CONFIG_IA64_PALINFO) += palinfo.o
obj-$(CONFIG_IA64_SALINFO) += salinfo.o
obj-$(CONFIG_IOSAPIC) += iosapic.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_SMP) += smp.o smpboot.o
......
arch/ia64/kernel/acpi.c
View file @ 336a8b22
......@@ -331,7 +331,7 @@ acpi_parse_madt (unsigned long phys_addr, unsigned long size)
#ifdef CONFIG_ACPI_NUMA
#define SLIT_DEBUG
#undef SLIT_DEBUG
#define PXM_FLAG_LEN ((MAX_PXM_DOMAINS + 1)/32)
......
arch/ia64/kernel/efi.c
View file @ 336a8b22
......@@ -446,10 +446,12 @@ efi_map_pal_code (void)
panic("Woah! PAL code size bigger than a granule!");
mask = ~((1 << IA64_GRANULE_SHIFT) - 1);
#if EFI_DEBUG
printk(KERN_INFO "CPU %d: mapping PAL code [0x%lx-0x%lx) into [0x%lx-0x%lx)\n",
smp_processor_id(), md->phys_addr,
md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT),
vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE);
#endif
/*
* Cannot write to CRx with PSR.ic=1
......
arch/ia64/kernel/mca.c
View file @ 336a8b22
......@@ -1193,7 +1193,7 @@ static void
ia64_mca_cmc_poll (unsigned long dummy)
{
/* Trigger a CMC interrupt cascade */
platform_send_ipi(__ffs(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
}
/*
......@@ -1260,7 +1260,7 @@ static void
ia64_mca_cpe_poll (unsigned long dummy)
{
/* Trigger a CPE interrupt cascade */
platform_send_ipi(__ffs(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
}
/*
......
arch/ia64/kernel/perfmon.c
View file @ 336a8b22
......@@ -2905,7 +2905,7 @@ pfm_write_pmcs(pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
* - system-wide session: PMCx.pm=1 (privileged monitor)
* - per-task : PMCx.pm=0 (user monitor)
*/
if ((is_monitor || is_counting) && value != PMC_DFL_VAL(i) && PFM_CHECK_PMC_PM(ctx, cnum, value)) {
if ((is_monitor || is_counting) && value != PMC_DFL_VAL(cnum) && PFM_CHECK_PMC_PM(ctx, cnum, value)) {
DPRINT(("pmc%u pmc_pm=%ld fl_system=%d\n",
cnum,
PMC_PM(cnum, value),
......
arch/ia64/kernel/salinfo.c
View file @ 336a8b22
......@@ -5,6 +5,7 @@
*
* Copyright (c) 2001 Silicon Graphics, Inc. All rights reserved.
*
* 09/11/2003 jbarnes@sgi.com updated for 2.6
* 10/30/2001 jbarnes@sgi.com copied much of Stephane's palinfo
* code to create this file
*/
......@@ -59,7 +60,7 @@ salinfo_init(void)
*sdir = create_proc_read_entry (salinfo_entries[i].name, 0, salinfo_dir,
salinfo_read, (void *)salinfo_entries[i].feature);
if (*sdir)
*sdir->owner = THIS_MODULE;
(*sdir)->owner = THIS_MODULE;
sdir++;
}
*sdir++ = salinfo_dir;
......
arch/ia64/kernel/time.c
View file @ 336a8b22
......@@ -187,7 +187,7 @@ static inline void
ia64_do_profile (struct pt_regs * regs)
{
unsigned long ip, slot;
extern unsigned long prof_cpu_mask;
extern cpumask_t prof_cpu_mask;
profile_hook(regs);
......
arch/ia64/kernel/traps.c
View file @ 336a8b22
......@@ -568,10 +568,10 @@ ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
}
siginfo.si_signo = SIGTRAP;
siginfo.si_errno = 0;
siginfo.si_flags = 0;
siginfo.si_isr = 0;
siginfo.si_addr = (void *) ifa;
siginfo.si_imm = 0;
siginfo.si_flags = __ISR_VALID;
siginfo.si_isr = isr;
force_sig_info(SIGTRAP, &siginfo, current);
return;
......
arch/ia64/kernel/unwind.c
View file @ 336a8b22
......@@ -1171,9 +1171,10 @@ desc_spill_sprel_p (unsigned char qp, unw_word t, unsigned char abreg, unw_word
static inline unw_hash_index_t
hash (unsigned long ip)
{
# define magic 0x9e3779b97f4a7c16 /* based on (sqrt(5)/2-1)*2^64 */
# define hashmagic 0x9e3779b97f4a7c16 /* based on (sqrt(5)/2-1)*2^64 */
return (ip >> 4)*magic >> (64 - UNW_LOG_HASH_SIZE);
return (ip >> 4)*hashmagic >> (64 - UNW_LOG_HASH_SIZE);
#undef hashmagic
}
static inline long
......
arch/ia64/sn/io/machvec/iomv.c
View file @ 336a8b22
......@@ -6,13 +6,13 @@
* Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <asm/sn/simulator.h>
#include <asm/sn/pda.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/sn2/shub_mmr.h>
/**
* sn_io_addr - convert an in/out port to an i/o address
......
arch/ia64/sn/io/sn2/ml_SN_intr.c
View file @ 336a8b22
......@@ -39,6 +39,7 @@
#include <asm/sn/sn2/shubio.h>
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/sn2/shub_mmr.h>
extern irqpda_t *irqpdaindr;
extern cnodeid_t master_node_get(vertex_hdl_t vhdl);
......
arch/ia64/sn/io/sn2/shub.c
View file @ 336a8b22
......@@ -34,6 +34,8 @@
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/sndrv.h>
#include <asm/sn/sn2/shubio.h>
#include <asm/sn/sn2/shub_mmr.h>
/*
* Shub WAR for Xbridge Little Endian problem:
......
arch/ia64/sn/kernel/irq.c
View file @ 336a8b22
......@@ -35,7 +35,6 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <asm/current.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
......@@ -44,7 +43,6 @@
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
#include <asm/sn/invent.h>
#include <linux/devfs_fs_kernel.h>
#include <asm/sn/hcl.h>
#include <asm/sn/types.h>
#include <asm/sn/pci/bridge.h>
......@@ -62,6 +60,7 @@
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/sn/sn2/shub_mmr.h>
int irq_to_bit_pos(int irq);
static void force_interrupt(int irq);
......
include/asm-ia64/acpi.h
View file @ 336a8b22
......@@ -30,6 +30,8 @@
#ifdef __KERNEL__
#include <asm/system.h>
#define COMPILER_DEPENDENT_INT64 long
#define COMPILER_DEPENDENT_UINT64 unsigned long
......
include/asm-ia64/numa.h
View file @ 336a8b22
......@@ -23,7 +23,7 @@
#include <linux/cache.h>
extern volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
extern volatile unsigned long node_to_cpu_mask[NR_NODES] __cacheline_aligned;
extern volatile cpumask_t node_to_cpu_mask[NR_NODES] __cacheline_aligned;
/* Stuff below this line could be architecture independent */
......
include/asm-ia64/param.h
View file @ 336a8b22
......@@ -4,22 +4,10 @@
/*
* Fundamental kernel parameters.
*
* Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co
* Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <linux/config.h>
#ifdef CONFIG_IA64_HP_SIM
/*
* Yeah, simulating stuff is slow, so let us catch some breath between
* timer interrupts...
*/
# define HZ 32
#else
# define HZ 1024
#endif
#define EXEC_PAGESIZE 65536
#ifndef NGROUPS
......@@ -33,8 +21,24 @@
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#ifdef __KERNEL__
# include <linux/config.h> /* mustn't include <linux/config.h> outside of #ifdef __KERNEL__ */
# ifdef CONFIG_IA64_HP_SIM
/*
* Yeah, simulating stuff is slow, so let us catch some breath between
* timer interrupts...
*/
# define HZ 32
# else
# define HZ 1024
# endif
# define USER_HZ HZ
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
#else
/*
* Technically, this is wrong, but some old apps still refer to it. The proper way to
* get the HZ value is via sysconf(_SC_CLK_TCK).
*/
# define HZ 1024
#endif
#endif /* _ASM_IA64_PARAM_H */
include/asm-ia64/sn/ksys/elsc.h
View file @ 336a8b22
......@@ -9,9 +9,6 @@
#ifndef _ASM_SN_KSYS_ELSC_H
#define _ASM_SN_KSYS_ELSC_H
#include <linux/config.h>
#include <asm/sn/ksys/l1.h>
/*
* Error codes
*
......
include/asm-ia64/sn/ksys/l1.h
View file @ 336a8b22
......@@ -10,10 +10,7 @@
#ifndef _ASM_SN_KSYS_L1_H
#define _ASM_SN_KSYS_L1_H
#include <linux/config.h>
#include <asm/sn/vector.h>
#include <asm/sn/addrs.h>
#include <asm/atomic.h>
#include <asm/sn/types.h>
/* L1 Target Addresses */
/*
......@@ -39,18 +36,6 @@
#define L1_ADDR_TASK_BEDROCK 0x05 /* bedrock */
#define L1_ADDR_TASK_GENERAL 0x06 /* general requests */
#define L1_ADDR_LOCAL \
(L1_ADDR_TYPE_L1 << L1_ADDR_TYPE_SHFT) | \
(L1_ADDR_RACK_LOCAL << L1_ADDR_RACK_SHFT) | \
(L1_ADDR_BAY_LOCAL << L1_ADDR_BAY_SHFT)
#define L1_ADDR_LOCALIO \
(L1_ADDR_TYPE_IOBRICK << L1_ADDR_TYPE_SHFT) | \
(L1_ADDR_RACK_LOCAL << L1_ADDR_RACK_SHFT) | \
(L1_ADDR_BAY_LOCAL << L1_ADDR_BAY_SHFT)
#define L1_ADDR_LOCAL_SHFT L1_ADDR_BAY_SHFT
/* response argument types */
#define L1_ARG_INT 0x00 /* 4-byte integer (big-endian) */
#define L1_ARG_ASCII 0x01 /* null-terminated ASCII string */
......@@ -133,18 +118,6 @@
#define L1_EEP_IUSE 3 /* internal use area */
#define L1_EEP_SPD 4 /* serial presence detect record */
typedef uint32_t l1addr_t;
#define L1_BUILD_ADDR(addr,at,r,s,t) \
(*(l1addr_t *)(addr) = ((l1addr_t)(at) << L1_ADDR_TYPE_SHFT) | \
((l1addr_t)(r) << L1_ADDR_RACK_SHFT) | \
((l1addr_t)(s) << L1_ADDR_BAY_SHFT) | \
((l1addr_t)(t) << L1_ADDR_TASK_SHFT))
#define L1_ADDRESS_TO_TASK(addr,trb,tsk) \
(*(l1addr_t *)(addr) = (l1addr_t)(trb) | \
((l1addr_t)(tsk) << L1_ADDR_TASK_SHFT))
#define L1_DISPLAY_LINE_LENGTH 12 /* L1 display characters/line */
#ifdef L1_DISP_2LINES
......@@ -154,11 +127,9 @@ typedef uint32_t l1addr_t;
* to system software */
#endif
#define bzero(d, n) memset((d), 0, (n))
int elsc_display_line(nasid_t nasid, char *line, int lnum);
int iobrick_rack_bay_type_get( nasid_t nasid, uint *rack,
uint *bay, uint *brick_type );
int iobrick_rack_bay_type_get( nasid_t nasid, unsigned int *rack,
unsigned int *bay, unsigned int *brick_type );
int iobrick_module_get( nasid_t nasid );
......
include/asm-ia64/sn/nodepda.h
View file @ 336a8b22
......@@ -128,7 +128,7 @@ typedef struct irqpda_s irqpda_t;
* Check if given a compact node id the corresponding node has all the
* cpus disabled.
*/
#define is_headless_node(cnode) (!node_to_cpumask(cnode))
#define is_headless_node(cnode) (!any_online_cpu(node_to_cpumask(cnode)))
/*
* Check if given a node vertex handle the corresponding node has all the
......
include/asm-ia64/sn/pci/pcibr_private.h
View file @ 336a8b22
......@@ -15,11 +15,9 @@
* should ever peek into this file.
*/
#include <linux/config.h>
#include <linux/pci.h>
#include <asm/sn/pci/pcibr.h>
#include <asm/sn/pci/pciio_private.h>
#include <asm/sn/ksys/l1.h>
/*
* convenience typedefs
......
include/asm-ia64/sn/router.h
View file @ 336a8b22
/* $Id$
/* $id$
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
......@@ -19,7 +18,6 @@
#ifndef __ASSEMBLY__
#include <linux/devfs_fs_kernel.h>
#include <asm/sn/vector.h>
#include <asm/sn/slotnum.h>
#include <asm/sn/arch.h>
......@@ -31,23 +29,19 @@ typedef uint64_t router_reg_t;
#define MAX_ROUTER_PATH 80
#define ROUTER_REG_CAST (volatile router_reg_t *)
#define PS_UINT_CAST (__psunsigned_t)
#define UINT64_CAST (uint64_t)
typedef signed char port_no_t; /* Type for router port number */
#else
#define ROUTERREG_CAST
#define PS_UINT_CAST
#define UINT64_CAST
#endif /* __ASSEMBLY__ */
#define MAX_ROUTER_PORTS (8) /* Max. number of ports on a router */
#define MAX_ROUTER_PORTS 8 /* Max. number of ports on a router */
#define ALL_PORTS ((1 << MAX_ROUTER_PORTS) - 1) /* for 0 based references */
#define PORT_INVALID (-1) /* Invalid port number */
#define PORT_INVALID -1 /* Invalid port number */
#define IS_META(_rp) ((_rp)->flags & PCFG_ROUTER_META)
......@@ -126,24 +120,24 @@ typedef signed char port_no_t; /* Type for router port number */
*/
#define RSRI_INPORT_SHFT 52
#define RSRI_INPORT_MASK (UINT64_CAST 0xf << 52)
#define RSRI_INPORT_MASK (0xfUL << 52)
#define RSRI_LINKWORKING_BIT(_L) (35 + 2 * (_L))
#define RSRI_LINKWORKING(_L) (UINT64_CAST 1 << (35 + 2 * (_L)))
#define RSRI_LINKRESETFAIL(_L) (UINT64_CAST 1 << (34 + 2 * (_L)))
#define RSRI_LINKWORKING(_L) (1UL << (35 + 2 * (_L)))
#define RSRI_LINKRESETFAIL(_L) (1UL << (34 + 2 * (_L)))
#define RSRI_LSTAT_SHFT(_L) (34 + 2 * (_L))
#define RSRI_LSTAT_MASK(_L) (UINT64_CAST 0x3 << 34 + 2 * (_L))
#define RSRI_LOCALSBERROR (UINT64_CAST 1 << 35)
#define RSRI_LOCALSTUCK (UINT64_CAST 1 << 34)
#define RSRI_LOCALBADVEC (UINT64_CAST 1 << 33)
#define RSRI_LOCALTAILERR (UINT64_CAST 1 << 32)
#define RSRI_LSTAT_MASK(_L) (0x3UL << 34 + 2 * (_L))
#define RSRI_LOCALSBERROR (1UL << 35)
#define RSRI_LOCALSTUCK (1UL << 34)
#define RSRI_LOCALBADVEC (1UL << 33)
#define RSRI_LOCALTAILERR (1UL << 32)
#define RSRI_LOCAL_SHFT 32
#define RSRI_LOCAL_MASK (UINT64_CAST 0xf << 32)
#define RSRI_LOCAL_MASK (0xfUL << 32)
#define RSRI_CHIPREV_SHFT 28
#define RSRI_CHIPREV_MASK (UINT64_CAST 0xf << 28)
#define RSRI_CHIPREV_MASK (0xfUL << 28)
#define RSRI_CHIPID_SHFT 12
#define RSRI_CHIPID_MASK (UINT64_CAST 0xffff << 12)
#define RSRI_CHIPID_MASK (0xffffUL << 12)
#define RSRI_MFGID_SHFT 1
#define RSRI_MFGID_MASK (UINT64_CAST 0x7ff << 1)
#define RSRI_MFGID_MASK (0x7ffUL << 1)
#define RSRI_LSTAT_WENTDOWN 0
#define RSRI_LSTAT_RESETFAIL 1
......@@ -154,38 +148,38 @@ typedef signed char port_no_t; /* Type for router port number */
* RR_PORT_RESET mask definitions
*/
#define RPRESET_WARM (UINT64_CAST 1 << 9)
#define RPRESET_LINK(_L) (UINT64_CAST 1 << (_L))
#define RPRESET_LOCAL (UINT64_CAST 1)
#define RPRESET_WARM (1UL << 9)
#define RPRESET_LINK(_L) (1UL << (_L))
#define RPRESET_LOCAL 1UL
/*
* RR_PROT_CONF mask and shift definitions
*/
#define RPCONF_DIRCMPDIS_SHFT 13
#define RPCONF_DIRCMPDIS_MASK (UINT64_CAST 1 << 13)
#define RPCONF_FORCELOCAL (UINT64_CAST 1 << 12)
#define RPCONF_DIRCMPDIS_MASK (1UL << 13)
#define RPCONF_FORCELOCAL (1UL << 12)
#define RPCONF_FLOCAL_SHFT 12
#define RPCONF_METAID_SHFT 8
#define RPCONF_METAID_MASK (UINT64_CAST 0xf << 8)
#define RPCONF_RESETOK(_L) (UINT64_CAST 1 << ((_L) - 1))
#define RPCONF_METAID_MASK (0xfUL << 8)
#define RPCONF_RESETOK(_L) (1UL << ((_L) - 1))
/*
* RR_GLOBAL_PORT_DEF mask and shift definitions
*/
#define RGPD_MGLBLNHBR_ID_SHFT 12 /* -global neighbor ID */
#define RGPD_MGLBLNHBR_ID_MASK (UINT64_CAST 0xf << 12)
#define RGPD_MGLBLNHBR_ID_MASK (0xfUL << 12)
#define RGPD_MGLBLNHBR_VLD_SHFT 11 /* -global neighbor Valid */
#define RGPD_MGLBLNHBR_VLD_MASK (UINT64_CAST 0x1 << 11)
#define RGPD_MGLBLNHBR_VLD_MASK (0x1UL << 11)
#define RGPD_MGLBLPORT_SHFT 8 /* -global neighbor Port */
#define RGPD_MGLBLPORT_MASK (UINT64_CAST 0x7 << 8)
#define RGPD_MGLBLPORT_MASK (0x7UL << 8)
#define RGPD_PGLBLNHBR_ID_SHFT 4 /* +global neighbor ID */
#define RGPD_PGLBLNHBR_ID_MASK (UINT64_CAST 0xf << 4)
#define RGPD_PGLBLNHBR_ID_MASK (0xfUL << 4)
#define RGPD_PGLBLNHBR_VLD_SHFT 3 /* +global neighbor Valid */
#define RGPD_PGLBLNHBR_VLD_MASK (UINT64_CAST 0x1 << 3)
#define RGPD_PGLBLNHBR_VLD_MASK (0x1UL << 3)
#define RGPD_PGLBLPORT_SHFT 0 /* +global neighbor Port */
#define RGPD_PGLBLPORT_MASK (UINT64_CAST 0x7 << 0)
#define RGPD_PGLBLPORT_MASK (0x7UL << 0)
#define GLBL_PARMS_REGS 2 /* Two Global Parms registers */
......@@ -194,95 +188,95 @@ typedef signed char port_no_t; /* Type for router port number */
*/
#define RGPARM0_ARB_VALUE_SHFT 54 /* Local Block Arbitration State */
#define RGPARM0_ARB_VALUE_MASK (UINT64_CAST 0x7 << 54)
#define RGPARM0_ARB_VALUE_MASK (0x7UL << 54)
#define RGPARM0_ROTATEARB_SHFT 53 /* Rotate Local Block Arbitration */
#define RGPARM0_ROTATEARB_MASK (UINT64_CAST 0x1 << 53)
#define RGPARM0_ROTATEARB_MASK (1UL << 53)
#define RGPARM0_FAIREN_SHFT 52 /* Fairness logic Enable */
#define RGPARM0_FAIREN_MASK (UINT64_CAST 0x1 << 52)
#define RGPARM0_FAIREN_MASK (1UL << 52)
#define RGPARM0_LOCGNTTO_SHFT 40 /* Local grant timeout */
#define RGPARM0_LOCGNTTO_MASK (UINT64_CAST 0xfff << 40)
#define RGPARM0_LOCGNTTO_MASK (0xfffUL << 40)
#define RGPARM0_DATELINE_SHFT 38 /* Dateline crossing router */
#define RGPARM0_DATELINE_MASK (UINT64_CAST 0x1 << 38)
#define RGPARM0_DATELINE_MASK (1UL << 38)
#define RGPARM0_MAXRETRY_SHFT 28 /* Max retry count */
#define RGPARM0_MAXRETRY_MASK (UINT64_CAST 0x3ff << 28)
#define RGPARM0_MAXRETRY_MASK (0x3ffUL << 28)
#define RGPARM0_URGWRAP_SHFT 20 /* Urgent wrap */
#define RGPARM0_URGWRAP_MASK (UINT64_CAST 0xff << 20)
#define RGPARM0_URGWRAP_MASK (0xffUL << 20)
#define RGPARM0_DEADLKTO_SHFT 16 /* Deadlock timeout */
#define RGPARM0_DEADLKTO_MASK (UINT64_CAST 0xf << 16)
#define RGPARM0_DEADLKTO_MASK (0xfUL << 16)
#define RGPARM0_URGVAL_SHFT 12 /* Urgent value */
#define RGPARM0_URGVAL_MASK (UINT64_CAST 0xf << 12)
#define RGPARM0_URGVAL_MASK (0xfUL << 12)
#define RGPARM0_VCHSELEN_SHFT 11 /* VCH_SEL_EN */
#define RGPARM0_VCHSELEN_MASK (UINT64_CAST 0x1 << 11)
#define RGPARM0_VCHSELEN_MASK (1UL << 11)
#define RGPARM0_LOCURGTO_SHFT 9 /* Local urgent timeout */
#define RGPARM0_LOCURGTO_MASK (UINT64_CAST 0x3 << 9)
#define RGPARM0_LOCURGTO_MASK (0x3UL << 9)
#define RGPARM0_TAILVAL_SHFT 5 /* Tail value */
#define RGPARM0_TAILVAL_MASK (UINT64_CAST 0xf << 5)
#define RGPARM0_TAILVAL_MASK (0xfUL << 5)
#define RGPARM0_CLOCK_SHFT 1 /* Global clock select */
#define RGPARM0_CLOCK_MASK (UINT64_CAST 0xf << 1)
#define RGPARM0_CLOCK_MASK (0xfUL << 1)
#define RGPARM0_BYPEN_SHFT 0
#define RGPARM0_BYPEN_MASK (UINT64_CAST 1) /* Bypass enable */
#define RGPARM0_BYPEN_MASK 1UL /* Bypass enable */
/*
* RR_GLOBAL_PARMS1 shift and mask definitions
*/
#define RGPARM1_TTOWRAP_SHFT 12 /* Tail timeout wrap */
#define RGPARM1_TTOWRAP_MASK (UINT64_CAST 0xfffff << 12)
#define RGPARM1_TTOWRAP_MASK (0xfffffUL << 12)
#define RGPARM1_AGERATE_SHFT 8 /* Age rate */
#define RGPARM1_AGERATE_MASK (UINT64_CAST 0xf << 8)
#define RGPARM1_AGERATE_MASK (0xfUL << 8)
#define RGPARM1_JSWSTAT_SHFT 0 /* JTAG Sw Register bits */
#define RGPARM1_JSWSTAT_MASK (UINT64_CAST 0xff << 0)
#define RGPARM1_JSWSTAT_MASK (0xffUL << 0)
/*
* RR_DIAG_PARMS mask and shift definitions
*/
#define RDPARM_ABSHISTOGRAM (UINT64_CAST 1 << 17) /* Absolute histgrm */
#define RDPARM_DEADLOCKRESET (UINT64_CAST 1 << 16) /* Reset on deadlck */
#define RDPARM_DISABLE(_L) (UINT64_CAST 1 << ((_L) + 7))
#define RDPARM_SENDERROR(_L) (UINT64_CAST 1 << ((_L) - 1))
#define RDPARM_ABSHISTOGRAM (1UL << 17) /* Absolute histgrm */
#define RDPARM_DEADLOCKRESET (1UL << 16) /* Reset on deadlck */
#define RDPARM_DISABLE(_L) (1UL << ((_L) + 7))
#define RDPARM_SENDERROR(_L) (1UL << ((_L) - 1))
/*
* RR_DEBUG_ADDR mask and shift definitions
*/
#define RDA_DATA_SHFT 10 /* Observed debug data */
#define RDA_DATA_MASK (UINT64_CAST 0xffff << 10)
#define RDA_DATA_MASK (0xffffUL << 10)
#define RDA_ADDR_SHFT 0 /* debug address for data */
#define RDA_ADDR_MASK (UINT64_CAST 0x3ff << 0)
#define RDA_ADDR_MASK (0x3ffUL << 0)
/*
* RR_LB_TO_L2 mask and shift definitions
*/
#define RLBTOL2_DATA_VLD_SHFT 32 /* data is valid for JTAG controller */
#define RLBTOL2_DATA_VLD_MASK (UINT64_CAST 0x1 << 32)
#define RLBTOL2_DATA_VLD_MASK (1UL << 32)
#define RLBTOL2_DATA_SHFT 0 /* data bits for JTAG controller */
#define RLBTOL2_DATA_MASK (UINT64_CAST 0xffffffff)
#define RLBTOL2_DATA_MASK 0xffffffffUL
/*
* RR_L2_TO_LB mask and shift definitions
*/
#define RL2TOLB_DATA_VLD_SHFT 33 /* data is valid from JTAG controller */
#define RL2TOLB_DATA_VLD_MASK (UINT64_CAST 0x1 << 33)
#define RL2TOLB_DATA_VLD_MASK (1UL << 33)
#define RL2TOLB_PARITY_SHFT 32 /* sw implemented parity for data */
#define RL2TOLB_PARITY_MASK (UINT64_CAST 0x1 << 32)
#define RL2TOLB_PARITY_MASK (1UL << 32)
#define RL2TOLB_DATA_SHFT 0 /* data bits from JTAG controller */
#define RL2TOLB_DATA_MASK (UINT64_CAST 0xffffffff)
#define RL2TOLB_DATA_MASK 0xffffffffUL
/*
* RR_JBUS_CONTROL mask and shift definitions
*/
#define RJC_POS_BITS_SHFT 20 /* Router position bits */
#define RJC_POS_BITS_MASK (UINT64_CAST 0xf << 20)
#define RJC_POS_BITS_MASK (0xfUL << 20)
#define RJC_RD_DATA_STROBE_SHFT 16 /* count when read data is strobed in */
#define RJC_RD_DATA_STROBE_MASK (UINT64_CAST 0xf << 16)
#define RJC_RD_DATA_STROBE_MASK (0xfUL << 16)
#define RJC_WE_OE_HOLD_SHFT 8 /* time OE or WE is held */
#define RJC_WE_OE_HOLD_MASK (UINT64_CAST 0xff << 8)
#define RJC_WE_OE_HOLD_MASK (0xffUL << 8)
#define RJC_ADDR_SET_HLD_SHFT 0 /* time address driven around OE/WE */
#define RJC_ADDR_SET_HLD_MASK (UINT64_CAST 0xff)
#define RJC_ADDR_SET_HLD_MASK 0xffUL
/*
* RR_SCRATCH_REGx mask and shift definitions
......@@ -291,58 +285,58 @@ typedef signed char port_no_t; /* Type for router port number */
*/
#define RSCR0_BOOTED_SHFT 63
#define RSCR0_BOOTED_MASK (UINT64_CAST 0x1 << RSCR0_BOOTED_SHFT)
#define RSCR0_BOOTED_MASK (0x1UL << RSCR0_BOOTED_SHFT)
#define RSCR0_LOCALID_SHFT 56
#define RSCR0_LOCALID_MASK (UINT64_CAST 0x7f << RSCR0_LOCALID_SHFT)
#define RSCR0_LOCALID_MASK (0x7fUL << RSCR0_LOCALID_SHFT)
#define RSCR0_UNUSED_SHFT 48
#define RSCR0_UNUSED_MASK (UINT64_CAST 0xff << RSCR0_UNUSED_SHFT)
#define RSCR0_UNUSED_MASK (0xffUL << RSCR0_UNUSED_SHFT)
#define RSCR0_NIC_SHFT 0
#define RSCR0_NIC_MASK (UINT64_CAST 0xffffffffffff)
#define RSCR0_NIC_MASK 0xffffffffffffUL
#define RSCR1_MODID_SHFT 0
#define RSCR1_MODID_MASK (UINT64_CAST 0xffff)
#define RSCR1_MODID_MASK 0xffffUL
/*
* RR_VECTOR_HW_BAR mask and shift definitions
*/
#define BAR_TX_SHFT 27 /* Barrier in trans(m)it when read */
#define BAR_TX_MASK (UINT64_CAST 1 << BAR_TX_SHFT)
#define BAR_TX_MASK (1UL << BAR_TX_SHFT)
#define BAR_VLD_SHFT 26 /* Valid Configuration */
#define BAR_VLD_MASK (UINT64_CAST 1 << BAR_VLD_SHFT)
#define BAR_VLD_MASK (1UL << BAR_VLD_SHFT)
#define BAR_SEQ_SHFT 24 /* Sequence number */
#define BAR_SEQ_MASK (UINT64_CAST 3 << BAR_SEQ_SHFT)
#define BAR_SEQ_MASK (3UL << BAR_SEQ_SHFT)
#define BAR_LEAFSTATE_SHFT 18 /* Leaf State */
#define BAR_LEAFSTATE_MASK (UINT64_CAST 0x3f << BAR_LEAFSTATE_SHFT)
#define BAR_LEAFSTATE_MASK (0x3fUL << BAR_LEAFSTATE_SHFT)
#define BAR_PARENT_SHFT 14 /* Parent Port */
#define BAR_PARENT_MASK (UINT64_CAST 0xf << BAR_PARENT_SHFT)
#define BAR_PARENT_MASK (0xfUL << BAR_PARENT_SHFT)
#define BAR_CHILDREN_SHFT 6 /* Child Select port bits */
#define BAR_CHILDREN_MASK (UINT64_CAST 0xff << BAR_CHILDREN_SHFT)
#define BAR_CHILDREN_MASK (0xffUL << BAR_CHILDREN_SHFT)
#define BAR_LEAFCOUNT_SHFT 0 /* Leaf Count to trigger parent */
#define BAR_LEAFCOUNT_MASK (UINT64_CAST 0x3f)
#define BAR_LEAFCOUNT_MASK 0x3fUL
/*
* RR_PORT_PARMS(_L) mask and shift definitions
*/
#define RPPARM_MIPRESETEN_SHFT 29 /* Message In Progress reset enable */
#define RPPARM_MIPRESETEN_MASK (UINT64_CAST 0x1 << 29)
#define RPPARM_MIPRESETEN_MASK (0x1UL << 29)
#define RPPARM_UBAREN_SHFT 28 /* Enable user barrier requests */
#define RPPARM_UBAREN_MASK (UINT64_CAST 0x1 << 28)
#define RPPARM_UBAREN_MASK (0x1UL << 28)
#define RPPARM_OUTPDTO_SHFT 24 /* Output Port Deadlock TO value */
#define RPPARM_OUTPDTO_MASK (UINT64_CAST 0xf << 24)
#define RPPARM_OUTPDTO_MASK (0xfUL << 24)
#define RPPARM_PORTMATE_SHFT 21 /* Port Mate for the port */
#define RPPARM_PORTMATE_MASK (UINT64_CAST 0x7 << 21)
#define RPPARM_PORTMATE_MASK (0x7UL << 21)
#define RPPARM_HISTEN_SHFT 20 /* Histogram counter enable */
#define RPPARM_HISTEN_MASK (UINT64_CAST 0x1 << 20)
#define RPPARM_HISTEN_MASK (0x1UL << 20)
#define RPPARM_HISTSEL_SHFT 18
#define RPPARM_HISTSEL_MASK (UINT64_CAST 0x3 << 18)
#define RPPARM_HISTSEL_MASK (0x3UL << 18)
#define RPPARM_DAMQHS_SHFT 16
#define RPPARM_DAMQHS_MASK (UINT64_CAST 0x3 << 16)
#define RPPARM_DAMQHS_MASK (0x3UL << 16)
#define RPPARM_NULLTO_SHFT 10
#define RPPARM_NULLTO_MASK (UINT64_CAST 0x3f << 10)
#define RPPARM_NULLTO_MASK (0x3fUL << 10)
#define RPPARM_MAXBURST_SHFT 0
#define RPPARM_MAXBURST_MASK (UINT64_CAST 0x3ff)
#define RPPARM_MAXBURST_MASK 0x3ffUL
/*
* NOTE: Normally the kernel tracks only UTILIZATION statistics.
......@@ -356,23 +350,23 @@ typedef signed char port_no_t; /* Type for router port number */
/*
* RR_STATUS_ERROR(_L) and RR_ERROR_CLEAR(_L) mask and shift definitions
*/
#define RSERR_POWERNOK (UINT64_CAST 1 << 38)
#define RSERR_PORT_DEADLOCK (UINT64_CAST 1 << 37)
#define RSERR_WARMRESET (UINT64_CAST 1 << 36)
#define RSERR_LINKRESET (UINT64_CAST 1 << 35)
#define RSERR_RETRYTIMEOUT (UINT64_CAST 1 << 34)
#define RSERR_FIFOOVERFLOW (UINT64_CAST 1 << 33)
#define RSERR_ILLEGALPORT (UINT64_CAST 1 << 32)
#define RSERR_POWERNOK (1UL << 38)
#define RSERR_PORT_DEADLOCK (1UL << 37)
#define RSERR_WARMRESET (1UL << 36)
#define RSERR_LINKRESET (1UL << 35)
#define RSERR_RETRYTIMEOUT (1UL << 34)
#define RSERR_FIFOOVERFLOW (1UL << 33)
#define RSERR_ILLEGALPORT (1UL << 32)
#define RSERR_DEADLOCKTO_SHFT 28
#define RSERR_DEADLOCKTO_MASK (UINT64_CAST 0xf << 28)
#define RSERR_DEADLOCKTO_MASK (0xfUL << 28)
#define RSERR_RECVTAILTO_SHFT 24
#define RSERR_RECVTAILTO_MASK (UINT64_CAST 0xf << 24)
#define RSERR_RECVTAILTO_MASK (0xfUL << 24)
#define RSERR_RETRYCNT_SHFT 16
#define RSERR_RETRYCNT_MASK (UINT64_CAST 0xff << 16)
#define RSERR_RETRYCNT_MASK (0xffUL << 16)
#define RSERR_CBERRCNT_SHFT 8
#define RSERR_CBERRCNT_MASK (UINT64_CAST 0xff << 8)
#define RSERR_CBERRCNT_MASK (0xffUL << 8)
#define RSERR_SNERRCNT_SHFT 0
#define RSERR_SNERRCNT_MASK (UINT64_CAST 0xff << 0)
#define RSERR_SNERRCNT_MASK (0xffUL << 0)
#define PORT_STATUS_UP (1 << 0) /* Router link up */
......@@ -393,10 +387,10 @@ typedef signed char port_no_t; /* Type for router port number */
* why the router link
* went down
*/
#define PROBE_RESULT_BAD (-1) /* Set if any of the router
#define PROBE_RESULT_BAD -1 /* Set if any of the router
* links failed after reset
*/
#define PROBE_RESULT_GOOD (0) /* Set if all the router links
#define PROBE_RESULT_GOOD 0 /* Set if all the router links
* which came out of reset
* are up
*/
......@@ -528,23 +522,6 @@ typedef struct router_info_s {
#define RIP_PROMLOG 2 /* Router info in promlog */
#define RIP_CONSOLE 4 /* Router info on console */
#define ROUTER_INFO_PRINT(_rip,_where) (_rip->ri_print |= _where)
/* Set the field used to check if a
* router info can be printed
*/
#define IS_ROUTER_INFO_PRINTED(_rip,_where) \
(_rip->ri_print & _where)
/* Was the router info printed to
* the given location (_where) ?
* Mainly used to prevent duplicate
* router error states.
*/
#define ROUTER_INFO_LOCK(_rip,_s) _s = mutex_spinlock(&(_rip->ri_lock))
/* Take the lock on router info
* to gain exclusive access
*/
#define ROUTER_INFO_UNLOCK(_rip,_s) mutex_spinunlock(&(_rip->ri_lock),_s)
/* Release the lock on router info */
/*
* Router info hanging in the nodepda
*/
......@@ -623,7 +600,7 @@ typedef struct router_queue_s {
*/
#define RHIST_BUCKET_SHFT(_x) (32 * ((_x) & 0x1))
#define RHIST_BUCKET_MASK(_x) (UINT64_CAST 0xffffffff << RHIST_BUCKET_SHFT((_x) & 0x1))
#define RHIST_BUCKET_MASK(_x) (0xffffffffUL << RHIST_BUCKET_SHFT((_x) & 0x1))
#define RHIST_GET_BUCKET(_x, _reg) \
((RHIST_BUCKET_MASK(_x) & ((_reg)[(_x) >> 1])) >> RHIST_BUCKET_SHFT(_x))
......@@ -631,7 +608,7 @@ typedef struct router_queue_s {
* RR_RESET_MASK(_L) mask and shift definitions
*/
#define RRM_RESETOK(_L) (UINT64_CAST 1 << ((_L) - 1))
#define RRM_RESETOK(_L) (1UL << ((_L) - 1))
#define RRM_RESETOK_ALL ALL_PORTS
/*
......@@ -639,7 +616,7 @@ typedef struct router_queue_s {
*/
#define RTABLE_SHFT(_L) (4 * ((_L) - 1))
#define RTABLE_MASK(_L) (UINT64_CAST 0x7 << RTABLE_SHFT(_L))
#define RTABLE_MASK(_L) (0x7UL << RTABLE_SHFT(_L))
#define ROUTERINFO_STKSZ 4096
......
include/asm-ia64/sn/sn2/shub.h
View file @ 336a8b22
......@@ -11,13 +11,6 @@
#ifndef _ASM_IA64_SN_SN2_SHUB_H
#define _ASM_IA64_SN_SN2_SHUB_H
#include <asm/sn/sn2/shub_mmr.h> /* shub mmr addresses and formats */
#include <asm/sn/sn2/shub_md.h>
#include <asm/sn/sn2/shubio.h>
#ifndef __ASSEMBLY__
#include <asm/sn/sn2/shub_mmr_t.h> /* shub mmr struct defines */
#endif
/*
* Junk Bus Address Space
* The junk bus is used to access the PROM, LED's, and UART. It's
......
include/asm-ia64/sn/sn2/shub_mmr_t.h
View file @ 336a8b22
This source diff could not be displayed because it is too large. You can view the blob instead.
include/asm-ia64/spinlock.h
View file @ 336a8b22
......@@ -166,7 +166,7 @@ do { \
#define _raw_write_lock(l) \
({ \
__u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \
__u32 ia64_write_lock_ptr = (__u32 *) (l); \
__u32 *ia64_write_lock_ptr = (__u32 *) (l); \
do { \
while (*ia64_write_lock_ptr) \
ia64_barrier(); \
......
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