Merge nuts.ninka.net:/home/davem/src/BK/sparcwork-2.5

into nuts.ninka.net:/home/davem/src/BK/sparc-2.5

arch/sparc64/solaris/misc.c

@@ -724,6 +724,7 @@ extern int init_socksys(void);
 
 MODULE_AUTHOR("Jakub Jelinek (jj@ultra.linux.cz), Patrik Rak (prak3264@ss1000.ms.mff.cuni.cz)");
 MODULE_DESCRIPTION("Solaris binary emulation module");
+MODULE_LICENSE("GPL");
 
 #ifdef __sparc_v9__
 extern u32 tl0_solaris[8];

drivers/scsi/esp.h

@@ -8,6 +8,8 @@
 #ifndef _SPARC_ESP_H
 #define _SPARC_ESP_H
 
+#include <linux/config.h>
+
 /* For dvma controller register definitions. */
 #include <asm/dma.h>
 
@@ -399,6 +401,7 @@ extern int esp_proc_info(char *buffer, char **start, off_t offset, int length,
 			 int hostno, int inout);
 extern int esp_revoke(Scsi_Device* SDptr);
 
+#ifdef CONFIG_SPARC64
 #define SCSI_SPARC_ESP {                                        \
 		proc_name:      "esp",				\
 		proc_info:      &esp_proc_info,			\
@@ -417,6 +420,26 @@ extern int esp_revoke(Scsi_Device* SDptr);
 		use_clustering: ENABLE_CLUSTERING,		\
 		highmem_io:	1,				\
 }
+#else
+/* Sparc32's iommu code cannot handle highmem pages yet. */
+#define SCSI_SPARC_ESP {                                        \
+		proc_name:      "esp",				\
+		proc_info:      &esp_proc_info,			\
+		name:           "Sun ESP 100/100a/200",		\
+		detect:         esp_detect,			\
+		revoke:		esp_revoke,			\
+		info:           esp_info,			\
+		command:        esp_command,			\
+		queuecommand:   esp_queue,			\
+		abort:          esp_abort,			\
+		reset:          esp_reset,			\
+		can_queue:      7,				\
+		this_id:        7,				\
+		sg_tablesize:   SG_ALL,				\
+		cmd_per_lun:    1,				\
+		use_clustering: ENABLE_CLUSTERING,		\
+}
+#endif
 
 /* For our interrupt engine. */
 #define for_each_esp(esp) \

drivers/scsi/qlogicpti.h

@@ -6,6 +6,8 @@
 #ifndef _QLOGICPTI_H
 #define _QLOGICPTI_H
 
+#include <linux/config.h>
+
 /* Qlogic/SBUS controller registers. */
 #define SBUS_CFG1	0x006UL
 #define SBUS_CTRL	0x008UL
@@ -512,6 +514,7 @@ struct qlogicpti {
 #define HCCTRL_B1ENAB           0x0008      /* Breakpoint 1 enable              */
 #define HCCTRL_B0ENAB           0x0004      /* Breakpoint 0 enable              */
 
+#ifdef CONFIG_SPARC64
 #define QLOGICPTI {						   \
 	detect:		qlogicpti_detect,			   \
 	release:	qlogicpti_release,			   \
@@ -526,6 +529,22 @@ struct qlogicpti {
 	use_clustering:	ENABLE_CLUSTERING,			   \
 	highmem_io:	1,			   		   \
 }
+#else
+/* Sparc32's iommu code cannot handle highmem pages yet. */
+#define QLOGICPTI {						   \
+	detect:		qlogicpti_detect,			   \
+	release:	qlogicpti_release,			   \
+	info:		qlogicpti_info,				   \
+	queuecommand:	qlogicpti_queuecommand_slow,		   \
+	abort:		qlogicpti_abort,			   \
+	reset:		qlogicpti_reset,			   \
+	can_queue:	QLOGICPTI_REQ_QUEUE_LEN,		   \
+	this_id:	7,					   \
+	sg_tablesize:	QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN), \
+	cmd_per_lun:	1,					   \
+	use_clustering:	ENABLE_CLUSTERING,			   \
+}
+#endif
 
 /* For our interrupt engine. */
 #define for_each_qlogicpti(qp) \