Commit 39c15737 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
 "Fixes marked for stable:
   - Set missing wakeup bit in LPCR on POWER9
   - Fix the early OPAL console wrappers
   - Fixup kernel read only mapping

  Fixes for code merged this cycle:
   - Fix missing CRCs, add more asm-prototypes.h declarations"

* tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/mm: Fixup kernel read only mapping
  powerpc/boot: Fix the early OPAL console wrappers
  powerpc: Fix missing CRCs, add more asm-prototypes.h declarations
  powerpc: Set missing wakeup bit in LPCR on POWER9
parents 3ad0e83c 984d7a1e
...@@ -232,8 +232,12 @@ void start(void) ...@@ -232,8 +232,12 @@ void start(void)
console_ops.close(); console_ops.close();
kentry = (kernel_entry_t) vmlinux.addr; kentry = (kernel_entry_t) vmlinux.addr;
if (ft_addr) if (ft_addr) {
if(platform_ops.kentry)
platform_ops.kentry(ft_addr, vmlinux.addr);
else
kentry(ft_addr, 0, NULL); kentry(ft_addr, 0, NULL);
}
else else
kentry((unsigned long)initrd.addr, initrd.size, kentry((unsigned long)initrd.addr, initrd.size,
loader_info.promptr); loader_info.promptr);
......
...@@ -12,6 +12,19 @@ ...@@ -12,6 +12,19 @@
.text .text
.globl opal_kentry
opal_kentry:
/* r3 is the fdt ptr */
mtctr r4
li r4, 0
li r5, 0
li r6, 0
li r7, 0
ld r11,opal@got(r2)
ld r8,0(r11)
ld r9,8(r11)
bctr
#define OPAL_CALL(name, token) \ #define OPAL_CALL(name, token) \
.globl name; \ .globl name; \
name: \ name: \
......
...@@ -23,14 +23,25 @@ struct opal { ...@@ -23,14 +23,25 @@ struct opal {
static u32 opal_con_id; static u32 opal_con_id;
/* see opal-wrappers.S */
int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer); int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer);
int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer); int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer);
int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length); int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length);
int64_t opal_console_flush(uint64_t term_number); int64_t opal_console_flush(uint64_t term_number);
int64_t opal_poll_events(uint64_t *outstanding_event_mask); int64_t opal_poll_events(uint64_t *outstanding_event_mask);
void opal_kentry(unsigned long fdt_addr, void *vmlinux_addr);
static int opal_con_open(void) static int opal_con_open(void)
{ {
/*
* When OPAL loads the boot kernel it stashes the OPAL base and entry
* address in r8 and r9 so the kernel can use the OPAL console
* before unflattening the devicetree. While executing the wrapper will
* probably trash r8 and r9 so this kentry hook restores them before
* entering the decompressed kernel.
*/
platform_ops.kentry = opal_kentry;
return 0; return 0;
} }
......
...@@ -30,6 +30,7 @@ struct platform_ops { ...@@ -30,6 +30,7 @@ struct platform_ops {
void * (*realloc)(void *ptr, unsigned long size); void * (*realloc)(void *ptr, unsigned long size);
void (*exit)(void); void (*exit)(void);
void * (*vmlinux_alloc)(unsigned long size); void * (*vmlinux_alloc)(unsigned long size);
void (*kentry)(unsigned long fdt_addr, void *vmlinux_addr);
}; };
extern struct platform_ops platform_ops; extern struct platform_ops platform_ops;
......
...@@ -14,6 +14,10 @@ ...@@ -14,6 +14,10 @@
#include <linux/threads.h> #include <linux/threads.h>
#include <linux/kprobes.h> #include <linux/kprobes.h>
#include <asm/cacheflush.h>
#include <asm/checksum.h>
#include <asm/uaccess.h>
#include <asm/epapr_hcalls.h>
#include <uapi/asm/ucontext.h> #include <uapi/asm/ucontext.h>
...@@ -109,4 +113,12 @@ void early_setup_secondary(void); ...@@ -109,4 +113,12 @@ void early_setup_secondary(void);
/* time */ /* time */
void accumulate_stolen_time(void); void accumulate_stolen_time(void);
/* misc runtime */
extern u64 __bswapdi2(u64);
extern s64 __lshrdi3(s64, int);
extern s64 __ashldi3(s64, int);
extern s64 __ashrdi3(s64, int);
extern int __cmpdi2(s64, s64);
extern int __ucmpdi2(u64, u64);
#endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */ #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
...@@ -28,6 +28,12 @@ ...@@ -28,6 +28,12 @@
* Individual features below. * Individual features below.
*/ */
/*
* Kernel read only support.
* We added the ppp value 0b110 in ISA 2.04.
*/
#define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000)
/* /*
* We need to clear top 16bits of va (from the remaining 64 bits )in * We need to clear top 16bits of va (from the remaining 64 bits )in
* tlbie* instructions * tlbie* instructions
...@@ -103,10 +109,10 @@ ...@@ -103,10 +109,10 @@
#define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2 #define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2
#define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA #define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA
#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ #define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
MMU_FTR_CI_LARGE_PAGE MMU_FTR_CI_LARGE_PAGE
#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
......
...@@ -355,6 +355,7 @@ ...@@ -355,6 +355,7 @@
#define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */
#define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */
#define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */
#define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */
#define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */
#define LPCR_MER_SH 11 #define LPCR_MER_SH 11
#define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */
......
...@@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9) ...@@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9)
li r0,0 li r0,0
mtspr SPRN_LPID,r0 mtspr SPRN_LPID,r0
mfspr r3,SPRN_LPCR mfspr r3,SPRN_LPCR
ori r3, r3, LPCR_PECEDH LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
ori r3, r3, LPCR_HVICE or r3, r3, r4
bl __init_LPCR bl __init_LPCR
bl __init_HFSCR bl __init_HFSCR
bl __init_tlb_power9 bl __init_tlb_power9
...@@ -118,8 +118,8 @@ _GLOBAL(__restore_cpu_power9) ...@@ -118,8 +118,8 @@ _GLOBAL(__restore_cpu_power9)
li r0,0 li r0,0
mtspr SPRN_LPID,r0 mtspr SPRN_LPID,r0
mfspr r3,SPRN_LPCR mfspr r3,SPRN_LPCR
ori r3, r3, LPCR_PECEDH LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
ori r3, r3, LPCR_HVICE or r3, r3, r4
bl __init_LPCR bl __init_LPCR
bl __init_HFSCR bl __init_HFSCR
bl __init_tlb_power9 bl __init_tlb_power9
......
...@@ -193,8 +193,12 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags) ...@@ -193,8 +193,12 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags)
/* /*
* Kernel read only mapped with ppp bits 0b110 * Kernel read only mapped with ppp bits 0b110
*/ */
if (!(pteflags & _PAGE_WRITE)) if (!(pteflags & _PAGE_WRITE)) {
if (mmu_has_feature(MMU_FTR_KERNEL_RO))
rflags |= (HPTE_R_PP0 | 0x2); rflags |= (HPTE_R_PP0 | 0x2);
else
rflags |= 0x3;
}
} else { } else {
if (pteflags & _PAGE_RWX) if (pteflags & _PAGE_RWX)
rflags |= 0x2; rflags |= 0x2;
......
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