[PATCH] rivafb: directcolor mode and miscellaneous fixes

Although the rivafb advertises its capability as DirectColor, the hardware
is actually set in Truecolor (CLUT cannot be altered).  This mismatch
occasionally produces wrong colors, such as wrong logo colors at 32bpp and
gamma utilities (such as xgamma) does not work at all.

Changes:

1. Fixes the above problems by setting the hardware to accept changing
   of the CLUT.

2. Fixes color problems for NV_ARCH_03 (Riva128)

3. Build a private modelist from the EDID (for use by fbcon)

4. Mark several functions/data as __devinit/__initdata

5. Remove unused fields from struct riva_par 
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

drivers/video/riva/riva_hw.c

@@ -1300,8 +1300,9 @@ static void CalcStateExt
     }
 
      /* Paul Richards: below if block borks things in kernel for some reason */
-    /* if((bpp != 8) && (chip->Architecture != NV_ARCH_03))
-    state->general |= 0x00000030; */
+     /* Tony: Below is needed to set hardware in DirectColor */
+    if((bpp != 8) && (chip->Architecture != NV_ARCH_03))
+	    state->general |= 0x00000030;
 
     state->vpll     = (p << 16) | (n << 8) | m;
     state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3;

drivers/video/riva/rivafb-i2c.c

@@ -105,8 +105,9 @@ static int riva_setup_i2c_bus(struct riva_i2c_chan *chan, const char *name)
 	chan->algo.setscl		= riva_gpio_setscl;
 	chan->algo.getsda		= riva_gpio_getsda;
 	chan->algo.getscl		= riva_gpio_getscl;
-	chan->algo.udelay		= 40;
-	chan->algo.timeout		= 20;
+	chan->algo.udelay		= 5;
+	chan->algo.mdelay               = 5;
+	chan->algo.timeout		= 10;
 	chan->algo.data 		= chan;
 
 	i2c_set_adapdata(&chan->adapter, chan);

drivers/video/riva/rivafb.h

@@ -44,7 +44,8 @@ struct riva_i2c_chan {
 
 struct riva_par {
 	RIVA_HW_INST riva;	/* interface to riva_hw.c */
-
+	u32 pseudo_palette[16]; /* default palette */
+	u32 palette[16];        /* for Riva128 */
 	caddr_t ctrl_base;	/* virtual control register base addr */
 	unsigned dclk_max;	/* max DCLK */
 
@@ -54,8 +55,6 @@ struct riva_par {
 	struct vgastate state;
 #endif
 	atomic_t ref_count;
-	u32 cursor_data[32 * 32/4];
-	int cursor_reset;
 	unsigned char *EDID;
 	unsigned int Chipset;
 	int forceCRTC;