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Commit 3c4d35cc authored by Mark Brown's avatar Mark Brown
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Merge remote-tracking branches 'asoc/topic/wm8978', 'asoc/topic/wm8983',... 

Merge remote-tracking branches 'asoc/topic/wm8978', 'asoc/topic/wm8983', 'asoc/topic/wm8985', 'asoc/topic/wm8988' and 'asoc/topic/wm8990' into asoc-next
parents 0d1b2881 98020a71 e3a68fd8 cbc23b74 ab38ff38 51bef5c6
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Showing with 405 additions and 457 deletions
sound/soc/codecs/wm8978.c
View file @ 3c4d35cc
......@@ -408,7 +408,7 @@ struct wm8978_pll_div {
#define FIXED_PLL_SIZE (1 << 24)
static void pll_factors(struct snd_soc_codec *codec,
static void pll_factors(struct snd_soc_component *component,
struct wm8978_pll_div *pll_div, unsigned int target, unsigned int source)
{
u64 k_part;
......@@ -424,7 +424,7 @@ static void pll_factors(struct snd_soc_codec *codec,
}
if (n_div < 6 || n_div > 12)
dev_warn(codec->dev,
dev_warn(component->dev,
"WM8978 N value exceeds recommended range! N = %u\n",
n_div);
......@@ -471,9 +471,9 @@ static int wm8978_enum_mclk(unsigned int f_out, unsigned int f_mclk,
* Calculate internal frequencies and dividers, according to Figure 40
* "PLL and Clock Select Circuit" in WM8978 datasheet Rev. 2.6
*/
static int wm8978_configure_pll(struct snd_soc_codec *codec)
static int wm8978_configure_pll(struct snd_soc_component *component)
{
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
struct wm8978_pll_div pll_div;
unsigned int f_opclk = wm8978->f_opclk, f_mclk = wm8978->f_mclk,
f_256fs = wm8978->f_256fs;
......@@ -505,9 +505,9 @@ static int wm8978_configure_pll(struct snd_soc_codec *codec)
else
opclk_div = 1;
dev_dbg(codec->dev, "%s: OPCLKDIV=%d\n", __func__, opclk_div);
dev_dbg(component->dev, "%s: OPCLKDIV=%d\n", __func__, opclk_div);
snd_soc_update_bits(codec, WM8978_GPIO_CONTROL, 0x30,
snd_soc_component_update_bits(component, WM8978_GPIO_CONTROL, 0x30,
(opclk_div - 1) << 4);
wm8978->f_pllout = f_opclk * opclk_div;
......@@ -533,28 +533,28 @@ static int wm8978_configure_pll(struct snd_soc_codec *codec)
f2 = wm8978->f_pllout * 4;
dev_dbg(codec->dev, "%s: f_MCLK=%uHz, f_PLLOUT=%uHz\n", __func__,
dev_dbg(component->dev, "%s: f_MCLK=%uHz, f_PLLOUT=%uHz\n", __func__,
wm8978->f_mclk, wm8978->f_pllout);
pll_factors(codec, &pll_div, f2, wm8978->f_mclk);
pll_factors(component, &pll_div, f2, wm8978->f_mclk);
dev_dbg(codec->dev, "%s: calculated PLL N=0x%x, K=0x%x, div2=%d\n",
dev_dbg(component->dev, "%s: calculated PLL N=0x%x, K=0x%x, div2=%d\n",
__func__, pll_div.n, pll_div.k, pll_div.div2);
/* Turn PLL off for configuration... */
snd_soc_update_bits(codec, WM8978_POWER_MANAGEMENT_1, 0x20, 0);
snd_soc_component_update_bits(component, WM8978_POWER_MANAGEMENT_1, 0x20, 0);
snd_soc_write(codec, WM8978_PLL_N, (pll_div.div2 << 4) | pll_div.n);
snd_soc_write(codec, WM8978_PLL_K1, pll_div.k >> 18);
snd_soc_write(codec, WM8978_PLL_K2, (pll_div.k >> 9) & 0x1ff);
snd_soc_write(codec, WM8978_PLL_K3, pll_div.k & 0x1ff);
snd_soc_component_write(component, WM8978_PLL_N, (pll_div.div2 << 4) | pll_div.n);
snd_soc_component_write(component, WM8978_PLL_K1, pll_div.k >> 18);
snd_soc_component_write(component, WM8978_PLL_K2, (pll_div.k >> 9) & 0x1ff);
snd_soc_component_write(component, WM8978_PLL_K3, pll_div.k & 0x1ff);
/* ...and on again */
snd_soc_update_bits(codec, WM8978_POWER_MANAGEMENT_1, 0x20, 0x20);
snd_soc_component_update_bits(component, WM8978_POWER_MANAGEMENT_1, 0x20, 0x20);
if (f_opclk)
/* Output PLL (OPCLK) to GPIO1 */
snd_soc_update_bits(codec, WM8978_GPIO_CONTROL, 7, 4);
snd_soc_component_update_bits(component, WM8978_GPIO_CONTROL, 7, 4);
return 0;
}
......@@ -565,8 +565,8 @@ static int wm8978_configure_pll(struct snd_soc_codec *codec)
static int wm8978_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
int div_id, int div)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
int ret = 0;
switch (div_id) {
......@@ -588,18 +588,18 @@ static int wm8978_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
* find an exact MCLK divider configuration - it will
* be equal to or double the OPCLK divisor.
*/
ret = wm8978_configure_pll(codec);
ret = wm8978_configure_pll(component);
break;
case WM8978_BCLKDIV:
if (div & ~0x1c)
return -EINVAL;
snd_soc_update_bits(codec, WM8978_CLOCKING, 0x1c, div);
snd_soc_component_update_bits(component, WM8978_CLOCKING, 0x1c, div);
break;
default:
return -EINVAL;
}
dev_dbg(codec->dev, "%s: ID %d, value %u\n", __func__, div_id, div);
dev_dbg(component->dev, "%s: ID %d, value %u\n", __func__, div_id, div);
return ret;
}
......@@ -610,18 +610,18 @@ static int wm8978_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
static int wm8978_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
int ret = 0;
dev_dbg(codec->dev, "%s: ID %d, freq %u\n", __func__, clk_id, freq);
dev_dbg(component->dev, "%s: ID %d, freq %u\n", __func__, clk_id, freq);
if (freq) {
wm8978->f_mclk = freq;
/* Even if MCLK is used for system clock, might have to drive OPCLK */
if (wm8978->f_opclk)
ret = wm8978_configure_pll(codec);
ret = wm8978_configure_pll(component);
/* Our sysclk is fixed to 256 * fs, will configure in .hw_params() */
......@@ -631,13 +631,13 @@ static int wm8978_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
if (wm8978->sysclk == WM8978_PLL && (!freq || clk_id == WM8978_MCLK)) {
/* Clock CODEC directly from MCLK */
snd_soc_update_bits(codec, WM8978_CLOCKING, 0x100, 0);
snd_soc_component_update_bits(component, WM8978_CLOCKING, 0x100, 0);
/* GPIO1 into default mode as input - before configuring PLL */
snd_soc_update_bits(codec, WM8978_GPIO_CONTROL, 7, 0);
snd_soc_component_update_bits(component, WM8978_GPIO_CONTROL, 7, 0);
/* Turn off PLL */
snd_soc_update_bits(codec, WM8978_POWER_MANAGEMENT_1, 0x20, 0);
snd_soc_component_update_bits(component, WM8978_POWER_MANAGEMENT_1, 0x20, 0);
wm8978->sysclk = WM8978_MCLK;
wm8978->f_pllout = 0;
wm8978->f_opclk = 0;
......@@ -651,15 +651,15 @@ static int wm8978_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
*/
static int wm8978_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
/*
* BCLK polarity mask = 0x100, LRC clock polarity mask = 0x80,
* Data Format mask = 0x18: all will be calculated anew
*/
u16 iface = snd_soc_read(codec, WM8978_AUDIO_INTERFACE) & ~0x198;
u16 clk = snd_soc_read(codec, WM8978_CLOCKING);
u16 iface = snd_soc_component_read32(component, WM8978_AUDIO_INTERFACE) & ~0x198;
u16 clk = snd_soc_component_read32(component, WM8978_CLOCKING);
dev_dbg(codec->dev, "%s\n", __func__);
dev_dbg(component->dev, "%s\n", __func__);
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
......@@ -707,8 +707,8 @@ static int wm8978_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_write(codec, WM8978_AUDIO_INTERFACE, iface);
snd_soc_write(codec, WM8978_CLOCKING, clk);
snd_soc_component_write(component, WM8978_AUDIO_INTERFACE, iface);
snd_soc_component_write(component, WM8978_CLOCKING, clk);
return 0;
}
......@@ -720,13 +720,13 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
/* Word length mask = 0x60 */
u16 iface_ctl = snd_soc_read(codec, WM8978_AUDIO_INTERFACE) & ~0x60;
u16 iface_ctl = snd_soc_component_read32(component, WM8978_AUDIO_INTERFACE) & ~0x60;
/* Sampling rate mask = 0xe (for filters) */
u16 add_ctl = snd_soc_read(codec, WM8978_ADDITIONAL_CONTROL) & ~0xe;
u16 clking = snd_soc_read(codec, WM8978_CLOCKING);
u16 add_ctl = snd_soc_component_read32(component, WM8978_ADDITIONAL_CONTROL) & ~0xe;
u16 clking = snd_soc_component_read32(component, WM8978_CLOCKING);
enum wm8978_sysclk_src current_clk_id = clking & 0x100 ?
WM8978_PLL : WM8978_MCLK;
unsigned int f_sel, diff, diff_best = INT_MAX;
......@@ -781,7 +781,7 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream,
} else {
if (!wm8978->f_opclk) {
/* We only enter here, if OPCLK is not used */
int ret = wm8978_configure_pll(codec);
int ret = wm8978_configure_pll(component);
if (ret < 0)
return ret;
}
......@@ -812,28 +812,28 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream,
}
if (diff)
dev_warn(codec->dev, "Imprecise sampling rate: %uHz%s\n",
dev_warn(component->dev, "Imprecise sampling rate: %uHz%s\n",
f_sel * mclk_denominator[best] / mclk_numerator[best] / 256,
wm8978->sysclk == WM8978_MCLK ?
", consider using PLL" : "");
dev_dbg(codec->dev, "%s: width %d, rate %u, MCLK divisor #%d\n", __func__,
dev_dbg(component->dev, "%s: width %d, rate %u, MCLK divisor #%d\n", __func__,
params_width(params), params_rate(params), best);
/* MCLK divisor mask = 0xe0 */
snd_soc_update_bits(codec, WM8978_CLOCKING, 0xe0, best << 5);
snd_soc_component_update_bits(component, WM8978_CLOCKING, 0xe0, best << 5);
snd_soc_write(codec, WM8978_AUDIO_INTERFACE, iface_ctl);
snd_soc_write(codec, WM8978_ADDITIONAL_CONTROL, add_ctl);
snd_soc_component_write(component, WM8978_AUDIO_INTERFACE, iface_ctl);
snd_soc_component_write(component, WM8978_ADDITIONAL_CONTROL, add_ctl);
if (wm8978->sysclk != current_clk_id) {
if (wm8978->sysclk == WM8978_PLL)
/* Run CODEC from PLL instead of MCLK */
snd_soc_update_bits(codec, WM8978_CLOCKING,
snd_soc_component_update_bits(component, WM8978_CLOCKING,
0x100, 0x100);
else
/* Clock CODEC directly from MCLK */
snd_soc_update_bits(codec, WM8978_CLOCKING, 0x100, 0);
snd_soc_component_update_bits(component, WM8978_CLOCKING, 0x100, 0);
}
return 0;
......@@ -841,52 +841,52 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream,
static int wm8978_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
dev_dbg(codec->dev, "%s: %d\n", __func__, mute);
dev_dbg(component->dev, "%s: %d\n", __func__, mute);
if (mute)
snd_soc_update_bits(codec, WM8978_DAC_CONTROL, 0x40, 0x40);
snd_soc_component_update_bits(component, WM8978_DAC_CONTROL, 0x40, 0x40);
else
snd_soc_update_bits(codec, WM8978_DAC_CONTROL, 0x40, 0);
snd_soc_component_update_bits(component, WM8978_DAC_CONTROL, 0x40, 0);
return 0;
}
static int wm8978_set_bias_level(struct snd_soc_codec *codec,
static int wm8978_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
u16 power1 = snd_soc_read(codec, WM8978_POWER_MANAGEMENT_1) & ~3;
u16 power1 = snd_soc_component_read32(component, WM8978_POWER_MANAGEMENT_1) & ~3;
switch (level) {
case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE:
power1 |= 1; /* VMID 75k */
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_1, power1);
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_1, power1);
break;
case SND_SOC_BIAS_STANDBY:
/* bit 3: enable bias, bit 2: enable I/O tie off buffer */
power1 |= 0xc;
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
/* Initial cap charge at VMID 5k */
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_1,
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_1,
power1 | 0x3);
mdelay(100);
}
power1 |= 0x2; /* VMID 500k */
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_1, power1);
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_1, power1);
break;
case SND_SOC_BIAS_OFF:
/* Preserve PLL - OPCLK may be used by someone */
snd_soc_update_bits(codec, WM8978_POWER_MANAGEMENT_1, ~0x20, 0);
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_2, 0);
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_3, 0);
snd_soc_component_update_bits(component, WM8978_POWER_MANAGEMENT_1, ~0x20, 0);
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_2, 0);
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_3, 0);
break;
}
dev_dbg(codec->dev, "%s: %d, %x\n", __func__, level, power1);
dev_dbg(component->dev, "%s: %d, %x\n", __func__, level, power1);
return 0;
}
......@@ -923,31 +923,31 @@ static struct snd_soc_dai_driver wm8978_dai = {
.symmetric_rates = 1,
};
static int wm8978_suspend(struct snd_soc_codec *codec)
static int wm8978_suspend(struct snd_soc_component *component)
{
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
/* Also switch PLL off */
snd_soc_write(codec, WM8978_POWER_MANAGEMENT_1, 0);
snd_soc_component_write(component, WM8978_POWER_MANAGEMENT_1, 0);
regcache_mark_dirty(wm8978->regmap);
return 0;
}
static int wm8978_resume(struct snd_soc_codec *codec)
static int wm8978_resume(struct snd_soc_component *component)
{
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
/* Sync reg_cache with the hardware */
regcache_sync(wm8978->regmap);
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
if (wm8978->f_pllout)
/* Switch PLL on */
snd_soc_update_bits(codec, WM8978_POWER_MANAGEMENT_1, 0x20, 0x20);
snd_soc_component_update_bits(component, WM8978_POWER_MANAGEMENT_1, 0x20, 0x20);
return 0;
}
......@@ -971,9 +971,9 @@ static const int update_reg[] = {
WM8978_ROUT2_SPK_CONTROL,
};
static int wm8978_probe(struct snd_soc_codec *codec)
static int wm8978_probe(struct snd_soc_component *component)
{
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
struct wm8978_priv *wm8978 = snd_soc_component_get_drvdata(component);
int i;
/*
......@@ -988,25 +988,26 @@ static int wm8978_probe(struct snd_soc_codec *codec)
* written.
*/
for (i = 0; i < ARRAY_SIZE(update_reg); i++)
snd_soc_update_bits(codec, update_reg[i], 0x100, 0x100);
snd_soc_component_update_bits(component, update_reg[i], 0x100, 0x100);
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_wm8978 = {
static const struct snd_soc_component_driver soc_component_dev_wm8978 = {
.probe = wm8978_probe,
.suspend = wm8978_suspend,
.resume = wm8978_resume,
.set_bias_level = wm8978_set_bias_level,
.component_driver = {
.controls = wm8978_snd_controls,
.num_controls = ARRAY_SIZE(wm8978_snd_controls),
.dapm_widgets = wm8978_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8978_dapm_widgets),
.dapm_routes = wm8978_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8978_dapm_routes),
},
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8978_regmap_config = {
......@@ -1048,8 +1049,8 @@ static int wm8978_i2c_probe(struct i2c_client *i2c,
return ret;
}
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8978, &wm8978_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_wm8978, &wm8978_dai, 1);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
return ret;
......@@ -1058,13 +1059,6 @@ static int wm8978_i2c_probe(struct i2c_client *i2c,
return 0;
}
static int wm8978_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
}
static const struct i2c_device_id wm8978_i2c_id[] = {
{ "wm8978", 0 },
{ }
......@@ -1083,7 +1077,6 @@ static struct i2c_driver wm8978_i2c_driver = {
.of_match_table = wm8978_of_match,
},
.probe = wm8978_i2c_probe,
.remove = wm8978_i2c_remove,
.id_table = wm8978_i2c_id,
};
......
sound/soc/codecs/wm8983.c
View file @ 3c4d35cc
......@@ -492,10 +492,10 @@ static const struct snd_soc_dapm_route wm8983_audio_map[] = {
static int eqmode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
unsigned int reg;
reg = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF);
reg = snd_soc_component_read32(component, WM8983_EQ1_LOW_SHELF);
if (reg & WM8983_EQ3DMODE)
ucontrol->value.enumerated.item[0] = 1;
else
......@@ -507,7 +507,7 @@ static int eqmode_get(struct snd_kcontrol *kcontrol,
static int eqmode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
unsigned int regpwr2, regpwr3;
unsigned int reg_eq;
......@@ -515,7 +515,7 @@ static int eqmode_put(struct snd_kcontrol *kcontrol,
&& ucontrol->value.enumerated.item[0] != 1)
return -EINVAL;
reg_eq = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF);
reg_eq = snd_soc_component_read32(component, WM8983_EQ1_LOW_SHELF);
switch ((reg_eq & WM8983_EQ3DMODE) >> WM8983_EQ3DMODE_SHIFT) {
case 0:
if (!ucontrol->value.enumerated.item[0])
......@@ -527,21 +527,21 @@ static int eqmode_put(struct snd_kcontrol *kcontrol,
break;
}
regpwr2 = snd_soc_read(codec, WM8983_POWER_MANAGEMENT_2);
regpwr3 = snd_soc_read(codec, WM8983_POWER_MANAGEMENT_3);
regpwr2 = snd_soc_component_read32(component, WM8983_POWER_MANAGEMENT_2);
regpwr3 = snd_soc_component_read32(component, WM8983_POWER_MANAGEMENT_3);
/* disable the DACs and ADCs */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_2,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_2,
WM8983_ADCENR_MASK | WM8983_ADCENL_MASK, 0);
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_3,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_3,
WM8983_DACENR_MASK | WM8983_DACENL_MASK, 0);
/* set the desired eqmode */
snd_soc_update_bits(codec, WM8983_EQ1_LOW_SHELF,
snd_soc_component_update_bits(component, WM8983_EQ1_LOW_SHELF,
WM8983_EQ3DMODE_MASK,
ucontrol->value.enumerated.item[0]
<< WM8983_EQ3DMODE_SHIFT);
/* restore DAC/ADC configuration */
snd_soc_write(codec, WM8983_POWER_MANAGEMENT_2, regpwr2);
snd_soc_write(codec, WM8983_POWER_MANAGEMENT_3, regpwr3);
snd_soc_component_write(component, WM8983_POWER_MANAGEMENT_2, regpwr2);
snd_soc_component_write(component, WM8983_POWER_MANAGEMENT_3, regpwr3);
return 0;
}
......@@ -562,16 +562,16 @@ static bool wm8983_writeable(struct device *dev, unsigned int reg)
static int wm8983_dac_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
return snd_soc_update_bits(codec, WM8983_DAC_CONTROL,
return snd_soc_component_update_bits(component, WM8983_DAC_CONTROL,
WM8983_SOFTMUTE_MASK,
!!mute << WM8983_SOFTMUTE_SHIFT);
}
static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
u16 format, master, bcp, lrp;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
......@@ -593,7 +593,7 @@ static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8983_AUDIO_INTERFACE,
WM8983_FMT_MASK, format << WM8983_FMT_SHIFT);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
......@@ -608,7 +608,7 @@ static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8983_CLOCK_GEN_CONTROL,
WM8983_MS_MASK, master << WM8983_MS_SHIFT);
/* FIXME: We don't currently support DSP A/B modes */
......@@ -639,9 +639,9 @@ static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8983_AUDIO_INTERFACE,
WM8983_LRCP_MASK, lrp << WM8983_LRCP_SHIFT);
snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8983_AUDIO_INTERFACE,
WM8983_BCP_MASK, bcp << WM8983_BCP_SHIFT);
return 0;
}
......@@ -651,8 +651,8 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
int i;
struct snd_soc_codec *codec = dai->codec;
struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct wm8983_priv *wm8983 = snd_soc_component_get_drvdata(component);
u16 blen, srate_idx;
u32 tmp;
int srate_best;
......@@ -660,7 +660,7 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
ret = snd_soc_params_to_bclk(params);
if (ret < 0) {
dev_err(codec->dev, "Failed to convert params to bclk: %d\n", ret);
dev_err(component->dev, "Failed to convert params to bclk: %d\n", ret);
return ret;
}
......@@ -685,7 +685,7 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8983_AUDIO_INTERFACE,
WM8983_WL_MASK, blen << WM8983_WL_SHIFT);
/*
......@@ -702,7 +702,7 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "Selected SRATE = %d\n", srates[srate_idx]);
snd_soc_update_bits(codec, WM8983_ADDITIONAL_CONTROL,
snd_soc_component_update_bits(component, WM8983_ADDITIONAL_CONTROL,
WM8983_SR_MASK, srate_idx << WM8983_SR_SHIFT);
dev_dbg(dai->dev, "Target BCLK = %uHz\n", wm8983->bclk);
......@@ -721,7 +721,7 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "MCLK ratio = %dfs\n", fs_ratios[i].ratio);
snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8983_CLOCK_GEN_CONTROL,
WM8983_MCLKDIV_MASK, i << WM8983_MCLKDIV_SHIFT);
/* select the appropriate bclk divider */
......@@ -737,7 +737,7 @@ static int wm8983_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "BCLK div = %d\n", i);
snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8983_CLOCK_GEN_CONTROL,
WM8983_BCLKDIV_MASK, i << WM8983_BCLKDIV_SHIFT);
return 0;
......@@ -789,13 +789,13 @@ static int wm8983_set_pll(struct snd_soc_dai *dai, int pll_id,
unsigned int freq_out)
{
int ret;
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct pll_div pll_div;
codec = dai->codec;
component = dai->component;
if (!freq_in || !freq_out) {
/* disable the PLL */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_PLLEN_MASK, 0);
return 0;
} else {
......@@ -804,19 +804,19 @@ static int wm8983_set_pll(struct snd_soc_dai *dai, int pll_id,
return ret;
/* disable the PLL before re-programming it */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_PLLEN_MASK, 0);
/* set PLLN and PRESCALE */
snd_soc_write(codec, WM8983_PLL_N,
snd_soc_component_write(component, WM8983_PLL_N,
(pll_div.div2 << WM8983_PLL_PRESCALE_SHIFT)
| pll_div.n);
/* set PLLK */
snd_soc_write(codec, WM8983_PLL_K_3, pll_div.k & 0x1ff);
snd_soc_write(codec, WM8983_PLL_K_2, (pll_div.k >> 9) & 0x1ff);
snd_soc_write(codec, WM8983_PLL_K_1, (pll_div.k >> 18));
snd_soc_component_write(component, WM8983_PLL_K_3, pll_div.k & 0x1ff);
snd_soc_component_write(component, WM8983_PLL_K_2, (pll_div.k >> 9) & 0x1ff);
snd_soc_component_write(component, WM8983_PLL_K_1, (pll_div.k >> 18));
/* enable the PLL */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_PLLEN_MASK, WM8983_PLLEN);
}
......@@ -826,16 +826,16 @@ static int wm8983_set_pll(struct snd_soc_dai *dai, int pll_id,
static int wm8983_set_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct wm8983_priv *wm8983 = snd_soc_component_get_drvdata(component);
switch (clk_id) {
case WM8983_CLKSRC_MCLK:
snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8983_CLOCK_GEN_CONTROL,
WM8983_CLKSEL_MASK, 0);
break;
case WM8983_CLKSRC_PLL:
snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8983_CLOCK_GEN_CONTROL,
WM8983_CLKSEL_MASK, WM8983_CLKSEL);
break;
default:
......@@ -847,100 +847,100 @@ static int wm8983_set_sysclk(struct snd_soc_dai *dai,
return 0;
}
static int wm8983_set_bias_level(struct snd_soc_codec *codec,
static int wm8983_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec);
struct wm8983_priv *wm8983 = snd_soc_component_get_drvdata(component);
int ret;
switch (level) {
case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE:
/* VMID at 100k */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_VMIDSEL_MASK,
1 << WM8983_VMIDSEL_SHIFT);
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
ret = regcache_sync(wm8983->regmap);
if (ret < 0) {
dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
dev_err(component->dev, "Failed to sync cache: %d\n", ret);
return ret;
}
/* enable anti-pop features */
snd_soc_update_bits(codec, WM8983_OUT4_TO_ADC,
snd_soc_component_update_bits(component, WM8983_OUT4_TO_ADC,
WM8983_POBCTRL_MASK | WM8983_DELEN_MASK,
WM8983_POBCTRL | WM8983_DELEN);
/* enable thermal shutdown */
snd_soc_update_bits(codec, WM8983_OUTPUT_CTRL,
snd_soc_component_update_bits(component, WM8983_OUTPUT_CTRL,
WM8983_TSDEN_MASK, WM8983_TSDEN);
/* enable BIASEN */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_BIASEN_MASK, WM8983_BIASEN);
/* VMID at 100k */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_VMIDSEL_MASK,
1 << WM8983_VMIDSEL_SHIFT);
msleep(250);
/* disable anti-pop features */
snd_soc_update_bits(codec, WM8983_OUT4_TO_ADC,
snd_soc_component_update_bits(component, WM8983_OUT4_TO_ADC,
WM8983_POBCTRL_MASK |
WM8983_DELEN_MASK, 0);
}
/* VMID at 500k */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_VMIDSEL_MASK,
2 << WM8983_VMIDSEL_SHIFT);
break;
case SND_SOC_BIAS_OFF:
/* disable thermal shutdown */
snd_soc_update_bits(codec, WM8983_OUTPUT_CTRL,
snd_soc_component_update_bits(component, WM8983_OUTPUT_CTRL,
WM8983_TSDEN_MASK, 0);
/* disable VMIDSEL and BIASEN */
snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8983_POWER_MANAGEMENT_1,
WM8983_VMIDSEL_MASK | WM8983_BIASEN_MASK,
0);
/* wait for VMID to discharge */
msleep(100);
snd_soc_write(codec, WM8983_POWER_MANAGEMENT_1, 0);
snd_soc_write(codec, WM8983_POWER_MANAGEMENT_2, 0);
snd_soc_write(codec, WM8983_POWER_MANAGEMENT_3, 0);
snd_soc_component_write(component, WM8983_POWER_MANAGEMENT_1, 0);
snd_soc_component_write(component, WM8983_POWER_MANAGEMENT_2, 0);
snd_soc_component_write(component, WM8983_POWER_MANAGEMENT_3, 0);
break;
}
return 0;
}
static int wm8983_probe(struct snd_soc_codec *codec)
static int wm8983_probe(struct snd_soc_component *component)
{
int ret;
int i;
ret = snd_soc_write(codec, WM8983_SOFTWARE_RESET, 0);
ret = snd_soc_component_write(component, WM8983_SOFTWARE_RESET, 0);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
dev_err(component->dev, "Failed to issue reset: %d\n", ret);
return ret;
}
/* set the vol/gain update bits */
for (i = 0; i < ARRAY_SIZE(vol_update_regs); ++i)
snd_soc_update_bits(codec, vol_update_regs[i],
snd_soc_component_update_bits(component, vol_update_regs[i],
0x100, 0x100);
/* mute all outputs and set PGAs to minimum gain */
for (i = WM8983_LOUT1_HP_VOLUME_CTRL;
i <= WM8983_OUT4_MONO_MIX_CTRL; ++i)
snd_soc_update_bits(codec, i, 0x40, 0x40);
snd_soc_component_update_bits(component, i, 0x40, 0x40);
/* enable soft mute */
snd_soc_update_bits(codec, WM8983_DAC_CONTROL,
snd_soc_component_update_bits(component, WM8983_DAC_CONTROL,
WM8983_SOFTMUTE_MASK,
WM8983_SOFTMUTE);
/* enable BIASCUT */
snd_soc_update_bits(codec, WM8983_BIAS_CTRL,
snd_soc_component_update_bits(component, WM8983_BIAS_CTRL,
WM8983_BIASCUT, WM8983_BIASCUT);
return 0;
}
......@@ -976,18 +976,20 @@ static struct snd_soc_dai_driver wm8983_dai = {
.symmetric_rates = 1
};
static const struct snd_soc_codec_driver soc_codec_dev_wm8983 = {
static const struct snd_soc_component_driver soc_component_dev_wm8983 = {
.probe = wm8983_probe,
.set_bias_level = wm8983_set_bias_level,
.suspend_bias_off = true,
.component_driver = {
.controls = wm8983_snd_controls,
.num_controls = ARRAY_SIZE(wm8983_snd_controls),
.dapm_widgets = wm8983_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8983_dapm_widgets),
.dapm_routes = wm8983_audio_map,
.num_dapm_routes = ARRAY_SIZE(wm8983_audio_map),
},
.suspend_bias_off = 1,
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8983_regmap = {
......@@ -1021,23 +1023,16 @@ static int wm8983_spi_probe(struct spi_device *spi)
spi_set_drvdata(spi, wm8983);
ret = snd_soc_register_codec(&spi->dev,
&soc_codec_dev_wm8983, &wm8983_dai, 1);
ret = devm_snd_soc_register_component(&spi->dev,
&soc_component_dev_wm8983, &wm8983_dai, 1);
return ret;
}
static int wm8983_spi_remove(struct spi_device *spi)
{
snd_soc_unregister_codec(&spi->dev);
return 0;
}
static struct spi_driver wm8983_spi_driver = {
.driver = {
.name = "wm8983",
},
.probe = wm8983_spi_probe,
.remove = wm8983_spi_remove
};
#endif
......@@ -1061,18 +1056,12 @@ static int wm8983_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8983);
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8983, &wm8983_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_wm8983, &wm8983_dai, 1);
return ret;
}
static int wm8983_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
}
static const struct i2c_device_id wm8983_i2c_id[] = {
{ "wm8983", 0 },
{ }
......@@ -1084,7 +1073,6 @@ static struct i2c_driver wm8983_i2c_driver = {
.name = "wm8983",
},
.probe = wm8983_i2c_probe,
.remove = wm8983_i2c_remove,
.id_table = wm8983_i2c_id
};
#endif
......
sound/soc/codecs/wm8985.c
View file @ 3c4d35cc
......@@ -564,10 +564,10 @@ static const struct snd_soc_dapm_route wm8985_aux_dapm_routes[] = {
{ "Left Boost Mixer", "AUXL Volume", "AUXL" },
};
static int wm8985_add_widgets(struct snd_soc_codec *codec)
static int wm8985_add_widgets(struct snd_soc_component *component)
{
struct wm8985_priv *wm8985 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct wm8985_priv *wm8985 = snd_soc_component_get_drvdata(component);
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
switch (wm8985->dev_type) {
case WM8758:
......@@ -576,7 +576,7 @@ static int wm8985_add_widgets(struct snd_soc_codec *codec)
break;
case WM8985:
snd_soc_add_codec_controls(codec, wm8985_specific_snd_controls,
snd_soc_add_component_controls(component, wm8985_specific_snd_controls,
ARRAY_SIZE(wm8985_specific_snd_controls));
snd_soc_dapm_new_controls(dapm, wm8985_dapm_widgets,
......@@ -592,10 +592,10 @@ static int wm8985_add_widgets(struct snd_soc_codec *codec)
static int eqmode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
unsigned int reg;
reg = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF);
reg = snd_soc_component_read32(component, WM8985_EQ1_LOW_SHELF);
if (reg & WM8985_EQ3DMODE)
ucontrol->value.enumerated.item[0] = 1;
else
......@@ -607,7 +607,7 @@ static int eqmode_get(struct snd_kcontrol *kcontrol,
static int eqmode_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
unsigned int regpwr2, regpwr3;
unsigned int reg_eq;
......@@ -615,7 +615,7 @@ static int eqmode_put(struct snd_kcontrol *kcontrol,
&& ucontrol->value.enumerated.item[0] != 1)
return -EINVAL;
reg_eq = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF);
reg_eq = snd_soc_component_read32(component, WM8985_EQ1_LOW_SHELF);
switch ((reg_eq & WM8985_EQ3DMODE) >> WM8985_EQ3DMODE_SHIFT) {
case 0:
if (!ucontrol->value.enumerated.item[0])
......@@ -627,46 +627,46 @@ static int eqmode_put(struct snd_kcontrol *kcontrol,
break;
}
regpwr2 = snd_soc_read(codec, WM8985_POWER_MANAGEMENT_2);
regpwr3 = snd_soc_read(codec, WM8985_POWER_MANAGEMENT_3);
regpwr2 = snd_soc_component_read32(component, WM8985_POWER_MANAGEMENT_2);
regpwr3 = snd_soc_component_read32(component, WM8985_POWER_MANAGEMENT_3);
/* disable the DACs and ADCs */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_2,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_2,
WM8985_ADCENR_MASK | WM8985_ADCENL_MASK, 0);
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_3,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_3,
WM8985_DACENR_MASK | WM8985_DACENL_MASK, 0);
snd_soc_update_bits(codec, WM8985_ADDITIONAL_CONTROL,
snd_soc_component_update_bits(component, WM8985_ADDITIONAL_CONTROL,
WM8985_M128ENB_MASK, WM8985_M128ENB);
/* set the desired eqmode */
snd_soc_update_bits(codec, WM8985_EQ1_LOW_SHELF,
snd_soc_component_update_bits(component, WM8985_EQ1_LOW_SHELF,
WM8985_EQ3DMODE_MASK,
ucontrol->value.enumerated.item[0]
<< WM8985_EQ3DMODE_SHIFT);
/* restore DAC/ADC configuration */
snd_soc_write(codec, WM8985_POWER_MANAGEMENT_2, regpwr2);
snd_soc_write(codec, WM8985_POWER_MANAGEMENT_3, regpwr3);
snd_soc_component_write(component, WM8985_POWER_MANAGEMENT_2, regpwr2);
snd_soc_component_write(component, WM8985_POWER_MANAGEMENT_3, regpwr3);
return 0;
}
static int wm8985_reset(struct snd_soc_codec *codec)
static int wm8985_reset(struct snd_soc_component *component)
{
return snd_soc_write(codec, WM8985_SOFTWARE_RESET, 0x0);
return snd_soc_component_write(component, WM8985_SOFTWARE_RESET, 0x0);
}
static int wm8985_dac_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
return snd_soc_update_bits(codec, WM8985_DAC_CONTROL,
return snd_soc_component_update_bits(component, WM8985_DAC_CONTROL,
WM8985_SOFTMUTE_MASK,
!!mute << WM8985_SOFTMUTE_SHIFT);
}
static int wm8985_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_codec *codec;
struct snd_soc_component *component;
u16 format, master, bcp, lrp;
codec = dai->codec;
component = dai->component;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
......@@ -687,7 +687,7 @@ static int wm8985_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8985_AUDIO_INTERFACE,
WM8985_FMT_MASK, format << WM8985_FMT_SHIFT);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
......@@ -702,7 +702,7 @@ static int wm8985_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_MS_MASK, master << WM8985_MS_SHIFT);
/* frame inversion is not valid for dsp modes */
......@@ -739,9 +739,9 @@ static int wm8985_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8985_AUDIO_INTERFACE,
WM8985_LRP_MASK, lrp << WM8985_LRP_SHIFT);
snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8985_AUDIO_INTERFACE,
WM8985_BCP_MASK, bcp << WM8985_BCP_SHIFT);
return 0;
}
......@@ -751,14 +751,14 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
int i;
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct wm8985_priv *wm8985;
u16 blen, srate_idx;
unsigned int tmp;
int srate_best;
codec = dai->codec;
wm8985 = snd_soc_codec_get_drvdata(codec);
component = dai->component;
wm8985 = snd_soc_component_get_drvdata(component);
wm8985->bclk = snd_soc_params_to_bclk(params);
if ((int)wm8985->bclk < 0)
......@@ -783,7 +783,7 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE,
snd_soc_component_update_bits(component, WM8985_AUDIO_INTERFACE,
WM8985_WL_MASK, blen << WM8985_WL_SHIFT);
/*
......@@ -800,7 +800,7 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "Selected SRATE = %d\n", srates[srate_idx]);
snd_soc_update_bits(codec, WM8985_ADDITIONAL_CONTROL,
snd_soc_component_update_bits(component, WM8985_ADDITIONAL_CONTROL,
WM8985_SR_MASK, srate_idx << WM8985_SR_SHIFT);
dev_dbg(dai->dev, "Target BCLK = %uHz\n", wm8985->bclk);
......@@ -819,7 +819,7 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "MCLK ratio = %dfs\n", fs_ratios[i].ratio);
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_MCLKDIV_MASK, i << WM8985_MCLKDIV_SHIFT);
/* select the appropriate bclk divider */
......@@ -835,7 +835,7 @@ static int wm8985_hw_params(struct snd_pcm_substream *substream,
}
dev_dbg(dai->dev, "BCLK div = %d\n", i);
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_BCLKDIV_MASK, i << WM8985_BCLKDIV_SHIFT);
return 0;
}
......@@ -887,13 +887,13 @@ static int wm8985_set_pll(struct snd_soc_dai *dai, int pll_id,
unsigned int freq_out)
{
int ret;
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct pll_div pll_div;
codec = dai->codec;
component = dai->component;
if (!freq_in || !freq_out) {
/* disable the PLL */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_PLLEN_MASK, 0);
} else {
ret = pll_factors(&pll_div, freq_out * 4 * 2, freq_in);
......@@ -901,18 +901,18 @@ static int wm8985_set_pll(struct snd_soc_dai *dai, int pll_id,
return ret;
/* set PLLN and PRESCALE */
snd_soc_write(codec, WM8985_PLL_N,
snd_soc_component_write(component, WM8985_PLL_N,
(pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT)
| pll_div.n);
/* set PLLK */
snd_soc_write(codec, WM8985_PLL_K_3, pll_div.k & 0x1ff);
snd_soc_write(codec, WM8985_PLL_K_2, (pll_div.k >> 9) & 0x1ff);
snd_soc_write(codec, WM8985_PLL_K_1, (pll_div.k >> 18));
snd_soc_component_write(component, WM8985_PLL_K_3, pll_div.k & 0x1ff);
snd_soc_component_write(component, WM8985_PLL_K_2, (pll_div.k >> 9) & 0x1ff);
snd_soc_component_write(component, WM8985_PLL_K_1, (pll_div.k >> 18));
/* set the source of the clock to be the PLL */
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_CLKSEL_MASK, WM8985_CLKSEL);
/* enable the PLL */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_PLLEN_MASK, WM8985_PLLEN);
}
return 0;
......@@ -921,21 +921,21 @@ static int wm8985_set_pll(struct snd_soc_dai *dai, int pll_id,
static int wm8985_set_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct wm8985_priv *wm8985;
codec = dai->codec;
wm8985 = snd_soc_codec_get_drvdata(codec);
component = dai->component;
wm8985 = snd_soc_component_get_drvdata(component);
switch (clk_id) {
case WM8985_CLKSRC_MCLK:
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_CLKSEL_MASK, 0);
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_PLLEN_MASK, 0);
break;
case WM8985_CLKSRC_PLL:
snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL,
snd_soc_component_update_bits(component, WM8985_CLOCK_GEN_CONTROL,
WM8985_CLKSEL_MASK, WM8985_CLKSEL);
break;
default:
......@@ -947,27 +947,27 @@ static int wm8985_set_sysclk(struct snd_soc_dai *dai,
return 0;
}
static int wm8985_set_bias_level(struct snd_soc_codec *codec,
static int wm8985_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
int ret;
struct wm8985_priv *wm8985;
wm8985 = snd_soc_codec_get_drvdata(codec);
wm8985 = snd_soc_component_get_drvdata(component);
switch (level) {
case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE:
/* VMID at 75k */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_VMIDSEL_MASK,
1 << WM8985_VMIDSEL_SHIFT);
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
ret = regulator_bulk_enable(ARRAY_SIZE(wm8985->supplies),
wm8985->supplies);
if (ret) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to enable supplies: %d\n",
ret);
return ret;
......@@ -976,45 +976,45 @@ static int wm8985_set_bias_level(struct snd_soc_codec *codec,
regcache_sync(wm8985->regmap);
/* enable anti-pop features */
snd_soc_update_bits(codec, WM8985_OUT4_TO_ADC,
snd_soc_component_update_bits(component, WM8985_OUT4_TO_ADC,
WM8985_POBCTRL_MASK,
WM8985_POBCTRL);
/* enable thermal shutdown */
snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0,
snd_soc_component_update_bits(component, WM8985_OUTPUT_CTRL0,
WM8985_TSDEN_MASK, WM8985_TSDEN);
snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0,
snd_soc_component_update_bits(component, WM8985_OUTPUT_CTRL0,
WM8985_TSOPCTRL_MASK,
WM8985_TSOPCTRL);
/* enable BIASEN */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_BIASEN_MASK, WM8985_BIASEN);
/* VMID at 75k */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_VMIDSEL_MASK,
1 << WM8985_VMIDSEL_SHIFT);
msleep(500);
/* disable anti-pop features */
snd_soc_update_bits(codec, WM8985_OUT4_TO_ADC,
snd_soc_component_update_bits(component, WM8985_OUT4_TO_ADC,
WM8985_POBCTRL_MASK, 0);
}
/* VMID at 300k */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_VMIDSEL_MASK,
2 << WM8985_VMIDSEL_SHIFT);
break;
case SND_SOC_BIAS_OFF:
/* disable thermal shutdown */
snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0,
snd_soc_component_update_bits(component, WM8985_OUTPUT_CTRL0,
WM8985_TSOPCTRL_MASK, 0);
snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0,
snd_soc_component_update_bits(component, WM8985_OUTPUT_CTRL0,
WM8985_TSDEN_MASK, 0);
/* disable VMIDSEL and BIASEN */
snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8985_POWER_MANAGEMENT_1,
WM8985_VMIDSEL_MASK | WM8985_BIASEN_MASK,
0);
snd_soc_write(codec, WM8985_POWER_MANAGEMENT_1, 0);
snd_soc_write(codec, WM8985_POWER_MANAGEMENT_2, 0);
snd_soc_write(codec, WM8985_POWER_MANAGEMENT_3, 0);
snd_soc_component_write(component, WM8985_POWER_MANAGEMENT_1, 0);
snd_soc_component_write(component, WM8985_POWER_MANAGEMENT_2, 0);
snd_soc_component_write(component, WM8985_POWER_MANAGEMENT_3, 0);
regcache_mark_dirty(wm8985->regmap);
......@@ -1026,46 +1026,46 @@ static int wm8985_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
static int wm8985_probe(struct snd_soc_codec *codec)
static int wm8985_probe(struct snd_soc_component *component)
{
size_t i;
struct wm8985_priv *wm8985;
int ret;
wm8985 = snd_soc_codec_get_drvdata(codec);
wm8985 = snd_soc_component_get_drvdata(component);
for (i = 0; i < ARRAY_SIZE(wm8985->supplies); i++)
wm8985->supplies[i].supply = wm8985_supply_names[i];
ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8985->supplies),
ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(wm8985->supplies),
wm8985->supplies);
if (ret) {
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
dev_err(component->dev, "Failed to request supplies: %d\n", ret);
return ret;
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8985->supplies),
wm8985->supplies);
if (ret) {
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
return ret;
}
ret = wm8985_reset(codec);
ret = wm8985_reset(component);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
dev_err(component->dev, "Failed to issue reset: %d\n", ret);
goto err_reg_enable;
}
/* latch volume update bits */
for (i = 0; i < ARRAY_SIZE(volume_update_regs); ++i)
snd_soc_update_bits(codec, volume_update_regs[i],
snd_soc_component_update_bits(component, volume_update_regs[i],
0x100, 0x100);
/* enable BIASCUT */
snd_soc_update_bits(codec, WM8985_BIAS_CTRL, WM8985_BIASCUT,
snd_soc_component_update_bits(component, WM8985_BIAS_CTRL, WM8985_BIASCUT,
WM8985_BIASCUT);
wm8985_add_widgets(codec);
wm8985_add_widgets(component);
return 0;
......@@ -1105,19 +1105,20 @@ static struct snd_soc_dai_driver wm8985_dai = {
.symmetric_rates = 1
};
static const struct snd_soc_codec_driver soc_codec_dev_wm8985 = {
static const struct snd_soc_component_driver soc_component_dev_wm8985 = {
.probe = wm8985_probe,
.set_bias_level = wm8985_set_bias_level,
.suspend_bias_off = true,
.component_driver = {
.controls = wm8985_common_snd_controls,
.num_controls = ARRAY_SIZE(wm8985_common_snd_controls),
.dapm_widgets = wm8985_common_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8985_common_dapm_widgets),
.dapm_routes = wm8985_common_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8985_common_dapm_routes),
},
.suspend_bias_off = 1,
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8985_regmap = {
......@@ -1154,23 +1155,16 @@ static int wm8985_spi_probe(struct spi_device *spi)
return ret;
}
ret = snd_soc_register_codec(&spi->dev,
&soc_codec_dev_wm8985, &wm8985_dai, 1);
ret = devm_snd_soc_register_component(&spi->dev,
&soc_component_dev_wm8985, &wm8985_dai, 1);
return ret;
}
static int wm8985_spi_remove(struct spi_device *spi)
{
snd_soc_unregister_codec(&spi->dev);
return 0;
}
static struct spi_driver wm8985_spi_driver = {
.driver = {
.name = "wm8985",
},
.probe = wm8985_spi_probe,
.remove = wm8985_spi_remove
};
#endif
......@@ -1197,17 +1191,11 @@ static int wm8985_i2c_probe(struct i2c_client *i2c,
return ret;
}
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8985, &wm8985_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_wm8985, &wm8985_dai, 1);
return ret;
}
static int wm8985_i2c_remove(struct i2c_client *i2c)
{
snd_soc_unregister_codec(&i2c->dev);
return 0;
}
static const struct i2c_device_id wm8985_i2c_id[] = {
{ "wm8985", WM8985 },
{ "wm8758", WM8758 },
......@@ -1220,7 +1208,6 @@ static struct i2c_driver wm8985_i2c_driver = {
.name = "wm8985",
},
.probe = wm8985_i2c_probe,
.remove = wm8985_i2c_remove,
.id_table = wm8985_i2c_id
};
#endif
......
sound/soc/codecs/wm8988.c
View file @ 3c4d35cc
......@@ -119,7 +119,7 @@ struct wm8988_priv {
const struct snd_pcm_hw_constraint_list *sysclk_constraints;
};
#define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
#define wm8988_reset(c) snd_soc_component_write(c, WM8988_RESET, 0)
/*
* WM8988 Controls
......@@ -244,16 +244,16 @@ SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
u16 adctl2 = snd_soc_component_read32(component, WM8988_ADCTL2);
/* Use the DAC to gate LRC if active, otherwise use ADC */
if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
if (snd_soc_component_read32(component, WM8988_PWR2) & 0x180)
adctl2 &= ~0x4;
else
adctl2 |= 0x4;
return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
return snd_soc_component_write(component, WM8988_ADCTL2, adctl2);
}
static const char *wm8988_line_texts[] = {
......@@ -555,8 +555,8 @@ static const struct snd_pcm_hw_constraint_list constraints_12 = {
static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct wm8988_priv *wm8988 = snd_soc_component_get_drvdata(component);
switch (freq) {
case 11289600:
......@@ -587,7 +587,7 @@ static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
u16 iface = 0;
/* set master/slave audio interface */
......@@ -638,21 +638,21 @@ static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
snd_soc_write(codec, WM8988_IFACE, iface);
snd_soc_component_write(component, WM8988_IFACE, iface);
return 0;
}
static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct wm8988_priv *wm8988 = snd_soc_component_get_drvdata(component);
/* The set of sample rates that can be supported depends on the
* MCLK supplied to the CODEC - enforce this.
*/
if (!wm8988->sysclk) {
dev_err(codec->dev,
dev_err(component->dev,
"No MCLK configured, call set_sysclk() on init\n");
return -EINVAL;
}
......@@ -668,10 +668,10 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
struct snd_soc_component *component = dai->component;
struct wm8988_priv *wm8988 = snd_soc_component_get_drvdata(component);
u16 iface = snd_soc_component_read32(component, WM8988_IFACE) & 0x1f3;
u16 srate = snd_soc_component_read32(component, WM8988_SRATE) & 0x180;
int coeff;
coeff = get_coeff(wm8988->sysclk, params_rate(params));
......@@ -680,7 +680,7 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
srate |= 0x40;
}
if (coeff < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Unable to configure sample rate %dHz with %dHz MCLK\n",
params_rate(params), wm8988->sysclk);
return coeff;
......@@ -702,9 +702,9 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
}
/* set iface & srate */
snd_soc_write(codec, WM8988_IFACE, iface);
snd_soc_component_write(component, WM8988_IFACE, iface);
if (coeff >= 0)
snd_soc_write(codec, WM8988_SRATE, srate |
snd_soc_component_write(component, WM8988_SRATE, srate |
(coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
return 0;
......@@ -712,21 +712,21 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
static int wm8988_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
struct snd_soc_component *component = dai->component;
u16 mute_reg = snd_soc_component_read32(component, WM8988_ADCDAC) & 0xfff7;
if (mute)
snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
snd_soc_component_write(component, WM8988_ADCDAC, mute_reg | 0x8);
else
snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
snd_soc_component_write(component, WM8988_ADCDAC, mute_reg);
return 0;
}
static int wm8988_set_bias_level(struct snd_soc_codec *codec,
static int wm8988_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
struct wm8988_priv *wm8988 = snd_soc_component_get_drvdata(component);
u16 pwr_reg = snd_soc_component_read32(component, WM8988_PWR1) & ~0x1c1;
switch (level) {
case SND_SOC_BIAS_ON:
......@@ -734,26 +734,26 @@ static int wm8988_set_bias_level(struct snd_soc_codec *codec,
case SND_SOC_BIAS_PREPARE:
/* VREF, VMID=2x50k, digital enabled */
snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x00c0);
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
regcache_sync(wm8988->regmap);
/* VREF, VMID=2x5k */
snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x1c1);
/* Charge caps */
msleep(100);
}
/* VREF, VMID=2*500k, digital stopped */
snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x0141);
break;
case SND_SOC_BIAS_OFF:
snd_soc_write(codec, WM8988_PWR1, 0x0000);
snd_soc_component_write(component, WM8988_PWR1, 0x0000);
break;
}
return 0;
......@@ -792,39 +792,40 @@ static struct snd_soc_dai_driver wm8988_dai = {
.symmetric_rates = 1,
};
static int wm8988_probe(struct snd_soc_codec *codec)
static int wm8988_probe(struct snd_soc_component *component)
{
int ret = 0;
ret = wm8988_reset(codec);
ret = wm8988_reset(component);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset\n");
dev_err(component->dev, "Failed to issue reset\n");
return ret;
}
/* set the update bits (we always update left then right) */
snd_soc_update_bits(codec, WM8988_RADC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8988_RDAC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8988_ROUT1V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8988_ROUT2V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8988_RINVOL, 0x0100, 0x0100);
snd_soc_component_update_bits(component, WM8988_RADC, 0x0100, 0x0100);
snd_soc_component_update_bits(component, WM8988_RDAC, 0x0100, 0x0100);
snd_soc_component_update_bits(component, WM8988_ROUT1V, 0x0100, 0x0100);
snd_soc_component_update_bits(component, WM8988_ROUT2V, 0x0100, 0x0100);
snd_soc_component_update_bits(component, WM8988_RINVOL, 0x0100, 0x0100);
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_wm8988 = {
static const struct snd_soc_component_driver soc_component_dev_wm8988 = {
.probe = wm8988_probe,
.set_bias_level = wm8988_set_bias_level,
.suspend_bias_off = true,
.component_driver = {
.controls = wm8988_snd_controls,
.num_controls = ARRAY_SIZE(wm8988_snd_controls),
.dapm_widgets = wm8988_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8988_dapm_widgets),
.dapm_routes = wm8988_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8988_dapm_routes),
},
.suspend_bias_off = 1,
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8988_regmap = {
......@@ -859,23 +860,16 @@ static int wm8988_spi_probe(struct spi_device *spi)
spi_set_drvdata(spi, wm8988);
ret = snd_soc_register_codec(&spi->dev,
&soc_codec_dev_wm8988, &wm8988_dai, 1);
ret = devm_snd_soc_register_component(&spi->dev,
&soc_component_dev_wm8988, &wm8988_dai, 1);
return ret;
}
static int wm8988_spi_remove(struct spi_device *spi)
{
snd_soc_unregister_codec(&spi->dev);
return 0;
}
static struct spi_driver wm8988_spi_driver = {
.driver = {
.name = "wm8988",
},
.probe = wm8988_spi_probe,
.remove = wm8988_spi_remove,
};
#endif /* CONFIG_SPI_MASTER */
......@@ -900,17 +894,11 @@ static int wm8988_i2c_probe(struct i2c_client *i2c,
return ret;
}
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8988, &wm8988_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_wm8988, &wm8988_dai, 1);
return ret;
}
static int wm8988_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
}
static const struct i2c_device_id wm8988_i2c_id[] = {
{ "wm8988", 0 },
{ }
......@@ -922,7 +910,6 @@ static struct i2c_driver wm8988_i2c_driver = {
.name = "wm8988",
},
.probe = wm8988_i2c_probe,
.remove = wm8988_i2c_remove,
.id_table = wm8988_i2c_id,
};
#endif
......
sound/soc/codecs/wm8990.c
View file @ 3c4d35cc
......@@ -111,7 +111,7 @@ static const struct reg_default wm8990_reg_defaults[] = {
{ 62, 0x0026 }, /* R62 - PLL3 */
};
#define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0)
#define wm8990_reset(c) snd_soc_component_write(c, WM8990_RESET, 0)
static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0);
......@@ -132,7 +132,7 @@ static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
int reg = mc->reg;
......@@ -144,8 +144,8 @@ static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
return ret;
/* now hit the volume update bits (always bit 8) */
val = snd_soc_read(codec, reg);
return snd_soc_write(codec, reg, val | 0x0100);
val = snd_soc_component_read32(component, reg);
return snd_soc_component_write(component, reg, val | 0x0100);
}
#define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\
......@@ -374,14 +374,14 @@ SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME,
static int outmixer_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
u32 reg_shift = kcontrol->private_value & 0xfff;
int ret = 0;
u16 reg;
switch (reg_shift) {
case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) :
reg = snd_soc_read(codec, WM8990_OUTPUT_MIXER1);
reg = snd_soc_component_read32(component, WM8990_OUTPUT_MIXER1);
if (reg & WM8990_LDLO) {
printk(KERN_WARNING
"Cannot set as Output Mixer 1 LDLO Set\n");
......@@ -389,7 +389,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w,
}
break;
case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8):
reg = snd_soc_read(codec, WM8990_OUTPUT_MIXER2);
reg = snd_soc_component_read32(component, WM8990_OUTPUT_MIXER2);
if (reg & WM8990_RDRO) {
printk(KERN_WARNING
"Cannot set as Output Mixer 2 RDRO Set\n");
......@@ -397,7 +397,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w,
}
break;
case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8):
reg = snd_soc_read(codec, WM8990_SPEAKER_MIXER);
reg = snd_soc_component_read32(component, WM8990_SPEAKER_MIXER);
if (reg & WM8990_LDSPK) {
printk(KERN_WARNING
"Cannot set as Speaker Mixer LDSPK Set\n");
......@@ -405,7 +405,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w,
}
break;
case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8):
reg = snd_soc_read(codec, WM8990_SPEAKER_MIXER);
reg = snd_soc_component_read32(component, WM8990_SPEAKER_MIXER);
if (reg & WM8990_RDSPK) {
printk(KERN_WARNING
"Cannot set as Speaker Mixer RDSPK Set\n");
......@@ -934,28 +934,28 @@ static void pll_factors(struct _pll_div *pll_div, unsigned int target,
static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
int source, unsigned int freq_in, unsigned int freq_out)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
struct _pll_div pll_div;
if (freq_in && freq_out) {
pll_factors(&pll_div, freq_out * 4, freq_in);
/* Turn on PLL */
snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2,
snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
WM8990_PLL_ENA, WM8990_PLL_ENA);
/* sysclk comes from PLL */
snd_soc_update_bits(codec, WM8990_CLOCKING_2,
snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC);
/* set up N , fractional mode and pre-divisor if necessary */
snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM |
snd_soc_component_write(component, WM8990_PLL1, pll_div.n | WM8990_SDM |
(pll_div.div2?WM8990_PRESCALE:0));
snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8));
snd_soc_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF));
snd_soc_component_write(component, WM8990_PLL2, (u8)(pll_div.k>>8));
snd_soc_component_write(component, WM8990_PLL3, (u8)(pll_div.k & 0xFF));
} else {
/* Turn off PLL */
snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2,
snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
WM8990_PLL_ENA, 0);
}
return 0;
......@@ -967,8 +967,8 @@ static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component);
wm8990->sysclk = freq;
return 0;
......@@ -980,11 +980,11 @@ static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai,
static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
u16 audio1, audio3;
audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1);
audio3 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_3);
audio1 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_1);
audio3 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_3);
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
......@@ -1025,31 +1025,31 @@ static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1);
snd_soc_write(codec, WM8990_AUDIO_INTERFACE_3, audio3);
snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1);
snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_3, audio3);
return 0;
}
static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
int div_id, int div)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
switch (div_id) {
case WM8990_MCLK_DIV:
snd_soc_update_bits(codec, WM8990_CLOCKING_2,
snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
WM8990_MCLK_DIV_MASK, div);
break;
case WM8990_DACCLK_DIV:
snd_soc_update_bits(codec, WM8990_CLOCKING_2,
snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
WM8990_DAC_CLKDIV_MASK, div);
break;
case WM8990_ADCCLK_DIV:
snd_soc_update_bits(codec, WM8990_CLOCKING_2,
snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
WM8990_ADC_CLKDIV_MASK, div);
break;
case WM8990_BCLK_DIV:
snd_soc_update_bits(codec, WM8990_CLOCKING_1,
snd_soc_component_update_bits(component, WM8990_CLOCKING_1,
WM8990_BCLK_DIV_MASK, div);
break;
default:
......@@ -1066,8 +1066,8 @@ static int wm8990_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
u16 audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1);
struct snd_soc_component *component = dai->component;
u16 audio1 = snd_soc_component_read32(component, WM8990_AUDIO_INTERFACE_1);
audio1 &= ~WM8990_AIF_WL_MASK;
/* bit size */
......@@ -1085,29 +1085,29 @@ static int wm8990_hw_params(struct snd_pcm_substream *substream,
break;
}
snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1);
snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1);
return 0;
}
static int wm8990_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
u16 val;
val = snd_soc_read(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE;
val = snd_soc_component_read32(component, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE;
if (mute)
snd_soc_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE);
snd_soc_component_write(component, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE);
else
snd_soc_write(codec, WM8990_DAC_CTRL, val);
snd_soc_component_write(component, WM8990_DAC_CTRL, val);
return 0;
}
static int wm8990_set_bias_level(struct snd_soc_codec *codec,
static int wm8990_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec);
struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component);
int ret;
switch (level) {
......@@ -1116,26 +1116,26 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
case SND_SOC_BIAS_PREPARE:
/* VMID=2*50k */
snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1,
WM8990_VMID_MODE_MASK, 0x2);
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
ret = regcache_sync(wm8990->regmap);
if (ret < 0) {
dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
dev_err(component->dev, "Failed to sync cache: %d\n", ret);
return ret;
}
/* Enable all output discharge bits */
snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
WM8990_DIS_RLINE | WM8990_DIS_OUT3 |
WM8990_DIS_OUT4 | WM8990_DIS_LOUT |
WM8990_DIS_ROUT);
/* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
WM8990_BUFDCOPEN | WM8990_POBCTRL |
WM8990_VMIDTOG);
......@@ -1143,82 +1143,82 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
msleep(300);
/* Disable VMIDTOG */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
WM8990_BUFDCOPEN | WM8990_POBCTRL);
/* disable all output discharge bits */
snd_soc_write(codec, WM8990_ANTIPOP1, 0);
snd_soc_component_write(component, WM8990_ANTIPOP1, 0);
/* Enable outputs */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1b00);
msleep(50);
/* Enable VMID at 2x50k */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f02);
msleep(100);
/* Enable VREF */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03);
msleep(600);
/* Enable BUFIOEN */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
WM8990_BUFDCOPEN | WM8990_POBCTRL |
WM8990_BUFIOEN);
/* Disable outputs */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x3);
/* disable POBCTRL, SOFT_ST and BUFDCOPEN */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN);
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_BUFIOEN);
/* Enable workaround for ADC clocking issue. */
snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0x2);
snd_soc_write(codec, WM8990_EXT_CTL1, 0xa003);
snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0);
snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0x2);
snd_soc_component_write(component, WM8990_EXT_CTL1, 0xa003);
snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0);
}
/* VMID=2*250k */
snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1,
snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1,
WM8990_VMID_MODE_MASK, 0x4);
break;
case SND_SOC_BIAS_OFF:
/* Enable POBCTRL and SOFT_ST */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
WM8990_POBCTRL | WM8990_BUFIOEN);
/* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
WM8990_BUFDCOPEN | WM8990_POBCTRL |
WM8990_BUFIOEN);
/* mute DAC */
snd_soc_update_bits(codec, WM8990_DAC_CTRL,
snd_soc_component_update_bits(component, WM8990_DAC_CTRL,
WM8990_DAC_MUTE, WM8990_DAC_MUTE);
/* Enable any disabled outputs */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03);
/* Disable VMID */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f01);
msleep(300);
/* Enable all output discharge bits */
snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
WM8990_DIS_RLINE | WM8990_DIS_OUT3 |
WM8990_DIS_OUT4 | WM8990_DIS_LOUT |
WM8990_DIS_ROUT);
/* Disable VREF */
snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0);
snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x0);
/* disable POBCTRL, SOFT_ST and BUFDCOPEN */
snd_soc_write(codec, WM8990_ANTIPOP2, 0x0);
snd_soc_component_write(component, WM8990_ANTIPOP2, 0x0);
regcache_mark_dirty(wm8990->regmap);
break;
......@@ -1272,41 +1272,42 @@ static struct snd_soc_dai_driver wm8990_dai = {
* initialise the WM8990 driver
* register the mixer and dsp interfaces with the kernel
*/
static int wm8990_probe(struct snd_soc_codec *codec)
static int wm8990_probe(struct snd_soc_component *component)
{
wm8990_reset(codec);
wm8990_reset(component);
/* charge output caps */
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
snd_soc_update_bits(codec, WM8990_AUDIO_INTERFACE_4,
snd_soc_component_update_bits(component, WM8990_AUDIO_INTERFACE_4,
WM8990_ALRCGPIO1, WM8990_ALRCGPIO1);
snd_soc_update_bits(codec, WM8990_GPIO1_GPIO2,
snd_soc_component_update_bits(component, WM8990_GPIO1_GPIO2,
WM8990_GPIO1_SEL_MASK, 1);
snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_2,
snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
WM8990_OPCLK_ENA, WM8990_OPCLK_ENA);
snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
snd_soc_component_write(component, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
snd_soc_component_write(component, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_wm8990 = {
static const struct snd_soc_component_driver soc_component_dev_wm8990 = {
.probe = wm8990_probe,
.set_bias_level = wm8990_set_bias_level,
.suspend_bias_off = true,
.component_driver = {
.controls = wm8990_snd_controls,
.num_controls = ARRAY_SIZE(wm8990_snd_controls),
.dapm_widgets = wm8990_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets),
.dapm_routes = wm8990_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes),
},
.suspend_bias_off = 1,
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static const struct regmap_config wm8990_regmap = {
......@@ -1333,19 +1334,12 @@ static int wm8990_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8990);
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8990, &wm8990_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_wm8990, &wm8990_dai, 1);
return ret;
}
static int wm8990_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
}
static const struct i2c_device_id wm8990_i2c_id[] = {
{ "wm8990", 0 },
{ }
......@@ -1357,7 +1351,6 @@ static struct i2c_driver wm8990_i2c_driver = {
.name = "wm8990",
},
.probe = wm8990_i2c_probe,
.remove = wm8990_i2c_remove,
.id_table = wm8990_i2c_id,
};
......
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