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Commit 40b34ddb authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Greg Kroah-Hartman
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serial: sh-sci: Remove initialization of zero fields in sci_port_params 

The compiler zeros uninitialized fields, don't zero them manually.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a752ba18
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drivers/tty/serial/sh-sci.c
View file @ 40b34ddb
...@@ -160,14 +160,7 @@ struct plat_sci_reg { ...@@ -160,14 +160,7 @@ struct plat_sci_reg {
u8 offset, size; u8 offset, size;
}; };
/* Helper for invalidating specific entries of an inherited map. */
#define sci_reg_invalid { .offset = 0, .size = 0 }
static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCIx_PROBE_REGTYPE] = {
[0 ... SCIx_NR_REGS - 1] = sci_reg_invalid,
},
/* /*
* Common SCI definitions, dependent on the port's regshift * Common SCI definitions, dependent on the port's regshift
* value. * value.
...@@ -179,17 +172,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -179,17 +172,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxTDR] = { 0x03, 8 }, [SCxTDR] = { 0x03, 8 },
[SCxSR] = { 0x04, 8 }, [SCxSR] = { 0x04, 8 },
[SCxRDR] = { 0x05, 8 }, [SCxRDR] = { 0x05, 8 },
[SCFCR] = sci_reg_invalid,
[SCFDR] = sci_reg_invalid,
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -204,15 +186,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -204,15 +186,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x0a, 8 }, [SCxRDR] = { 0x0a, 8 },
[SCFCR] = { 0x0c, 8 }, [SCFCR] = { 0x0c, 8 },
[SCFDR] = { 0x0e, 16 }, [SCFDR] = { 0x0e, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -227,15 +200,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -227,15 +200,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x24, 8 }, [SCxRDR] = { 0x24, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = { 0x30, 16 }, [SCPCR] = { 0x30, 16 },
[SCPDR] = { 0x34, 16 }, [SCPDR] = { 0x34, 16 },
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -249,16 +215,10 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -249,16 +215,10 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxSR] = { 0x14, 16 }, [SCxSR] = { 0x14, 16 },
[SCxRDR] = { 0x60, 8 }, [SCxRDR] = { 0x60, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = sci_reg_invalid,
[SCTFDR] = { 0x38, 16 }, [SCTFDR] = { 0x38, 16 },
[SCRFDR] = { 0x3c, 16 }, [SCRFDR] = { 0x3c, 16 },
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = { 0x30, 16 }, [SCPCR] = { 0x30, 16 },
[SCPDR] = { 0x34, 16 }, [SCPDR] = { 0x34, 16 },
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -274,15 +234,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -274,15 +234,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x14, 8 }, [SCxRDR] = { 0x14, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = { 0x20, 16 }, [SCSPTR] = { 0x20, 16 },
[SCLSR] = { 0x24, 16 }, [SCLSR] = { 0x24, 16 },
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -297,15 +250,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -297,15 +250,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x0a, 8 }, [SCxRDR] = { 0x0a, 8 },
[SCFCR] = { 0x0c, 8 }, [SCFCR] = { 0x0c, 8 },
[SCFDR] = { 0x0e, 16 }, [SCFDR] = { 0x0e, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -320,15 +264,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -320,15 +264,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x14, 8 }, [SCxRDR] = { 0x14, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = { 0x20, 16 }, [SCSPTR] = { 0x20, 16 },
[SCLSR] = { 0x24, 16 }, [SCLSR] = { 0x24, 16 },
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -344,13 +281,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -344,13 +281,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x14, 8 }, [SCxRDR] = { 0x14, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = { 0x20, 16 }, [SCSPTR] = { 0x20, 16 },
[SCLSR] = { 0x24, 16 }, [SCLSR] = { 0x24, 16 },
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = { 0x30, 16 }, [SCDL] = { 0x30, 16 },
[SCCKS] = { 0x34, 16 }, [SCCKS] = { 0x34, 16 },
}, },
...@@ -367,13 +299,9 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -367,13 +299,9 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x14, 8 }, [SCxRDR] = { 0x14, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = { 0x20, 16 }, [SCSPTR] = { 0x20, 16 },
[SCLSR] = { 0x24, 16 }, [SCLSR] = { 0x24, 16 },
[HSSRR] = { 0x40, 16 }, [HSSRR] = { 0x40, 16 },
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = { 0x30, 16 }, [SCDL] = { 0x30, 16 },
[SCCKS] = { 0x34, 16 }, [SCCKS] = { 0x34, 16 },
}, },
...@@ -391,15 +319,7 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -391,15 +319,7 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x14, 8 }, [SCxRDR] = { 0x14, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = { 0x24, 16 }, [SCLSR] = { 0x24, 16 },
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -419,11 +339,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -419,11 +339,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCRFDR] = { 0x20, 16 }, [SCRFDR] = { 0x20, 16 },
[SCSPTR] = { 0x24, 16 }, [SCSPTR] = { 0x24, 16 },
[SCLSR] = { 0x28, 16 }, [SCLSR] = { 0x28, 16 },
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
/* /*
...@@ -439,15 +354,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { ...@@ -439,15 +354,6 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
[SCxRDR] = { 0x24, 8 }, [SCxRDR] = { 0x24, 8 },
[SCFCR] = { 0x18, 16 }, [SCFCR] = { 0x18, 16 },
[SCFDR] = { 0x1c, 16 }, [SCFDR] = { 0x1c, 16 },
[SCTFDR] = sci_reg_invalid,
[SCRFDR] = sci_reg_invalid,
[SCSPTR] = sci_reg_invalid,
[SCLSR] = sci_reg_invalid,
[HSSRR] = sci_reg_invalid,
[SCPCR] = sci_reg_invalid,
[SCPDR] = sci_reg_invalid,
[SCDL] = sci_reg_invalid,
[SCCKS] = sci_reg_invalid,
}, },
}; };
......
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