Commit 4322c5be authored by Ron Mercer's avatar Ron Mercer Committed by David S. Miller

qlge: Expand coverage of hw lock for config register.

The hardware semaphore covers the configuration register as well as the
ICB registers.  The ICB high and low regs contain the address of the
initialization control block and the config register is used to signal
the hardware that a block is ready to be downloaded.  Currently we were
only protecting the ICB regs.  This changes expands to cover the config
register as well.
Signed-off-by: default avatarRon Mercer <ron.mercer@qlogic.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a1ed0526
...@@ -214,6 +214,10 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, ...@@ -214,6 +214,10 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit,
return -ENOMEM; return -ENOMEM;
} }
status = ql_sem_spinlock(qdev, SEM_ICB_MASK);
if (status)
return status;
status = ql_wait_cfg(qdev, bit); status = ql_wait_cfg(qdev, bit);
if (status) { if (status) {
QPRINTK(qdev, IFUP, ERR, QPRINTK(qdev, IFUP, ERR,
...@@ -221,12 +225,8 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, ...@@ -221,12 +225,8 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit,
goto exit; goto exit;
} }
status = ql_sem_spinlock(qdev, SEM_ICB_MASK);
if (status)
goto exit;
ql_write32(qdev, ICB_L, (u32) map); ql_write32(qdev, ICB_L, (u32) map);
ql_write32(qdev, ICB_H, (u32) (map >> 32)); ql_write32(qdev, ICB_H, (u32) (map >> 32));
ql_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */
mask = CFG_Q_MASK | (bit << 16); mask = CFG_Q_MASK | (bit << 16);
value = bit | (q_id << CFG_Q_SHIFT); value = bit | (q_id << CFG_Q_SHIFT);
...@@ -237,6 +237,7 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit, ...@@ -237,6 +237,7 @@ int ql_write_cfg(struct ql_adapter *qdev, void *ptr, int size, u32 bit,
*/ */
status = ql_wait_cfg(qdev, bit); status = ql_wait_cfg(qdev, bit);
exit: exit:
ql_sem_unlock(qdev, SEM_ICB_MASK); /* does flush too */
pci_unmap_single(qdev->pdev, map, size, direction); pci_unmap_single(qdev->pdev, map, size, direction);
return status; return status;
} }
......
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