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nexedi
linux
Commits
54a56ac5
Commit
54a56ac5
authored
Sep 22, 2006
by
Dave Airlie
Browse files
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Plain Diff
drm: use radeon specific names for radeon flags
Signed-off-by:
Dave Airlie
<
airlied@linux.ie
>
parent
2f02cc3f
Changes
5
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Showing
5 changed files
with
128 additions
and
128 deletions
+128
-128
drivers/char/drm/drm_pciids.h
drivers/char/drm/drm_pciids.h
+89
-89
drivers/char/drm/radeon_cp.c
drivers/char/drm/radeon_cp.c
+23
-23
drivers/char/drm/radeon_drv.c
drivers/char/drm/radeon_drv.c
+1
-1
drivers/char/drm/radeon_drv.h
drivers/char/drm/radeon_drv.h
+10
-10
drivers/char/drm/radeon_state.c
drivers/char/drm/radeon_state.c
+5
-5
No files found.
drivers/char/drm/drm_pciids.h
View file @
54a56ac5
This diff is collapsed.
Click to expand it.
drivers/char/drm/radeon_cp.c
View file @
54a56ac5
...
...
@@ -1130,7 +1130,7 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
|
(
dev_priv
->
fb_location
>>
16
));
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
RADEON_WRITE
(
RADEON_AGP_BASE
,
(
unsigned
int
)
dev
->
agp
->
base
);
RADEON_WRITE
(
RADEON_MC_AGP_LOCATION
,
(((
dev_priv
->
gart_vm_start
-
1
+
...
...
@@ -1158,7 +1158,7 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
dev_priv
->
ring
.
tail
=
cur_read_ptr
;
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
RADEON_WRITE
(
RADEON_CP_RB_RPTR_ADDR
,
dev_priv
->
ring_rptr
->
offset
-
dev
->
agp
->
base
+
dev_priv
->
gart_vm_start
);
...
...
@@ -1302,7 +1302,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
{
u32
tmp
;
if
(
dev_priv
->
flags
&
CHIP
_IS_PCIE
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_PCIE
)
{
radeon_set_pciegart
(
dev_priv
,
on
);
return
;
}
...
...
@@ -1340,22 +1340,22 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
DRM_DEBUG
(
"
\n
"
);
/* if we require new memory map but we don't have it fail */
if
((
dev_priv
->
flags
&
CHIP
_NEW_MEMMAP
)
&&
!
dev_priv
->
new_memmap
)
{
if
((
dev_priv
->
flags
&
RADEON
_NEW_MEMMAP
)
&&
!
dev_priv
->
new_memmap
)
{
DRM_ERROR
(
"Cannot initialise DRM on this card
\n
This card requires a new X.org DDX for 3D
\n
"
);
radeon_do_cleanup_cp
(
dev
);
return
DRM_ERR
(
EINVAL
);
}
if
(
init
->
is_pci
&&
(
dev_priv
->
flags
&
CHIP
_IS_AGP
))
{
if
(
init
->
is_pci
&&
(
dev_priv
->
flags
&
RADEON
_IS_AGP
))
{
DRM_DEBUG
(
"Forcing AGP card to PCI mode
\n
"
);
dev_priv
->
flags
&=
~
CHIP
_IS_AGP
;
}
else
if
(
!
(
dev_priv
->
flags
&
(
CHIP_IS_AGP
|
CHIP_IS_PCI
|
CHIP
_IS_PCIE
))
dev_priv
->
flags
&=
~
RADEON
_IS_AGP
;
}
else
if
(
!
(
dev_priv
->
flags
&
(
RADEON_IS_AGP
|
RADEON_IS_PCI
|
RADEON
_IS_PCIE
))
&&
!
init
->
is_pci
)
{
DRM_DEBUG
(
"Restoring AGP flag
\n
"
);
dev_priv
->
flags
|=
CHIP
_IS_AGP
;
dev_priv
->
flags
|=
RADEON
_IS_AGP
;
}
if
((
!
(
dev_priv
->
flags
&
CHIP
_IS_AGP
))
&&
!
dev
->
sg
)
{
if
((
!
(
dev_priv
->
flags
&
RADEON
_IS_AGP
))
&&
!
dev
->
sg
)
{
DRM_ERROR
(
"PCI GART memory not allocated!
\n
"
);
radeon_do_cleanup_cp
(
dev
);
return
DRM_ERR
(
EINVAL
);
...
...
@@ -1498,7 +1498,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
init
->
sarea_priv_offset
);
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
drm_core_ioremap
(
dev_priv
->
cp_ring
,
dev
);
drm_core_ioremap
(
dev_priv
->
ring_rptr
,
dev
);
drm_core_ioremap
(
dev
->
agp_buffer_map
,
dev
);
...
...
@@ -1557,7 +1557,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
* align it down.
*/
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
base
=
dev
->
agp
->
base
;
/* Check if valid */
if
((
base
+
dev_priv
->
gart_size
)
>
dev_priv
->
fb_location
&&
...
...
@@ -1587,7 +1587,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
}
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
dev_priv
->
gart_buffers_offset
=
(
dev
->
agp_buffer_map
->
offset
-
dev
->
agp
->
base
+
dev_priv
->
gart_vm_start
);
...
...
@@ -1613,7 +1613,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
dev_priv
->
ring
.
high_mark
=
RADEON_RING_HIGH_MARK
;
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
/* Turn off PCI GART */
radeon_set_pcigart
(
dev_priv
,
0
);
}
else
...
...
@@ -1633,7 +1633,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
dev_priv
->
gart_info
.
mapping
.
handle
;
dev_priv
->
gart_info
.
is_pcie
=
!!
(
dev_priv
->
flags
&
CHIP
_IS_PCIE
);
!!
(
dev_priv
->
flags
&
RADEON
_IS_PCIE
);
dev_priv
->
gart_info
.
gart_table_location
=
DRM_ATI_GART_FB
;
...
...
@@ -1645,7 +1645,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
DRM_ATI_GART_MAIN
;
dev_priv
->
gart_info
.
addr
=
NULL
;
dev_priv
->
gart_info
.
bus_addr
=
0
;
if
(
dev_priv
->
flags
&
CHIP
_IS_PCIE
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_PCIE
)
{
DRM_ERROR
(
"Cannot use PCI Express without GART in FB memory
\n
"
);
radeon_do_cleanup_cp
(
dev
);
...
...
@@ -1687,7 +1687,7 @@ static int radeon_do_cleanup_cp(drm_device_t * dev)
drm_irq_uninstall
(
dev
);
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
if
(
dev_priv
->
cp_ring
!=
NULL
)
{
drm_core_ioremapfree
(
dev_priv
->
cp_ring
,
dev
);
dev_priv
->
cp_ring
=
NULL
;
...
...
@@ -1742,7 +1742,7 @@ static int radeon_do_resume_cp(drm_device_t * dev)
DRM_DEBUG
(
"Starting radeon_do_resume_cp()
\n
"
);
#if __OS_HAS_AGP
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
{
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
{
/* Turn off PCI GART */
radeon_set_pcigart
(
dev_priv
,
0
);
}
else
...
...
@@ -2186,7 +2186,7 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
dev
->
dev_private
=
(
void
*
)
dev_priv
;
dev_priv
->
flags
=
flags
;
switch
(
flags
&
CHIP
_FAMILY_MASK
)
{
switch
(
flags
&
RADEON
_FAMILY_MASK
)
{
case
CHIP_R100
:
case
CHIP_RV200
:
case
CHIP_R200
:
...
...
@@ -2194,7 +2194,7 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
case
CHIP_R350
:
case
CHIP_R420
:
case
CHIP_RV410
:
dev_priv
->
flags
|=
CHIP
_HAS_HIERZ
;
dev_priv
->
flags
|=
RADEON
_HAS_HIERZ
;
break
;
default:
/* all other chips have no hierarchical z buffer */
...
...
@@ -2202,14 +2202,14 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
}
if
(
drm_device_is_agp
(
dev
))
dev_priv
->
flags
|=
CHIP
_IS_AGP
;
dev_priv
->
flags
|=
RADEON
_IS_AGP
;
else
if
(
drm_device_is_pcie
(
dev
))
dev_priv
->
flags
|=
CHIP
_IS_PCIE
;
dev_priv
->
flags
|=
RADEON
_IS_PCIE
;
else
dev_priv
->
flags
|=
CHIP
_IS_PCI
;
dev_priv
->
flags
|=
RADEON
_IS_PCI
;
DRM_DEBUG
(
"%s card detected
\n
"
,
((
dev_priv
->
flags
&
CHIP_IS_AGP
)
?
"AGP"
:
(((
dev_priv
->
flags
&
CHIP
_IS_PCIE
)
?
"PCIE"
:
"PCI"
))));
((
dev_priv
->
flags
&
RADEON_IS_AGP
)
?
"AGP"
:
(((
dev_priv
->
flags
&
RADEON
_IS_PCIE
)
?
"PCIE"
:
"PCI"
))));
return
ret
;
}
...
...
drivers/char/drm/radeon_drv.c
View file @
54a56ac5
...
...
@@ -44,7 +44,7 @@ module_param_named(no_wb, radeon_no_wb, int, 0444);
static
int
dri_library_name
(
struct
drm_device
*
dev
,
char
*
buf
)
{
drm_radeon_private_t
*
dev_priv
=
dev
->
dev_private
;
int
family
=
dev_priv
->
flags
&
CHIP
_FAMILY_MASK
;
int
family
=
dev_priv
->
flags
&
RADEON
_FAMILY_MASK
;
return
snprintf
(
buf
,
PAGE_SIZE
,
"%s
\n
"
,
(
family
<
CHIP_R200
)
?
"radeon"
:
...
...
drivers/char/drm/radeon_drv.h
View file @
54a56ac5
...
...
@@ -133,16 +133,16 @@ enum radeon_cp_microcode_version {
* Chip flags
*/
enum
radeon_chip_flags
{
CHIP
_FAMILY_MASK
=
0x0000ffffUL
,
CHIP
_FLAGS_MASK
=
0xffff0000UL
,
CHIP
_IS_MOBILITY
=
0x00010000UL
,
CHIP
_IS_IGP
=
0x00020000UL
,
CHIP
_SINGLE_CRTC
=
0x00040000UL
,
CHIP
_IS_AGP
=
0x00080000UL
,
CHIP
_HAS_HIERZ
=
0x00100000UL
,
CHIP
_IS_PCIE
=
0x00200000UL
,
CHIP
_NEW_MEMMAP
=
0x00400000UL
,
CHIP
_IS_PCI
=
0x00800000UL
,
RADEON
_FAMILY_MASK
=
0x0000ffffUL
,
RADEON
_FLAGS_MASK
=
0xffff0000UL
,
RADEON
_IS_MOBILITY
=
0x00010000UL
,
RADEON
_IS_IGP
=
0x00020000UL
,
RADEON
_SINGLE_CRTC
=
0x00040000UL
,
RADEON
_IS_AGP
=
0x00080000UL
,
RADEON
_HAS_HIERZ
=
0x00100000UL
,
RADEON
_IS_PCIE
=
0x00200000UL
,
RADEON
_NEW_MEMMAP
=
0x00400000UL
,
RADEON
_IS_PCI
=
0x00800000UL
,
};
#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
...
...
drivers/char/drm/radeon_state.c
View file @
54a56ac5
...
...
@@ -868,7 +868,7 @@ static void radeon_cp_dispatch_clear(drm_device_t * dev,
*/
dev_priv
->
sarea_priv
->
ctx_owner
=
0
;
if
((
dev_priv
->
flags
&
CHIP
_HAS_HIERZ
)
if
((
dev_priv
->
flags
&
RADEON
_HAS_HIERZ
)
&&
(
flags
&
RADEON_USE_HIERZ
))
{
/* FIXME : reverse engineer that for Rx00 cards */
/* FIXME : the mask supposedly contains low-res z values. So can't set
...
...
@@ -913,7 +913,7 @@ static void radeon_cp_dispatch_clear(drm_device_t * dev,
for
(
i
=
0
;
i
<
nbox
;
i
++
)
{
int
tileoffset
,
nrtilesx
,
nrtilesy
,
j
;
/* it looks like r200 needs rv-style clears, at least if hierz is not enabled? */
if
((
dev_priv
->
flags
&
CHIP
_HAS_HIERZ
)
if
((
dev_priv
->
flags
&
RADEON
_HAS_HIERZ
)
&&
!
(
dev_priv
->
microcode_version
==
UCODE_R200
))
{
/* FIXME : figure this out for r200 (when hierz is enabled). Or
maybe r200 actually doesn't need to put the low-res z value into
...
...
@@ -997,7 +997,7 @@ static void radeon_cp_dispatch_clear(drm_device_t * dev,
}
/* TODO don't always clear all hi-level z tiles */
if
((
dev_priv
->
flags
&
CHIP
_HAS_HIERZ
)
if
((
dev_priv
->
flags
&
RADEON
_HAS_HIERZ
)
&&
(
dev_priv
->
microcode_version
==
UCODE_R200
)
&&
(
flags
&
RADEON_USE_HIERZ
))
/* r100 and cards without hierarchical z-buffer have no high-level z-buffer */
...
...
@@ -2992,9 +2992,9 @@ static int radeon_cp_getparam(DRM_IOCTL_ARGS)
value
=
RADEON_SCRATCH_REG_OFFSET
;
break
;
case
RADEON_PARAM_CARD_TYPE
:
if
(
dev_priv
->
flags
&
CHIP
_IS_PCIE
)
if
(
dev_priv
->
flags
&
RADEON
_IS_PCIE
)
value
=
RADEON_CARD_PCIE
;
else
if
(
dev_priv
->
flags
&
CHIP
_IS_AGP
)
else
if
(
dev_priv
->
flags
&
RADEON
_IS_AGP
)
value
=
RADEON_CARD_AGP
;
else
value
=
RADEON_CARD_PCI
;
...
...
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