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Commit 55935dfd authored by cbrake@com.rmk.(none)'s avatar cbrake@com.rmk.(none) Committed by Russell King
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[ARM PATCH] 2488/1: Update Vibren PXA255 IDP support 

Patch from Cliff Brake

Changes to machine specific files and add defconfig so the CONFIG_ARCH_PXA_IDP machine will build and run.  Changes are mostly related to the 2.6 driver model.  Also removed code that is no longer required -- support for older versions of hardware, etc.

Signed-off-by: Cliff Brake
Signed-off-by: Russell King
parent 8e845880
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Showing with 892 additions and 324 deletions
arch/arm/configs/pxa255-idp_defconfig 0 → 100644
View file @ 55935dfd
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.11-rc3
# Fri Feb 11 16:53:43 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_IOMAP=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
#
# Intel PXA2xx Implementations
#
# CONFIG_ARCH_LUBBOCK is not set
# CONFIG_MACH_MAINSTONE is not set
CONFIG_ARCH_PXA_IDP=y
# CONFIG_PXA_SHARPSL is not set
CONFIG_PXA25x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_MINICACHE=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
CONFIG_XSCALE_PMU=y
#
# General setup
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PC-card bridges
#
#
# At least one math emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
CONFIG_CMDLINE="root=/dev/nfs ip=dhcp console=ttyS0,115200 mem=64M"
CONFIG_LEDS=y
CONFIG_LEDS_TIMER=y
CONFIG_LEDS_CPU=y
CONFIG_ALIGNMENT_TRAP=y
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_XIP is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_ARM_INTEGRATOR is not set
# CONFIG_MTD_EDB7312 is not set
# CONFIG_MTD_SHARP_SL is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_SMC91X=y
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
# CONFIG_IDE_GENERIC is not set
# CONFIG_IDE_ARM is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_CT82C710 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_VFAT_FS is not set
CONFIG_FAT_DEFAULT_CODEPAGE=437
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
# CONFIG_JFFS2_FS_NAND is not set
# CONFIG_JFFS2_FS_NOR_ECC is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Graphics support
#
CONFIG_FB=y
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
CONFIG_FB_PXA=y
# CONFIG_FB_PXA_PARAMETERS is not set
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
#
# Logo configuration
#
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# Misc devices
#
#
# USB support
#
# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# Kernel hacking
#
CONFIG_DEBUG_KERNEL=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
arch/arm/mach-pxa/idp.c
View file @ 55935dfd
...@@ -10,13 +10,16 @@ ...@@ -10,13 +10,16 @@
* 2001-09-13: Cliff Brake <cbrake@accelent.com> * 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code * Initial code
* *
* Expected command line: mem=32M initrd=0xa1000000,4M root=/dev/ram ramdisk=8192 * 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
* <http://www.vibren.com> <http://bec-systems.com>
* Updated for 2.6 kernel
*
*/ */
#include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/fb.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/memory.h> #include <asm/memory.h>
...@@ -29,68 +32,133 @@ ...@@ -29,68 +32,133 @@
#include <asm/arch/pxa-regs.h> #include <asm/arch/pxa-regs.h>
#include <asm/arch/idp.h> #include <asm/arch/idp.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/bitfield.h>
#include <asm/arch/mmc.h>
#include "generic.h" #include "generic.h"
#ifndef PXA_IDP_REV02 /* TODO:
/* shadow registers for write only registers */ * - add pxa2xx_audio_ops_t device structure
unsigned int idp_cpld_led_control_shadow = 0x1; * - Ethernet interrupt
unsigned int idp_cpld_periph_pwr_shadow = 0xd; */
unsigned int ipd_cpld_cir_shadow = 0;
unsigned int idp_cpld_kb_col_high_shadow = 0;
unsigned int idp_cpld_kb_col_low_shadow = 0;
unsigned int idp_cpld_pccard_en_shadow = 0xC3;
unsigned int idp_cpld_gpioh_dir_shadow = 0;
unsigned int idp_cpld_gpioh_value_shadow = 0;
unsigned int idp_cpld_gpiol_dir_shadow = 0;
unsigned int idp_cpld_gpiol_value_shadow = 0;
/* static struct resource smc91x_resources[] = {
* enable all LCD signals -- they should still be on [0] = {
* write protect flash .start = (IDP_ETH_PHYS + 0x300),
* enable all serial port transceivers .end = (IDP_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_GPIO(4),
.end = IRQ_GPIO(4),
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
static void idp_backlight_power(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<1);
} else {
IDP_CPLD_LCD &= ~(1<<1);
}
}
static void idp_vlcd(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<2);
} else {
IDP_CPLD_LCD &= ~(1<<2);
}
}
static void idp_lcd_power(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<0);
} else {
IDP_CPLD_LCD &= ~(1<<0);
}
/* call idp_vlcd for now as core driver does not support
* both power and vlcd hooks. Note, this is not technically
* the correct sequence, but seems to work. Disclaimer:
* this may eventually damage the display.
*/ */
unsigned int idp_control_port_shadow = ((0x7 << 21) | /* LCD power */ idp_vlcd(on);
(0x1 << 19) | /* disable flash write enable */ }
(0x7 << 9)); /* enable serial port transeivers */
static struct pxafb_mach_info sharp_lm8v31 __initdata = {
.pixclock = 270000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 1,
.left_margin = 3,
.right_margin = 3,
.vsync_len = 1,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0,
.cmap_inverse = 0,
.cmap_static = 0,
.lccr0 = LCCR0_SDS,
.lccr3 = LCCR3_PCP | LCCR3_Acb(255),
.pxafb_backlight_power = &idp_backlight_power,
.pxafb_lcd_power = &idp_lcd_power
};
#endif static int idp_mci_init(struct device *dev, irqreturn_t (*idp_detect_int)(int, void *, struct pt_regs *), void *data)
{
/* setup GPIO for PXA25x MMC controller */
pxa_gpio_mode(GPIO6_MMCCLK_MD);
pxa_gpio_mode(GPIO8_MMCCS0_MD);
return 0;
}
static struct pxamci_platform_data idp_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = idp_mci_init,
};
static void __init idp_init(void) static void __init idp_init(void)
{ {
printk("idp_init()\n"); printk("idp_init()\n");
platform_device_register(&smc91x_device);
//platform_device_register(&mst_audio_device);
set_pxa_fb_info(&sharp_lm8v31);
pxa_set_mci_info(&idp_mci_platform_data);
} }
static void __init idp_init_irq(void) static void __init idp_init_irq(void)
{ {
pxa_init_irq(); pxa_init_irq();
set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE);
} }
static struct map_desc idp_io_desc[] __initdata = { static struct map_desc idp_io_desc[] __initdata = {
/* virtual physical length type */ /* virtual physical length type */
{ IDP_COREVOLT_VIRT,
#ifndef PXA_IDP_REV02
{ IDP_CTRL_PORT_BASE,
IDP_CTRL_PORT_PHYS,
IDP_CTRL_PORT_SIZE,
MT_DEVICE },
#endif
{ IDP_IDE_BASE,
IDP_IDE_PHYS,
IDP_IDE_SIZE,
MT_DEVICE },
{ IDP_ETH_BASE,
IDP_ETH_PHYS,
IDP_ETH_SIZE,
MT_DEVICE },
{ IDP_COREVOLT_BASE,
IDP_COREVOLT_PHYS, IDP_COREVOLT_PHYS,
IDP_COREVOLT_SIZE, IDP_COREVOLT_SIZE,
MT_DEVICE }, MT_DEVICE },
{ IDP_CPLD_BASE, { IDP_CPLD_VIRT,
IDP_CPLD_PHYS, IDP_CPLD_PHYS,
IDP_CPLD_SIZE, IDP_CPLD_SIZE,
MT_DEVICE } MT_DEVICE }
...@@ -101,8 +169,6 @@ static void __init idp_map_io(void) ...@@ -101,8 +169,6 @@ static void __init idp_map_io(void)
pxa_map_io(); pxa_map_io();
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE);
// serial ports 2 & 3 // serial ports 2 & 3
pxa_gpio_mode(GPIO42_BTRXD_MD); pxa_gpio_mode(GPIO42_BTRXD_MD);
pxa_gpio_mode(GPIO43_BTTXD_MD); pxa_gpio_mode(GPIO43_BTTXD_MD);
...@@ -114,8 +180,8 @@ static void __init idp_map_io(void) ...@@ -114,8 +180,8 @@ static void __init idp_map_io(void)
} }
MACHINE_START(PXA_IDP, "Accelent Xscale IDP") MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
MAINTAINER("Accelent Systems Inc.") MAINTAINER("Vibren Technologies")
BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000)) BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
MAPIO(idp_map_io) MAPIO(idp_map_io)
INITIRQ(idp_init_irq) INITIRQ(idp_init_irq)
......
arch/arm/mach-pxa/leds-idp.c
View file @ 55935dfd
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/leds.h> #include <asm/leds.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/idp.h> #include <asm/arch/idp.h>
#include "leds.h" #include "leds.h"
......
include/asm-arm/arch-pxa/idp.h
View file @ 55935dfd
...@@ -10,20 +10,20 @@ ...@@ -10,20 +10,20 @@
* 2001-09-13: Cliff Brake <cbrake@accelent.com> * 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code * Initial code
* *
* 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
* <http://www.vibren.com> <http://bec-systems.com>
* Changes for 2.6 kernel.
*/ */
#include <linux/config.h> #include <linux/config.h>
/* /*
* Note: this file must be safe to include in assembly files * Note: this file must be safe to include in assembly files
*
* Support for the Vibren PXA255 IDP requires rev04 or later
* IDP hardware.
*/ */
/* comment out following if you have a rev01 board */
#define PXA_IDP_REV02 1
#ifdef PXA_IDP_REV02
//Use this as well for 0017-x004 and greater pcb's:
#define PXA_IDP_REV04 1
#define IDP_FLASH_PHYS (PXA_CS0_PHYS) #define IDP_FLASH_PHYS (PXA_CS0_PHYS)
#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS) #define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
...@@ -38,26 +38,18 @@ ...@@ -38,26 +38,18 @@
* virtual memory map * virtual memory map
*/ */
#define IDP_IDE_BASE (0xf0000000) #define IDP_COREVOLT_VIRT (0xf0000000)
#define IDP_IDE_SIZE (1*1024*1024)
#define IDE_REG_STRIDE 4
#define IDP_ETH_BASE (IDP_IDE_BASE + IDP_IDE_SIZE)
#define IDP_ETH_SIZE (1*1024*1024)
#define ETH_BASE IDP_ETH_BASE //smc9194 driver compatibility issue
#define IDP_COREVOLT_BASE (IDP_ETH_BASE + IDP_ETH_SIZE)
#define IDP_COREVOLT_SIZE (1*1024*1024) #define IDP_COREVOLT_SIZE (1*1024*1024)
#define IDP_CPLD_BASE (IDP_COREVOLT_BASE + IDP_COREVOLT_SIZE) #define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE)
#define IDP_CPLD_SIZE (1*1024*1024) #define IDP_CPLD_SIZE (1*1024*1024)
#if (IDP_CPLD_BASE + IDP_CPLD_SIZE) > 0xfc000000 #if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000
#error Your custom IO space is getting a bit large !! #error Your custom IO space is getting a bit large !!
#endif #endif
#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_BASE) #define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT)
#define CPLD_V2P(x) ((x) - IDP_CPLD_BASE + IDP_CPLD_PHYS) #define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x))) # define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x)))
...@@ -65,7 +57,7 @@ ...@@ -65,7 +57,7 @@
# define __CPLD_REG(x) CPLD_P2V(x) # define __CPLD_REG(x) CPLD_P2V(x)
#endif #endif
/* board level registers in the CPLD: (offsets from CPLD_BASE) */ /* board level registers in the CPLD: (offsets from CPLD_VIRT) */
#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00) #define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00)
#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04) #define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04)
...@@ -142,32 +134,10 @@ ...@@ -142,32 +134,10 @@
#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x))) #define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
/*
* Macros for LCD Driver
*/
#ifdef CONFIG_FB_PXA
#define FB_BACKLIGHT_ON() (IDP_CPLD_LCD |= (1<<1))
#define FB_BACKLIGHT_OFF() (IDP_CPLD_LCD &= ~(1<<1))
#define FB_PWR_ON() (IDP_CPLD_LCD |= (1<< 0))
#define FB_PWR_OFF() (IDP_CPLD_LCD &= ~(1<<0))
#define FB_VLCD_ON() (IDP_CPLD_LCD |= (1<<2))
#define FB_VLCD_OFF() (IDP_CPLD_LCD &= ~(1<<2))
#endif
/* A listing of interrupts used by external hardware devices */ /* A listing of interrupts used by external hardware devices */
#ifdef PXA_IDP_REV04
#define TOUCH_PANEL_IRQ IRQ_GPIO(5) #define TOUCH_PANEL_IRQ IRQ_GPIO(5)
#define IDE_IRQ IRQ_GPIO(21) #define IDE_IRQ IRQ_GPIO(21)
#else
#define TOUCH_PANEL_IRQ IRQ_GPIO(21)
#define IDE_IRQ IRQ_GPIO(5)
#endif
#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING #define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING
...@@ -196,7 +166,7 @@ ...@@ -196,7 +166,7 @@
#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED) #define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED)
#define IDP_WRITE_LEDS(value) (IDP_CPLD_LED_CONTROL = (IDP_CPLD_LED_CONTROL & (~(IDP_LEDS_MASK)) | value)) #define IDP_WRITE_LEDS(value) (IDP_CPLD_LED_CONTROL = (IDP_CPLD_LED_CONTROL & ((~(IDP_LEDS_MASK)) | value)))
/* /*
* macros for MTD driver * macros for MTD driver
...@@ -229,238 +199,4 @@ ...@@ -229,238 +199,4 @@
inputs = (IDP_CPLD_KB_ROW & 0x7f);\ inputs = (IDP_CPLD_KB_ROW & 0x7f);\
} }
#else
/*
* following is for rev01 boards only
*/
#define IDP_FLASH_PHYS (PXA_CS0_PHYS)
#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS)
#define IDP_CTRL_PORT_PHYS (PXA_CS5_PHYS + 0x02C00000)
#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000)
#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000)
#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000)
#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000)
/*
* virtual memory map
*/
#define IDP_CTRL_PORT_BASE (0xf0000000)
#define IDP_CTRL_PORT_SIZE (1*1024*1024)
#define IDP_IDE_BASE (IDP_CTRL_PORT_BASE + IDP_CTRL_PORT_SIZE)
#define IDP_IDE_SIZE (1*1024*1024)
#define IDP_ETH_BASE (IDP_IDE_BASE + IDP_IDE_SIZE)
#define IDP_ETH_SIZE (1*1024*1024)
#define IDP_COREVOLT_BASE (IDP_ETH_BASE + IDP_ETH_SIZE)
#define IDP_COREVOLT_SIZE (1*1024*1024)
#define IDP_CPLD_BASE (IDP_COREVOLT_BASE + IDP_COREVOLT_SIZE)
#define IDP_CPLD_SIZE (1*1024*1024)
#if (IDP_CPLD_BASE + IDP_CPLD_SIZE) > 0xfc000000
#error Your custom IO space is getting a bit large !!
#endif
#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_BASE)
#define CPLD_V2P(x) ((x) - IDP_CPLD_BASE + IDP_CPLD_PHYS)
#ifndef __ASSEMBLY__
# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x)))
#else
# define __CPLD_REG(x) CPLD_P2V(x)
#endif
/* board level registers in the CPLD: (offsets from CPLD_BASE) */
#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x00)
#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04)
#define _IDP_CPLD_CIR (IDP_CPLD_PHYS + 0x08)
#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C)
#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10)
#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14)
#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18)
#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C)
#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20)
#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24)
#define _IDP_CPLD_MISC (IDP_CPLD_PHYS + 0x28)
#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x2C)
#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x30)
/* FPGA register virtual addresses */
#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) /* write only */
#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) /* write only */
#define IDP_CPLD_CIR __CPLD_REG(_IDP_CPLD_CIR) /* write only */
#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) /* write only */
#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) /* write only */
#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) /* write only */
#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) /* write only */
#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) /* write only */
#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) /* write only */
#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) /* write only */
#define IDP_CPLD_MISC __CPLD_REG(_IDP_CPLD_MISC) /* read only */
#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) /* read only */
#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) /* read only */
#ifndef __ASSEMBLY__
/* shadow registers for write only registers */
extern unsigned int idp_cpld_led_control_shadow;
extern unsigned int idp_cpld_periph_pwr_shadow;
extern unsigned int idp_cpld_cir_shadow;
extern unsigned int idp_cpld_kb_col_high_shadow;
extern unsigned int idp_cpld_kb_col_low_shadow;
extern unsigned int idp_cpld_pccard_en_shadow;
extern unsigned int idp_cpld_gpioh_dir_shadow;
extern unsigned int idp_cpld_gpioh_value_shadow;
extern unsigned int idp_cpld_gpiol_dir_shadow;
extern unsigned int idp_cpld_gpiol_value_shadow;
extern unsigned int idp_control_port_shadow;
/*
* macros to write to write only register
*
* none of these macros are protected from
* multiple drivers using them in interrupt context.
*/
#define WRITE_IDP_CPLD_LED_CONTROL(value, mask) \
{\
idp_cpld_led_control_shadow = (((value & mask) | (idp_cpld_led_control_shadow & ~mask)));\
IDP_CPLD_LED_CONTROL = idp_cpld_led_control_shadow;\
}
#define WRITE_IDP_CPLD_PERIPH_PWR(value, mask) \
{\
idp_cpld_periph_pwr_shadow = ((value & mask) | (idp_cpld_periph_pwr_shadow & ~mask));\
IDP_CPLD_PERIPH_PWR = idp_cpld_periph_pwr_shadow;\
}
#define WRITE_IDP_CPLD_CIR(value, mask) \
{\
idp_cpld_cir_shadow = ((value & mask) | (idp_cpld_cir_shadow & ~mask));\
IDP_CPLD_CIR = idp_cpld_cir_shadow;\
}
#define WRITE_IDP_CPLD_KB_COL_HIGH(value, mask) \
{\
idp_cpld_kb_col_high_shadow = ((value & mask) | (idp_cpld_kb_col_high_shadow & ~mask));\
IDP_CPLD_KB_COL_HIGH = idp_cpld_kb_col_high_shadow;\
}
#define WRITE_IDP_CPLD_KB_COL_LOW(value, mask) \
{\
idp_cpld_kb_col_low_shadow = ((value & mask) | (idp_cpld_kb_col_low_shadow & ~mask));\
IDP_CPLD_KB_COL_LOW = idp_cpld_kb_col_low_shadow;\
}
#define WRITE_IDP_CPLD_PCCARD_EN(value, mask) \
{\
idp_cpld_ = ((value & mask) | (idp_cpld_led_control_shadow & ~mask));\
IDP_CPLD_LED_CONTROL = idp_cpld_led_control_shadow;\
}
#define WRITE_IDP_CPLD_GPIOH_DIR(value, mask) \
{\
idp_cpld_gpioh_dir_shadow = ((value & mask) | (idp_cpld_gpioh_dir_shadow & ~mask));\
IDP_CPLD_GPIOH_DIR = idp_cpld_gpioh_dir_shadow;\
}
#define WRITE_IDP_CPLD_GPIOH_VALUE(value, mask) \
{\
idp_cpld_gpioh_value_shadow = ((value & mask) | (idp_cpld_gpioh_value_shadow & ~mask));\
IDP_CPLD_GPIOH_VALUE = idp_cpld_gpioh_value_shadow;\
}
#define WRITE_IDP_CPLD_GPIOL_DIR(value, mask) \
{\
idp_cpld_gpiol_dir_shadow = ((value & mask) | (idp_cpld_gpiol_dir_shadow & ~mask));\
IDP_CPLD_GPIOL_DIR = idp_cpld_gpiol_dir_shadow;\
}
#define WRITE_IDP_CPLD_GPIOL_VALUE(value, mask) \
{\
idp_cpld_gpiol_value_shadow = ((value & mask) | (idp_cpld_gpiol_value_shadow & ~mask));\
IDP_CPLD_GPIOL_VALUE = idp_cpld_gpiol_value_shadow;\
}
#define WRITE_IDP_CONTROL_PORT(value, mask) \
{\
idp_control_port_shadow = ((value & mask) | (idp_control_port_shadow & ~mask));\
(*((volatile unsigned long *)IDP_CTRL_PORT_BASE)) = idp_control_port_shadow;\
}
#endif
/* A listing of interrupts used by external hardware devices */
#define TOUCH_PANEL_IRQ IRQ_GPIO(21)
#define TOUCH_PANEL_IRQ_EGDE IRQT_FALLING
#define ETHERNET_IRQ IRQ_GPIO(4)
#define ETHERNET_IRQ_EDGE IRQT_RISING
/*
* Bit masks for various registers
*/
/* control port */
#define IDP_CONTROL_PORT_PCSLOT0_0 (1 << 0)
#define IDP_CONTROL_PORT_PCSLOT0_1 (1 << 1)
#define IDP_CONTROL_PORT_PCSLOT0_2 (1 << 2)
#define IDP_CONTROL_PORT_PCSLOT0_3 (1 << 3)
#define IDP_CONTROL_PORT_PCSLOT1_1 (1 << 4)
#define IDP_CONTROL_PORT_PCSLOT1_2 (1 << 5)
#define IDP_CONTROL_PORT_PCSLOT1_3 (1 << 6)
#define IDP_CONTROL_PORT_PCSLOT1_4 (1 << 7)
#define IDP_CONTROL_PORT_SERIAL1_EN (1 << 9)
#define IDP_CONTROL_PORT_SERIAL2_EN (1 << 10)
#define IDP_CONTROL_PORT_SERIAL3_EN (1 << 11)
#define IDP_CONTROL_PORT_IRDA_FIR (1 << 12)
#define IDP_CONTROL_PORT_IRDA_M0 (1 << 13)
#define IDP_CONTROL_PORT_IRDA_M1 (1 << 14)
#define IDP_CONTROL_PORT_I2S_PWR (1 << 15)
#define IDP_CONTROL_PORT_FLASH_WP (1 << 19)
#define IDP_CONTROL_PORT_MILL_EN (1 << 20)
#define IDP_CONTROL_PORT_LCD_PWR (1 << 21)
#define IDP_CONTROL_PORT_LCD_BKLEN (1 << 22)
#define IDP_CONTROL_PORT_LCD_ENAVLCD (1 << 23)
/*
* Macros for LCD Driver
*/
#ifdef CONFIG_FB_PXA
#define FB_BACKLIGHT_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_BKLEN, IDP_CONTROL_PORT_LCD_BKLEN)
#define FB_BACKLIGHT_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_BKLEN)
#define FB_PWR_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_PWR, IDP_CONTROL_PORT_LCD_PWR)
#define FB_PWR_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_PWR)
#define FB_VLCD_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_ENAVLCD, IDP_CONTROL_PORT_LCD_ENAVLCD)
#define FB_VLCD_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_ENAVLCD)
#endif
/*
* Macros for LED Driver
*/
/* leds 0 = ON */
#define IDP_HB_LED 0x1
#define IDP_BUSY_LED 0x2
#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED)
#define IDP_WRITE_LEDS(value) WRITE_IDP_CPLD_LED_CONTROL(value, IDP_LEDS_MASK)
/*
* macros for MTD driver
*/
#define FLASH_WRITE_PROTECT_DISABLE() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_FLASH_WP)
#define FLASH_WRITE_PROTECT_ENABLE() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_FLASH_WP, IDP_CONTROL_PORT_FLASH_WP)
#endif
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