Commit 5b56642b authored by Andrew Bresticker's avatar Andrew Bresticker Committed by Kukjin Kim

ARM: dts: add CCI node for exynos5420

Add device-tree bindings for the ARM CCI-400 on Exynos5420. There
are two slave interfaces: one for the A15 cluster and one for the
A7 cluster.
Signed-off-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: default avatarAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 096d21c6
...@@ -58,6 +58,7 @@ cpu0: cpu@0 { ...@@ -58,6 +58,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0x0>; reg = <0x0>;
clock-frequency = <1800000000>; clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
...@@ -65,6 +66,7 @@ cpu1: cpu@1 { ...@@ -65,6 +66,7 @@ cpu1: cpu@1 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0x1>; reg = <0x1>;
clock-frequency = <1800000000>; clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
...@@ -72,6 +74,7 @@ cpu2: cpu@2 { ...@@ -72,6 +74,7 @@ cpu2: cpu@2 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0x2>; reg = <0x2>;
clock-frequency = <1800000000>; clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
...@@ -79,6 +82,7 @@ cpu3: cpu@3 { ...@@ -79,6 +82,7 @@ cpu3: cpu@3 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0x3>; reg = <0x3>;
clock-frequency = <1800000000>; clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
}; };
cpu4: cpu@100 { cpu4: cpu@100 {
...@@ -86,6 +90,7 @@ cpu4: cpu@100 { ...@@ -86,6 +90,7 @@ cpu4: cpu@100 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
reg = <0x100>; reg = <0x100>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
}; };
cpu5: cpu@101 { cpu5: cpu@101 {
...@@ -93,6 +98,7 @@ cpu5: cpu@101 { ...@@ -93,6 +98,7 @@ cpu5: cpu@101 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
reg = <0x101>; reg = <0x101>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
}; };
cpu6: cpu@102 { cpu6: cpu@102 {
...@@ -100,6 +106,7 @@ cpu6: cpu@102 { ...@@ -100,6 +106,7 @@ cpu6: cpu@102 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
reg = <0x102>; reg = <0x102>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
}; };
cpu7: cpu@103 { cpu7: cpu@103 {
...@@ -107,6 +114,26 @@ cpu7: cpu@103 { ...@@ -107,6 +114,26 @@ cpu7: cpu@103 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
reg = <0x103>; reg = <0x103>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
};
};
cci@10d20000 {
compatible = "arm,cci-400";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x10d20000 0x1000>;
ranges = <0x0 0x10d20000 0x6000>;
cci_control0: slave-if@4000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x4000 0x1000>;
};
cci_control1: slave-if@5000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x5000 0x1000>;
}; };
}; };
......
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