Commit 5c97ec96 authored by Ian Molton's avatar Ian Molton Committed by Russell King

[ARM PATCH] 1445/1: [PATCH] removes CONFIG_CPU_{26,32} from arch/arm/kernel

Patch from Ian Molton

see subject.
parent a1f64a87
......@@ -27,10 +27,8 @@ ifneq ($(MACHINE),ebsa110)
obj-y += io.o
endif
ifeq ($(CONFIG_CPU_32),y)
head-y := head.o
obj-$(CONFIG_DEBUG_LL) += debug.o
endif
extra-y := $(head-y) init_task.o
......
......@@ -95,11 +95,6 @@ EXPORT_SYMBOL_ALIAS(kern_fp_enter,fp_enter);
EXPORT_SYMBOL_ALIAS(fp_printk,printk);
EXPORT_SYMBOL_ALIAS(fp_send_sig,send_sig);
#ifdef CONFIG_CPU_26
EXPORT_SYMBOL(fpundefinstr);
EXPORT_SYMBOL(ret_from_exception);
#endif
#ifdef CONFIG_VT
EXPORT_SYMBOL(kd_mksound);
#endif
......@@ -111,10 +106,8 @@ EXPORT_SYMBOL_NOVERS(__backtrace);
EXPORT_SYMBOL(dump_thread);
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(udelay);
#ifdef CONFIG_CPU_32
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(__iounmap);
#endif
EXPORT_SYMBOL(kernel_thread);
EXPORT_SYMBOL(system_rev);
EXPORT_SYMBOL(system_serial_low);
......@@ -196,7 +189,6 @@ EXPORT_SYMBOL_NOVERS(memscan);
EXPORT_SYMBOL_NOVERS(__memzero);
/* user mem (segment) */
#if defined(CONFIG_CPU_32)
EXPORT_SYMBOL(__arch_copy_from_user);
EXPORT_SYMBOL(__arch_copy_to_user);
EXPORT_SYMBOL(__arch_clear_user);
......@@ -207,11 +199,6 @@ EXPORT_SYMBOL(consistent_alloc);
EXPORT_SYMBOL(consistent_free);
EXPORT_SYMBOL(consistent_sync);
#elif defined(CONFIG_CPU_26)
EXPORT_SYMBOL(uaccess_kernel);
EXPORT_SYMBOL(uaccess_user);
#endif
EXPORT_SYMBOL_NOVERS(__get_user_1);
EXPORT_SYMBOL_NOVERS(__get_user_2);
EXPORT_SYMBOL_NOVERS(__get_user_4);
......
......@@ -21,10 +21,7 @@
/*
* Make sure that the compiler and target are compatible.
*/
#if defined(__APCS_32__) && defined(CONFIG_CPU_26)
#error Sorry, your compiler targets APCS-32 but this kernel requires APCS-26
#endif
#if defined(__APCS_26__) && defined(CONFIG_CPU_32)
#if defined(__APCS_26__)
#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
#endif
#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 95)
......@@ -52,7 +49,6 @@ int main(void)
BLANK();
DEFINE(VM_EXEC, VM_EXEC);
BLANK();
#ifdef CONFIG_CPU_32
DEFINE(HPTE_TYPE_SMALL, PTE_TYPE_SMALL);
DEFINE(HPTE_AP_READ, PTE_AP_READ);
DEFINE(HPTE_AP_WRITE, PTE_AP_WRITE);
......@@ -65,15 +61,7 @@ int main(void)
DEFINE(LPTE_WRITE, L_PTE_WRITE);
DEFINE(LPTE_EXEC, L_PTE_EXEC);
DEFINE(LPTE_DIRTY, L_PTE_DIRTY);
#endif
BLANK();
#ifdef CONFIG_CPU_26
DEFINE(PAGE_PRESENT, _PAGE_PRESENT);
DEFINE(PAGE_READONLY, _PAGE_READONLY);
DEFINE(PAGE_NOT_USER, _PAGE_NOT_USER);
DEFINE(PAGE_OLD, _PAGE_OLD);
DEFINE(PAGE_CLEAN, _PAGE_CLEAN);
#endif
BLANK();
DEFINE(PAGE_SZ, PAGE_SIZE);
BLANK();
......
......@@ -220,7 +220,6 @@ static void ecard_do_request(struct ecard_request *req)
}
}
#ifdef CONFIG_CPU_32
#include <linux/completion.h>
static pid_t ecard_pid;
......@@ -341,13 +340,6 @@ ecard_call(struct ecard_request *req)
*/
wait_for_completion(&ecard_completion);
}
#else
/*
* On 26-bit processors, we don't need the kcardd thread to access the
* expansion card loaders. We do it directly.
*/
#define ecard_call(req) ecard_do_request(req)
#endif
/* ======================= Mid-level card control ===================== */
......@@ -1026,9 +1018,7 @@ static int __init ecard_init(void)
{
int slot, irqhw;
#ifdef CONFIG_CPU_32
init_waitqueue_head(&ecard_wait);
#endif
printk("Probing expansion cards\n");
......
......@@ -41,14 +41,8 @@
@ Stack format (ensured by USER_* and SVC_*)
@
#define S_FRAME_SIZE 72
#ifdef CONFIG_CPU_32
#define S_OLD_R0 68
#define S_PSR 64
#else
#define S_OLD_R0 64
#define S_PSR 60
#define S_PC 60
#endif
#define S_PC 60
#define S_LR 56
......@@ -68,8 +62,6 @@
#define S_R0 0
#define S_OFF 8
#ifdef CONFIG_CPU_32
.macro set_cpsr_c, reg, mode
#if 1
/* broken binutils */
......@@ -160,58 +152,6 @@
#endif
.endm
#else
.macro save_user_regs
str r0, [sp, #-4]!
str lr, [sp, #-4]!
sub sp, sp, #15*4
stmia sp, {r0 - lr}^
mov r0, r0
.endm
.macro restore_user_regs
ldmia sp, {r0 - lr}^
mov r0, r0
ldr lr, [sp, #15*4]
add sp, sp, #15*4+8
movs pc, lr
.endm
.macro fast_restore_user_regs
add sp, sp, #S_OFF
ldmib sp, {r1 - lr}^
mov r0, r0
ldr lr, [sp, #15*4]
add sp, sp, #15*4+8
movs pc, lr
.endm
.macro mask_pc, rd, rm
bic \rd, \rm, #PCMASK
.endm
.macro enable_irqs, temp
teqp pc, #0x00000003
.endm
.macro initialise_traps_extra
.endm
.macro get_thread_info, rd
mov \rd, sp, lsr #13
mov \rd, \rd, lsl #13
.endm
/*
* Like adr, but force SVC mode (if required)
*/
.macro adrsvc, cond, reg, label
adr\cond \reg, \label
orr\cond \reg, \reg, #0x08000003
.endm
#endif
/*
* These are the registers used in the syscall handler, and allow us to
......
......@@ -54,7 +54,6 @@
static unsigned long no_fiq_insn;
#ifdef CONFIG_CPU_32
static inline void unprotect_page_0(void)
{
modify_domain(DOMAIN_USER, DOMAIN_MANAGER);
......@@ -64,12 +63,6 @@ static inline void protect_page_0(void)
{
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
}
#else
#define unprotect_page_0()
#define protect_page_0()
#endif
/* Default reacquire function
* - we always relinquish FIQ control
......@@ -120,17 +113,6 @@ void set_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp, tmp2;
__asm__ volatile (
#ifdef CONFIG_CPU_26
"mov %0, pc
bic %1, %0, #0x3
orr %1, %1, %3
teqp %1, #0 @ select FIQ mode
mov r0, r0
ldmia %2, {r8 - r14}
teqp %0, #0 @ return to SVC mode
mov r0, r0"
#endif
#ifdef CONFIG_CPU_32
"mrs %0, cpsr
mov %1, %3
msr cpsr_c, %1 @ select FIQ mode
......@@ -138,7 +120,6 @@ void set_fiq_regs(struct pt_regs *regs)
ldmia %2, {r8 - r14}
msr cpsr_c, %0 @ return to SVC mode
mov r0, r0"
#endif
: "=&r" (tmp), "=&r" (tmp2)
: "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)
/* These registers aren't modified by the above code in a way
......@@ -152,17 +133,6 @@ void get_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp, tmp2;
__asm__ volatile (
#ifdef CONFIG_CPU_26
"mov %0, pc
bic %1, %0, #0x3
orr %1, %1, %3
teqp %1, #0 @ select FIQ mode
mov r0, r0
stmia %2, {r8 - r14}
teqp %0, #0 @ return to SVC mode
mov r0, r0"
#endif
#ifdef CONFIG_CPU_32
"mrs %0, cpsr
mov %1, %3
msr cpsr_c, %1 @ select FIQ mode
......@@ -170,7 +140,6 @@ void get_fiq_regs(struct pt_regs *regs)
stmia %2, {r8 - r14}
msr cpsr_c, %0 @ return to SVC mode
mov r0, r0"
#endif
: "=&r" (tmp), "=&r" (tmp2)
: "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)
/* These registers aren't modified by the above code in a way
......
......@@ -188,7 +188,6 @@ void show_regs(struct pt_regs * regs)
processor_modes[processor_mode(regs)],
thumb_mode(regs) ? " (T)" : "",
get_fs() == get_ds() ? "kernel" : "user");
#if defined(CONFIG_CPU_32)
{
unsigned int ctrl, transbase, dac;
__asm__ (
......@@ -199,7 +198,6 @@ void show_regs(struct pt_regs * regs)
printk("Control: %04X Table: %08X DAC: %08X\n",
ctrl, transbase, dac);
}
#endif
}
void show_fpregs(struct user_fp *regs)
......@@ -237,18 +235,9 @@ void show_fpregs(struct user_fp *regs)
static unsigned long *thread_info_head;
static unsigned int nr_thread_info;
#ifdef CONFIG_CPU_32
#define EXTRA_TASK_STRUCT 4
#define ll_alloc_task_struct() ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
#define ll_free_task_struct(p) free_pages((unsigned long)(p),1)
#else
extern unsigned long get_page_8k(int priority);
extern void free_page_8k(unsigned long page);
#define EXTRA_TASK_STRUCT 0
#define ll_alloc_task_struct() ((struct task_struct *)get_page_8k(GFP_KERNEL))
#define ll_free_task_struct(p) free_page_8k((unsigned long)(p))
#endif
struct thread_info *alloc_thread_info(void)
{
......
......@@ -177,44 +177,6 @@ int __down_trylock(struct semaphore * sem)
* registers (r0 to r3 and lr), but not ip, as we use it as a return
* value in some cases..
*/
#ifdef CONFIG_CPU_26
asm(" .align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __down_interruptible_failed \n\
__down_interruptible_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_interruptible \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __down_trylock_failed \n\
__down_trylock_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_trylock \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __up_wakeup \n\
__up_wakeup: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __up \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
");
#else
/* 32 bit version */
asm(" .align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
......@@ -250,4 +212,3 @@ __up_wakeup: \n\
ldmfd sp!, {r0 - r3, pc} \n\
");
#endif
......@@ -113,7 +113,6 @@ static struct resource io_res[] = {
#define lp1 io_res[1]
#define lp2 io_res[2]
#ifdef CONFIG_CPU_32
static const char *cache_types[16] = {
"write-through",
"write-back",
......@@ -231,10 +230,6 @@ static void __init dump_cpu_info(void)
}
}
#else
#define dump_cpu_info() do { } while (0)
#endif
int cpu_architecture(void)
{
int cpu_arch;
......@@ -768,7 +763,6 @@ static int c_show(struct seq_file *m, void *v)
}
seq_printf(m, "CPU revision\t: %d\n", processor_id & 15);
#ifdef CONFIG_CPU_32
{
unsigned int cache_info;
......@@ -791,7 +785,6 @@ static int c_show(struct seq_file *m, void *v)
}
}
}
#endif
seq_puts(m, "\n");
......
......@@ -174,9 +174,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
__get_user_error(regs->ARM_sp, &sc->arm_sp, err);
__get_user_error(regs->ARM_lr, &sc->arm_lr, err);
__get_user_error(regs->ARM_pc, &sc->arm_pc, err);
#ifdef CONFIG_CPU_32
__get_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err);
#endif
err |= !valid_user_regs(regs);
......@@ -292,9 +290,7 @@ setup_sigcontext(struct sigcontext *sc, /*struct _fpstate *fpstate,*/
__put_user_error(regs->ARM_sp, &sc->arm_sp, err);
__put_user_error(regs->ARM_lr, &sc->arm_lr, err);
__put_user_error(regs->ARM_pc, &sc->arm_pc, err);
#ifdef CONFIG_CPU_32
__put_user_error(regs->ARM_cpsr, &sc->arm_cpsr, err);
#endif
__put_user_error(current->thread.trap_no, &sc->trap_no, err);
__put_user_error(current->thread.error_code, &sc->error_code, err);
......@@ -328,7 +324,6 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
unsigned long handler = (unsigned long)ka->sa.sa_handler;
unsigned long retcode;
int thumb = 0;
#ifdef CONFIG_CPU_32
unsigned long cpsr = regs->ARM_cpsr & ~PSR_f;
/*
......@@ -350,7 +345,6 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
else
cpsr &= ~PSR_T_BIT;
}
#endif
#endif
if (ka->sa.sa_flags & SA_RESTORER) {
......@@ -378,10 +372,7 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
regs->ARM_sp = (unsigned long)frame;
regs->ARM_lr = retcode;
regs->ARM_pc = handler;
#ifdef CONFIG_CPU_32
regs->ARM_cpsr = cpsr;
#endif
return 0;
}
......
......@@ -271,31 +271,6 @@ asmlinkage void do_undefinstr(struct pt_regs *regs)
die_if_kernel("Oops - undefined instruction", regs, 0);
}
#ifdef CONFIG_CPU_26
asmlinkage void do_excpt(unsigned long address, struct pt_regs *regs, int mode)
{
siginfo_t info;
#ifdef CONFIG_DEBUG_USER
printk(KERN_INFO "%s (%d): address exception: pc=%08lx\n",
current->comm, current->pid, instruction_pointer(regs));
dump_instr(regs);
#endif
current->thread.error_code = 0;
current->thread.trap_no = 11;
info.si_signo = SIGBUS;
info.si_errno = 0;
info.si_code = BUS_ADRERR;
info.si_addr = (void *)address;
force_sig_info(SIGBUS, &info, current);
die_if_kernel("Oops - address exception", regs, mode);
}
#endif
asmlinkage void do_unexp_fiq (struct pt_regs *regs)
{
#ifndef CONFIG_IGNORE_FIQ
......@@ -405,7 +380,6 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
ptrace_break(current, regs);
return regs->ARM_r0;
#ifdef CONFIG_CPU_32
/*
* Flush a region from virtual address 'r0' to virtual address 'r1'
* _inclusive_. There is no alignment requirement on either address;
......@@ -435,14 +409,6 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
break;
regs->ARM_cpsr |= MODE32_BIT;
return regs->ARM_r0;
#else
case NR(cacheflush):
return 0;
case NR(usr26):
case NR(usr32):
break;
#endif
default:
/* Calls 9f00xx..9f07ff are defined to return -ENOSYS
......@@ -563,7 +529,5 @@ void __init trap_init(void)
if (base != 0)
printk(KERN_DEBUG "Relocating machine vectors to 0x%08lx\n",
base);
#ifdef CONFIG_CPU_32
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
#endif
}
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