Commit 6405c9cd authored by Steve French's avatar Steve French

Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6

parents bcc55c66 4c246edd
......@@ -121,24 +121,29 @@ osf_filldir(void *__buf, const char *name, int namlen, loff_t offset,
if (reclen > buf->count)
return -EINVAL;
d_ino = ino;
if (sizeof(d_ino) < sizeof(ino) && d_ino != ino)
if (sizeof(d_ino) < sizeof(ino) && d_ino != ino) {
buf->error = -EOVERFLOW;
return -EOVERFLOW;
}
if (buf->basep) {
if (put_user(offset, buf->basep))
return -EFAULT;
goto Efault;
buf->basep = NULL;
}
dirent = buf->dirent;
put_user(d_ino, &dirent->d_ino);
put_user(namlen, &dirent->d_namlen);
put_user(reclen, &dirent->d_reclen);
if (copy_to_user(dirent->d_name, name, namlen) ||
if (put_user(d_ino, &dirent->d_ino) ||
put_user(namlen, &dirent->d_namlen) ||
put_user(reclen, &dirent->d_reclen) ||
copy_to_user(dirent->d_name, name, namlen) ||
put_user(0, dirent->d_name + namlen))
return -EFAULT;
goto Efault;
dirent = (void __user *)dirent + reclen;
buf->dirent = dirent;
buf->count -= reclen;
return 0;
Efault:
buf->error = -EFAULT;
return -EFAULT;
}
asmlinkage int
......
......@@ -19,6 +19,8 @@
* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
*/
#include <asm/unaligned.h>
/* We don't use IO slowdowns on the ia64, but.. */
#define __SLOW_DOWN_IO do { } while (0)
#define SLOW_DOWN_IO do { } while (0)
......@@ -241,7 +243,7 @@ __insw (unsigned long port, void *dst, unsigned long count)
unsigned short *dp = dst;
while (count--)
*dp++ = platform_inw(port);
put_unaligned(platform_inw(port), dp++);
}
static inline void
......@@ -250,7 +252,7 @@ __insl (unsigned long port, void *dst, unsigned long count)
unsigned int *dp = dst;
while (count--)
*dp++ = platform_inl(port);
put_unaligned(platform_inl(port), dp++);
}
static inline void
......@@ -268,7 +270,7 @@ __outsw (unsigned long port, const void *src, unsigned long count)
const unsigned short *sp = src;
while (count--)
platform_outw(*sp++, port);
platform_outw(get_unaligned(sp++), port);
}
static inline void
......@@ -277,7 +279,7 @@ __outsl (unsigned long port, const void *src, unsigned long count)
const unsigned int *sp = src;
while (count--)
platform_outl(*sp++, port);
platform_outl(get_unaligned(sp++), port);
}
/*
......
......@@ -138,6 +138,7 @@ cpumask_t cpu_possible_map = CPU_MASK_NONE;
EXPORT_SYMBOL(cpu_possible_map);
cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
EXPORT_SYMBOL(cpu_core_map);
DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
......
......@@ -25,23 +25,9 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/initrd.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <linux/param.h> /* for HZ */
#include <linux/root_dev.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/bcache.h>
#include <asm/irq.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
......
......@@ -5,33 +5,22 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 1997, 1998, 2001, 07 by Ralf Baechle
* Copyright (C) 1996, 1997, 1998, 2001, 07, 08 by Ralf Baechle
* Copyright (C) 2001 MIPS Technologies, Inc.
* Copyright (C) 2007 by Thomas Bogendoerfer
*/
#include <linux/eisa.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/fb.h>
#include <linux/pm.h>
#include <linux/screen_info.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/jazz.h>
#include <asm/jazzdma.h>
#include <asm/reboot.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/time.h>
#include <asm/traps.h>
#include <asm/mc146818-time.h>
extern asmlinkage void jazz_handle_int(void);
......
......@@ -62,13 +62,13 @@ void arch_kgdb_breakpoint(void)
static void kgdb_call_nmi_hook(void *ignored)
{
kgdb_nmicallback(raw_smp_processor_id(), (void *)0);
kgdb_nmicallback(raw_smp_processor_id(), NULL);
}
void kgdb_roundup_cpus(unsigned long flags)
{
local_irq_enable();
smp_call_function(kgdb_call_nmi_hook, NULL, NULL);
smp_call_function(kgdb_call_nmi_hook, NULL, 0);
local_irq_disable();
}
......@@ -190,9 +190,6 @@ static int kgdb_mips_notify(struct notifier_block *self, unsigned long cmd,
struct pt_regs *regs = args->regs;
int trap = (regs->cp0_cause & 0x7c) >> 2;
if (fixup_exception(regs))
return NOTIFY_DONE;
/* Userpace events, ignore. */
if (user_mode(regs))
return NOTIFY_DONE;
......
......@@ -647,6 +647,12 @@ einval: li v0, -EINVAL
sys sys_timerfd_create 2
sys sys_timerfd_gettime 2
sys sys_timerfd_settime 4
sys sys_signalfd4 4
sys sys_eventfd2 2 /* 4325 */
sys sys_epoll_create1 1
sys sys_dup3 3
sys sys_pipe2 2
sys sys_inotify_init1 1
.endm
/* We pre-compute the number of _instruction_ bytes needed to
......
......@@ -481,4 +481,10 @@ sys_call_table:
PTR sys_timerfd_create /* 5280 */
PTR sys_timerfd_gettime
PTR sys_timerfd_settime
PTR sys_signalfd4
PTR sys_eventfd2
PTR sys_epoll_create1 /* 5285 */
PTR sys_dup3
PTR sys_pipe2
PTR sys_inotify_init1
.size sys_call_table,.-sys_call_table
......@@ -407,4 +407,10 @@ EXPORT(sysn32_call_table)
PTR sys_timerfd_create
PTR sys_timerfd_gettime /* 5285 */
PTR sys_timerfd_settime
PTR sys_signalfd4
PTR sys_eventfd2
PTR sys_epoll_create1
PTR sys_dup3 /* 5290 */
PTR sys_pipe2
PTR sys_inotify_init1
.size sysn32_call_table,.-sysn32_call_table
......@@ -529,4 +529,10 @@ sys_call_table:
PTR sys_timerfd_create
PTR sys_timerfd_gettime
PTR sys_timerfd_settime
PTR compat_sys_signalfd4
PTR sys_eventfd2 /* 4325 */
PTR sys_epoll_create1
PTR sys_dup3
PTR sys_pipe2
PTR sys_inotify_init1
.size sys_call_table,.-sys_call_table
......@@ -78,7 +78,7 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
/* Sanity check */
if (start + size < start) {
printk("Trying to add an invalid memory region, skipped\n");
pr_warning("Trying to add an invalid memory region, skipped\n");
return;
}
......@@ -92,7 +92,7 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
}
if (x == BOOT_MEM_MAP_MAX) {
printk("Ooops! Too many entries in the memory map!\n");
pr_err("Ooops! Too many entries in the memory map!\n");
return;
}
......@@ -108,22 +108,22 @@ static void __init print_memory_map(void)
const int field = 2 * sizeof(unsigned long);
for (i = 0; i < boot_mem_map.nr_map; i++) {
printk(" memory: %0*Lx @ %0*Lx ",
printk(KERN_INFO " memory: %0*Lx @ %0*Lx ",
field, (unsigned long long) boot_mem_map.map[i].size,
field, (unsigned long long) boot_mem_map.map[i].addr);
switch (boot_mem_map.map[i].type) {
case BOOT_MEM_RAM:
printk("(usable)\n");
printk(KERN_CONT "(usable)\n");
break;
case BOOT_MEM_ROM_DATA:
printk("(ROM data)\n");
printk(KERN_CONT "(ROM data)\n");
break;
case BOOT_MEM_RESERVED:
printk("(reserved)\n");
printk(KERN_CONT "(reserved)\n");
break;
default:
printk("type %lu\n", boot_mem_map.map[i].type);
printk(KERN_CONT "type %lu\n", boot_mem_map.map[i].type);
break;
}
}
......@@ -185,11 +185,11 @@ static unsigned long __init init_initrd(void)
sanitize:
if (initrd_start & ~PAGE_MASK) {
printk(KERN_ERR "initrd start must be page aligned\n");
pr_err("initrd start must be page aligned\n");
goto disable;
}
if (initrd_start < PAGE_OFFSET) {
printk(KERN_ERR "initrd start < PAGE_OFFSET\n");
pr_err("initrd start < PAGE_OFFSET\n");
goto disable;
}
......@@ -221,18 +221,18 @@ static void __init finalize_initrd(void)
goto disable;
}
if (__pa(initrd_end) > PFN_PHYS(max_low_pfn)) {
printk("Initrd extends beyond end of memory");
printk(KERN_ERR "Initrd extends beyond end of memory");
goto disable;
}
reserve_bootmem(__pa(initrd_start), size, BOOTMEM_DEFAULT);
initrd_below_start_ok = 1;
printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
pr_info("Initial ramdisk at: 0x%lx (%lu bytes)\n",
initrd_start, size);
return;
disable:
printk(" - disabling initrd\n");
printk(KERN_CONT " - disabling initrd\n");
initrd_start = 0;
initrd_end = 0;
}
......@@ -310,13 +310,11 @@ static void __init bootmem_init(void)
if (min_low_pfn >= max_low_pfn)
panic("Incorrect memory mapping !!!");
if (min_low_pfn > ARCH_PFN_OFFSET) {
printk(KERN_INFO
"Wasting %lu bytes for tracking %lu unused pages\n",
pr_info("Wasting %lu bytes for tracking %lu unused pages\n",
(min_low_pfn - ARCH_PFN_OFFSET) * sizeof(struct page),
min_low_pfn - ARCH_PFN_OFFSET);
} else if (min_low_pfn < ARCH_PFN_OFFSET) {
printk(KERN_INFO
"%lu free pages won't be used\n",
pr_info("%lu free pages won't be used\n",
ARCH_PFN_OFFSET - min_low_pfn);
}
min_low_pfn = ARCH_PFN_OFFSET;
......@@ -471,7 +469,7 @@ static void __init arch_mem_init(char **cmdline_p)
/* call board setup routine */
plat_mem_setup();
printk("Determined physical RAM map:\n");
pr_info("Determined physical RAM map:\n");
print_memory_map();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
......@@ -482,7 +480,7 @@ static void __init arch_mem_init(char **cmdline_p)
parse_early_param();
if (usermem) {
printk("User-defined physical RAM map:\n");
pr_info("User-defined physical RAM map:\n");
print_memory_map();
}
......
......@@ -205,6 +205,7 @@ int pcibus_to_node(struct pci_bus *bus)
return bc->nasid;
}
EXPORT_SYMBOL(pcibus_to_node);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
pci_fixup_ioc3);
......@@ -49,8 +49,6 @@
#define GPIO_ALE (1 << 0x0a)
#define GPIO_CLE (1 << 0x0b)
extern char *board_type;
static struct resource korina_dev0_res[] = {
{
.name = "korina_regs",
......@@ -265,14 +263,6 @@ static void __init parse_mac_addr(char *macstr)
}
/* DEVICE CONTROLLER 1 */
#define CFG_DC_DEV1 ((void *)0xb8010010)
#define CFG_DC_DEV2 ((void *)0xb8010020)
#define CFG_DC_DEVBASE 0x0
#define CFG_DC_DEVMASK 0x4
#define CFG_DC_DEVC 0x8
#define CFG_DC_DEVTC 0xC
/* NAND definitions */
#define NAND_CHIP_DELAY 25
......@@ -301,16 +291,16 @@ static void __init rb532_nand_setup(void)
static int __init plat_setup_devices(void)
{
/* Look for the CF card reader */
if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK))
if (!readl(IDT434_REG_BASE + DEV1MASK))
rb532_devs[1] = NULL;
else {
cf_slot0_res[0].start =
readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);
readl(IDT434_REG_BASE + DEV1BASE);
cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
}
/* Read the NAND resources from the device controller */
nand_slot0_res[0].start = readl(CFG_DC_DEV2 + CFG_DC_DEVBASE);
nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
/* Initialise the NAND device */
......
......@@ -328,6 +328,9 @@ void __init arch_init_irq(void)
void __init plat_time_init(void)
{
#ifdef CONFIG_CPU_TX49XX
mips_hpt_frequency = txx9_cpu_clock / 2;
#endif
txx9_board_vec->time_init();
}
......
......@@ -84,22 +84,28 @@ static int filldir(void * __buf, const char * name, int namlen, loff_t offset,
if (reclen > buf->count)
return -EINVAL;
d_ino = ino;
if (sizeof(d_ino) < sizeof(ino) && d_ino != ino)
if (sizeof(d_ino) < sizeof(ino) && d_ino != ino) {
buf->error = -EOVERFLOW;
return -EOVERFLOW;
}
dirent = buf->previous;
if (dirent)
put_user(offset, &dirent->d_off);
if (put_user(offset, &dirent->d_off))
goto Efault;
dirent = buf->current_dir;
if (put_user(d_ino, &dirent->d_ino) ||
put_user(reclen, &dirent->d_reclen) ||
put_user(namlen, &dirent->d_namlen) ||
copy_to_user(dirent->d_name, name, namlen) ||
put_user(0, dirent->d_name + namlen))
goto Efault;
buf->previous = dirent;
put_user(d_ino, &dirent->d_ino);
put_user(reclen, &dirent->d_reclen);
put_user(namlen, &dirent->d_namlen);
copy_to_user(dirent->d_name, name, namlen);
put_user(0, dirent->d_name + namlen);
dirent = (void __user *)dirent + reclen;
buf->current_dir = dirent;
buf->current_dir = (void __user *)dirent + reclen;
buf->count -= reclen;
return 0;
Efault:
buffer->error = -EFAULT;
return -EFAULT;
}
#undef NAME_OFFSET
......@@ -126,7 +132,9 @@ int hpux_getdents(unsigned int fd, struct hpux_dirent __user *dirent, unsigned i
error = buf.error;
lastdirent = buf.previous;
if (lastdirent) {
put_user(file->f_pos, &lastdirent->d_off);
if (put_user(file->f_pos, &lastdirent->d_off))
error = -EFAULT;
else
error = count - buf.count;
}
......
......@@ -411,7 +411,7 @@ pci0: pcie@f8008000 {
0xe000 0 0 1 &i8259 12 2
0xe100 0 0 2 &i8259 9 2
0xe200 0 0 3 &i8259 10 2
0xe300 0 0 4 &i8259 112
0xe300 0 0 4 &i8259 11 2
// IDSEL 0x1d Audio
0xe800 0 0 1 &i8259 6 2
......
......@@ -50,13 +50,14 @@ memory {
reg = <0x00000000 0x00000000>; // Filled in by U-Boot
};
soc8548@a0000000 {
soc@a0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xa0000000 0x100000>;
reg = <0xa0000000 0x1000>; // CCSRBAR
bus-frequency = <0>;
compatible = "fsl,mpc8548-immr", "simple-bus";
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
......@@ -83,6 +84,11 @@ i2c@3000 {
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
};
i2c@3100 {
......
......@@ -50,13 +50,14 @@ memory {
reg = <0x00000000 0x00000000>; // Filled in by U-Boot
};
soc8548@e0000000 {
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xe0000000 0x100000>;
reg = <0xe0000000 0x1000>; // CCSRBAR
bus-frequency = <0>;
compatible = "fsl,mpc8548-immr", "simple-bus";
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
......
......@@ -165,7 +165,7 @@ cuboot*)
binary=y
gzip=
case "$platform" in
*-mpc885ads|*-adder875*|*-ep88xc)
*-mpc866ads|*-mpc885ads|*-adder875*|*-ep88xc)
platformo=$object/cuboot-8xx.o
;;
*5200*|*-motionpro)
......
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......@@ -201,7 +201,6 @@ static void __init ps3_setup_arch(void)
ps3_firmware_version.rev);
ps3_spu_set_platform();
ps3_map_htab();
#ifdef CONFIG_SMP
smp_init_ps3();
......
......@@ -186,14 +186,24 @@ static void spu_unmap(struct spu *spu)
iounmap(spu_pdata(spu)->shadow);
}
/**
* setup_areas - Map the spu regions into the address space.
*
* The current HV requires the spu shadow regs to be mapped with the
* PTE page protection bits set as read-only (PP=3). This implementation
* uses the low level __ioremap() to bypass the page protection settings
* inforced by ioremap_flags() to get the needed PTE bits set for the
* shadow regs.
*/
static int __init setup_areas(struct spu *spu)
{
struct table {char* name; unsigned long addr; unsigned long size;};
static const unsigned long shadow_flags = _PAGE_NO_CACHE | 3;
spu_pdata(spu)->shadow = ioremap_flags(spu_pdata(spu)->shadow_addr,
spu_pdata(spu)->shadow = __ioremap(spu_pdata(spu)->shadow_addr,
sizeof(struct spe_shadow),
pgprot_val(PAGE_READONLY) |
_PAGE_NO_CACHE);
shadow_flags);
if (!spu_pdata(spu)->shadow) {
pr_debug("%s:%d: ioremap shadow failed\n", __func__, __LINE__);
goto fail_ioremap;
......
......@@ -71,6 +71,7 @@
int CMO_PrPSP = -1;
int CMO_SecPSP = -1;
unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT);
EXPORT_SYMBOL(CMO_PageSize);
int fwnmi_active; /* TRUE if an FWNMI handler is present */
......
......@@ -254,15 +254,11 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
return !!(in_be32(&iop->dat) & pin_mask);
}
static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
int value)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);
if (value)
cpm2_gc->cpdata |= pin_mask;
......@@ -270,6 +266,18 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
cpm2_gc->cpdata &= ~pin_mask;
out_be32(&iop->dat, cpm2_gc->cpdata);
}
static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);
__cpm2_gpio32_set(mm_gc, pin_mask, value);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
}
......@@ -277,14 +285,17 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);
setbits32(&iop->dir, pin_mask);
__cpm2_gpio32_set(mm_gc, pin_mask, val);
cpm2_gpio32_set(gc, gpio, val);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
return 0;
}
......@@ -292,13 +303,17 @@ static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask;
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);
clrbits32(&iop->dir, pin_mask);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
return 0;
}
......
......@@ -208,6 +208,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
if (uccf->uf_regs == NULL) {
printk(KERN_ERR "%s: Cannot map UCC registers\n", __func__);
kfree(uccf);
return -ENOMEM;
}
......@@ -355,6 +356,9 @@ void ucc_fast_free(struct ucc_fast_private * uccf)
if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
if (uccf->uf_regs)
iounmap(uccf->uf_regs);
kfree(uccf);
}
EXPORT_SYMBOL(ucc_fast_free);
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......@@ -55,7 +55,7 @@ SECTIONS
__start___ex_table = .;
*(__ex_table)
__stop___ex_table = .;
}
} :data
.data : { /* Data */
DATA_DATA
......
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