Commit 65417d9f authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher

drm/amd/include:cleanup vega10 mmhub header files.

Cleanup asic_reg/vega10/MMHUB folder.
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cde5c34f
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#include "dce/dce_12_0_offset.h" #include "dce/dce_12_0_offset.h"
#include "dce/dce_12_0_sh_mask.h" #include "dce/dce_12_0_sh_mask.h"
#include "vega10/vega10_enum.h" #include "vega10/vega10_enum.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h" #include "mmhub/mmhub_1_0_offset.h"
#include "athub/athub_1_0_offset.h" #include "athub/athub_1_0_offset.h"
#include "soc15_common.h" #include "soc15_common.h"
......
...@@ -24,9 +24,9 @@ ...@@ -24,9 +24,9 @@
#include "mmhub_v1_0.h" #include "mmhub_v1_0.h"
#include "vega10/soc15ip.h" #include "vega10/soc15ip.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h" #include "mmhub/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h" #include "mmhub/mmhub_1_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_default.h" #include "mmhub/mmhub_1_0_default.h"
#include "athub/athub_1_0_offset.h" #include "athub/athub_1_0_offset.h"
#include "athub/athub_1_0_sh_mask.h" #include "athub/athub_1_0_sh_mask.h"
#include "vega10/vega10_enum.h" #include "vega10/vega10_enum.h"
......
...@@ -32,8 +32,8 @@ ...@@ -32,8 +32,8 @@
#include "sdma0/sdma0_4_0_sh_mask.h" #include "sdma0/sdma0_4_0_sh_mask.h"
#include "sdma1/sdma1_4_0_offset.h" #include "sdma1/sdma1_4_0_offset.h"
#include "sdma1/sdma1_4_0_sh_mask.h" #include "sdma1/sdma1_4_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h" #include "mmhub/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h" #include "mmhub/mmhub_1_0_sh_mask.h"
#include "hdp/hdp_4_0_offset.h" #include "hdp/hdp_4_0_offset.h"
#include "raven1/SDMA0/sdma0_4_1_default.h" #include "raven1/SDMA0/sdma0_4_1_default.h"
......
...@@ -37,8 +37,8 @@ ...@@ -37,8 +37,8 @@
#include "vce/vce_4_0_sh_mask.h" #include "vce/vce_4_0_sh_mask.h"
#include "vega10/NBIF/nbif_6_1_offset.h" #include "vega10/NBIF/nbif_6_1_offset.h"
#include "hdp/hdp_4_0_offset.h" #include "hdp/hdp_4_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h" #include "mmhub/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h" #include "mmhub/mmhub_1_0_sh_mask.h"
static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev); static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev);
static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev); static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev);
......
...@@ -36,8 +36,8 @@ ...@@ -36,8 +36,8 @@
#include "vce/vce_4_0_offset.h" #include "vce/vce_4_0_offset.h"
#include "vce/vce_4_0_default.h" #include "vce/vce_4_0_default.h"
#include "vce/vce_4_0_sh_mask.h" #include "vce/vce_4_0_sh_mask.h"
#include "vega10/MMHUB/mmhub_1_0_offset.h" #include "mmhub/mmhub_1_0_offset.h"
#include "vega10/MMHUB/mmhub_1_0_sh_mask.h" #include "mmhub/mmhub_1_0_sh_mask.h"
#define VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK 0x02 #define VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK 0x02
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment