Commit 669cefb6 authored by Lang Cheng's avatar Lang Cheng Committed by Jason Gunthorpe

RDMA/hns: Remove jiffies operation in disable interrupt context

In some functions, the jiffies operation is unnecessary, and we can
control delay using mdelay and udelay functions only.  Especially, in
hns_roce_v1_clear_hem, the function calls spin_lock_irqsave, the context
disables interrupt, so we can not use jiffies and msleep functions.
Signed-off-by: default avatarLang Cheng <chenglang@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent 780f3396
...@@ -376,19 +376,20 @@ static int hns_roce_set_hem(struct hns_roce_dev *hr_dev, ...@@ -376,19 +376,20 @@ static int hns_roce_set_hem(struct hns_roce_dev *hr_dev,
bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG; bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG;
end = msecs_to_jiffies(HW_SYNC_TIMEOUT_MSECS) + jiffies; end = HW_SYNC_TIMEOUT_MSECS;
while (1) { while (end) {
if (readl(bt_cmd) >> BT_CMD_SYNC_SHIFT) { if (!readl(bt_cmd) >> BT_CMD_SYNC_SHIFT)
if (!(time_before(jiffies, end))) { break;
mdelay(HW_SYNC_SLEEP_TIME_INTERVAL);
end -= HW_SYNC_SLEEP_TIME_INTERVAL;
}
if (end <= 0) {
dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n"); dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n");
spin_unlock_irqrestore(lock, flags); spin_unlock_irqrestore(lock, flags);
return -EBUSY; return -EBUSY;
} }
} else {
break;
}
mdelay(HW_SYNC_SLEEP_TIME_INTERVAL);
}
bt_cmd_l = (u32)bt_ba; bt_cmd_l = (u32)bt_ba;
roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M, roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M,
......
...@@ -965,8 +965,7 @@ static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev) ...@@ -965,8 +965,7 @@ static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev)
struct hns_roce_free_mr *free_mr; struct hns_roce_free_mr *free_mr;
struct hns_roce_v1_priv *priv; struct hns_roce_v1_priv *priv;
struct completion comp; struct completion comp;
unsigned long end = unsigned long end = HNS_ROCE_V1_RECREATE_LP_QP_TIMEOUT_MSECS;
msecs_to_jiffies(HNS_ROCE_V1_RECREATE_LP_QP_TIMEOUT_MSECS) + jiffies;
priv = (struct hns_roce_v1_priv *)hr_dev->priv; priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr; free_mr = &priv->free_mr;
...@@ -986,10 +985,11 @@ static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev) ...@@ -986,10 +985,11 @@ static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev)
queue_work(free_mr->free_mr_wq, &(lp_qp_work->work)); queue_work(free_mr->free_mr_wq, &(lp_qp_work->work));
while (time_before_eq(jiffies, end)) { while (end) {
if (try_wait_for_completion(&comp)) if (try_wait_for_completion(&comp))
return 0; return 0;
msleep(HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE); msleep(HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE);
end -= HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE;
} }
lp_qp_work->comp_flag = 0; lp_qp_work->comp_flag = 0;
...@@ -1103,8 +1103,7 @@ static int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev, ...@@ -1103,8 +1103,7 @@ static int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev,
struct hns_roce_free_mr *free_mr; struct hns_roce_free_mr *free_mr;
struct hns_roce_v1_priv *priv; struct hns_roce_v1_priv *priv;
struct completion comp; struct completion comp;
unsigned long end = unsigned long end = HNS_ROCE_V1_FREE_MR_TIMEOUT_MSECS;
msecs_to_jiffies(HNS_ROCE_V1_FREE_MR_TIMEOUT_MSECS) + jiffies;
unsigned long start = jiffies; unsigned long start = jiffies;
int npages; int npages;
int ret = 0; int ret = 0;
...@@ -1134,10 +1133,11 @@ static int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev, ...@@ -1134,10 +1133,11 @@ static int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev,
queue_work(free_mr->free_mr_wq, &(mr_work->work)); queue_work(free_mr->free_mr_wq, &(mr_work->work));
while (time_before_eq(jiffies, end)) { while (end) {
if (try_wait_for_completion(&comp)) if (try_wait_for_completion(&comp))
goto free_mr; goto free_mr;
msleep(HNS_ROCE_V1_FREE_MR_WAIT_VALUE); msleep(HNS_ROCE_V1_FREE_MR_WAIT_VALUE);
end -= HNS_ROCE_V1_FREE_MR_WAIT_VALUE;
} }
mr_work->comp_flag = 0; mr_work->comp_flag = 0;
...@@ -2462,10 +2462,10 @@ static int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev, ...@@ -2462,10 +2462,10 @@ static int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev,
bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG; bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG;
end = msecs_to_jiffies(HW_SYNC_TIMEOUT_MSECS) + jiffies; end = HW_SYNC_TIMEOUT_MSECS;
while (1) { while (1) {
if (readl(bt_cmd) >> BT_CMD_SYNC_SHIFT) { if (readl(bt_cmd) >> BT_CMD_SYNC_SHIFT) {
if (!(time_before(jiffies, end))) { if (end < 0) {
dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n"); dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n");
spin_unlock_irqrestore(&hr_dev->bt_cmd_lock, spin_unlock_irqrestore(&hr_dev->bt_cmd_lock,
flags); flags);
...@@ -2474,7 +2474,8 @@ static int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev, ...@@ -2474,7 +2474,8 @@ static int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev,
} else { } else {
break; break;
} }
msleep(HW_SYNC_SLEEP_TIME_INTERVAL); mdelay(HW_SYNC_SLEEP_TIME_INTERVAL);
end -= HW_SYNC_SLEEP_TIME_INTERVAL;
} }
bt_cmd_val[0] = (__le32)bt_ba; bt_cmd_val[0] = (__le32)bt_ba;
......
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