Commit 6a1fef6d authored by Sriram's avatar Sriram Committed by David S. Miller

net: davinci_emac:Fix translation logic for buffer descriptor

With recent changes to the driver(switch to new cpdma layer),
the support for buffer descriptor address translation logic
is broken. This affects platforms where the physical address of
the descriptors as seen by the DMA engine is different from the
physical address.

Original Patch adding translation logic support:
Commit: ad021ae8Signed-off-by: default avatarSriramakrishnan A G <srk@ti.com>
Tested-By: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9c7a4f9c
...@@ -76,6 +76,7 @@ struct cpdma_desc { ...@@ -76,6 +76,7 @@ struct cpdma_desc {
struct cpdma_desc_pool { struct cpdma_desc_pool {
u32 phys; u32 phys;
u32 hw_addr;
void __iomem *iomap; /* ioremap map */ void __iomem *iomap; /* ioremap map */
void *cpumap; /* dma_alloc map */ void *cpumap; /* dma_alloc map */
int desc_size, mem_size; int desc_size, mem_size;
...@@ -137,7 +138,8 @@ struct cpdma_chan { ...@@ -137,7 +138,8 @@ struct cpdma_chan {
* abstract out these details * abstract out these details
*/ */
static struct cpdma_desc_pool * static struct cpdma_desc_pool *
cpdma_desc_pool_create(struct device *dev, u32 phys, int size, int align) cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr,
int size, int align)
{ {
int bitmap_size; int bitmap_size;
struct cpdma_desc_pool *pool; struct cpdma_desc_pool *pool;
...@@ -161,10 +163,12 @@ cpdma_desc_pool_create(struct device *dev, u32 phys, int size, int align) ...@@ -161,10 +163,12 @@ cpdma_desc_pool_create(struct device *dev, u32 phys, int size, int align)
if (phys) { if (phys) {
pool->phys = phys; pool->phys = phys;
pool->iomap = ioremap(phys, size); pool->iomap = ioremap(phys, size);
pool->hw_addr = hw_addr;
} else { } else {
pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys, pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys,
GFP_KERNEL); GFP_KERNEL);
pool->iomap = (void __force __iomem *)pool->cpumap; pool->iomap = (void __force __iomem *)pool->cpumap;
pool->hw_addr = pool->phys;
} }
if (pool->iomap) if (pool->iomap)
...@@ -201,14 +205,14 @@ static inline dma_addr_t desc_phys(struct cpdma_desc_pool *pool, ...@@ -201,14 +205,14 @@ static inline dma_addr_t desc_phys(struct cpdma_desc_pool *pool,
{ {
if (!desc) if (!desc)
return 0; return 0;
return pool->phys + (__force dma_addr_t)desc - return pool->hw_addr + (__force dma_addr_t)desc -
(__force dma_addr_t)pool->iomap; (__force dma_addr_t)pool->iomap;
} }
static inline struct cpdma_desc __iomem * static inline struct cpdma_desc __iomem *
desc_from_phys(struct cpdma_desc_pool *pool, dma_addr_t dma) desc_from_phys(struct cpdma_desc_pool *pool, dma_addr_t dma)
{ {
return dma ? pool->iomap + dma - pool->phys : NULL; return dma ? pool->iomap + dma - pool->hw_addr : NULL;
} }
static struct cpdma_desc __iomem * static struct cpdma_desc __iomem *
...@@ -260,6 +264,7 @@ struct cpdma_ctlr *cpdma_ctlr_create(struct cpdma_params *params) ...@@ -260,6 +264,7 @@ struct cpdma_ctlr *cpdma_ctlr_create(struct cpdma_params *params)
ctlr->pool = cpdma_desc_pool_create(ctlr->dev, ctlr->pool = cpdma_desc_pool_create(ctlr->dev,
ctlr->params.desc_mem_phys, ctlr->params.desc_mem_phys,
ctlr->params.desc_hw_addr,
ctlr->params.desc_mem_size, ctlr->params.desc_mem_size,
ctlr->params.desc_align); ctlr->params.desc_align);
if (!ctlr->pool) { if (!ctlr->pool) {
......
...@@ -33,6 +33,7 @@ struct cpdma_params { ...@@ -33,6 +33,7 @@ struct cpdma_params {
bool has_soft_reset; bool has_soft_reset;
int min_packet_size; int min_packet_size;
u32 desc_mem_phys; u32 desc_mem_phys;
u32 desc_hw_addr;
int desc_mem_size; int desc_mem_size;
int desc_align; int desc_align;
......
...@@ -1854,10 +1854,13 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev) ...@@ -1854,10 +1854,13 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
dma_params.rxcp = priv->emac_base + 0x660; dma_params.rxcp = priv->emac_base + 0x660;
dma_params.num_chan = EMAC_MAX_TXRX_CHANNELS; dma_params.num_chan = EMAC_MAX_TXRX_CHANNELS;
dma_params.min_packet_size = EMAC_DEF_MIN_ETHPKTSIZE; dma_params.min_packet_size = EMAC_DEF_MIN_ETHPKTSIZE;
dma_params.desc_mem_phys = hw_ram_addr; dma_params.desc_hw_addr = hw_ram_addr;
dma_params.desc_mem_size = pdata->ctrl_ram_size; dma_params.desc_mem_size = pdata->ctrl_ram_size;
dma_params.desc_align = 16; dma_params.desc_align = 16;
dma_params.desc_mem_phys = pdata->no_bd_ram ? 0 :
(u32 __force)res->start + pdata->ctrl_ram_offset;
priv->dma = cpdma_ctlr_create(&dma_params); priv->dma = cpdma_ctlr_create(&dma_params);
if (!priv->dma) { if (!priv->dma) {
dev_err(emac_dev, "DaVinci EMAC: Error initializing DMA\n"); dev_err(emac_dev, "DaVinci EMAC: Error initializing DMA\n");
......
...@@ -36,6 +36,7 @@ struct emac_platform_data { ...@@ -36,6 +36,7 @@ struct emac_platform_data {
u8 rmii_en; u8 rmii_en;
u8 version; u8 version;
bool no_bd_ram;
void (*interrupt_enable) (void); void (*interrupt_enable) (void);
void (*interrupt_disable) (void); void (*interrupt_disable) (void);
}; };
......
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