Commit 6bcb2db5 authored by Borislav Petkov's avatar Borislav Petkov Committed by Ingo Molnar

perf/x86: Move perf_event_intel_uncore.[ch] .. => x86/events/intel/uncore.[ch]

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1455098123-11740-10-git-send-email-bp@alien8.deSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 609d809f
...@@ -8,3 +8,4 @@ endif ...@@ -8,3 +8,4 @@ endif
obj-$(CONFIG_CPU_SUP_INTEL) += intel/core.o intel/bts.o intel/cqm.o obj-$(CONFIG_CPU_SUP_INTEL) += intel/core.o intel/bts.o intel/cqm.o
obj-$(CONFIG_CPU_SUP_INTEL) += intel/cstate.o intel/ds.o intel/lbr.o obj-$(CONFIG_CPU_SUP_INTEL) += intel/cstate.o intel/ds.o intel/lbr.o
obj-$(CONFIG_CPU_SUP_INTEL) += intel/pt.o intel/rapl.o obj-$(CONFIG_CPU_SUP_INTEL) += intel/pt.o intel/rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel/uncore.o
#include "perf_event_intel_uncore.h" #include "uncore.h"
static struct intel_uncore_type *empty_uncore[] = { NULL, }; static struct intel_uncore_type *empty_uncore[] = { NULL, };
struct intel_uncore_type **uncore_msr_uncores = empty_uncore; struct intel_uncore_type **uncore_msr_uncores = empty_uncore;
......
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/perf_event.h> #include <linux/perf_event.h>
#include "perf_event.h" #include "../../kernel/cpu/perf_event.h"
#define UNCORE_PMU_NAME_LEN 32 #define UNCORE_PMU_NAME_LEN 32
#define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC) #define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
......
...@@ -33,8 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o ...@@ -33,8 +33,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
ifdef CONFIG_PERF_EVENTS ifdef CONFIG_PERF_EVENTS
obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \ obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore_snb.o \
perf_event_intel_uncore_snb.o \
perf_event_intel_uncore_snbep.o \ perf_event_intel_uncore_snbep.o \
perf_event_intel_uncore_nhmex.o perf_event_intel_uncore_nhmex.o
obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_msr.o obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_msr.o
......
/* Nehalem-EX/Westmere-EX uncore support */ /* Nehalem-EX/Westmere-EX uncore support */
#include "perf_event_intel_uncore.h" #include "../../events/intel/uncore.h"
/* NHM-EX event control */ /* NHM-EX event control */
#define NHMEX_PMON_CTL_EV_SEL_MASK 0x000000ff #define NHMEX_PMON_CTL_EV_SEL_MASK 0x000000ff
......
/* Nehalem/SandBridge/Haswell uncore support */ /* Nehalem/SandBridge/Haswell uncore support */
#include "perf_event_intel_uncore.h" #include "../../events/intel/uncore.h"
/* Uncore IMC PCI IDs */ /* Uncore IMC PCI IDs */
#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100 #define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100
......
/* SandyBridge-EP/IvyTown uncore support */ /* SandyBridge-EP/IvyTown uncore support */
#include "perf_event_intel_uncore.h" #include "../../events/intel/uncore.h"
/* SNB-EP Box level control */ /* SNB-EP Box level control */
#define SNBEP_PMON_BOX_CTL_RST_CTRL (1 << 0) #define SNBEP_PMON_BOX_CTL_RST_CTRL (1 << 0)
......
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