Commit 6d8126f9 authored by Al Viro's avatar Al Viro Committed by Jeff Garzik

igb trivial annotations

Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 7deb07b1
......@@ -61,28 +61,28 @@
/* Receive Descriptor - Advanced */
union e1000_adv_rx_desc {
struct {
u64 pkt_addr; /* Packet buffer address */
u64 hdr_addr; /* Header buffer address */
__le64 pkt_addr; /* Packet buffer address */
__le64 hdr_addr; /* Header buffer address */
} read;
struct {
struct {
struct {
u16 pkt_info; /* RSS type, Packet type */
u16 hdr_info; /* Split Header,
__le16 pkt_info; /* RSS type, Packet type */
__le16 hdr_info; /* Split Header,
* header buffer length */
} lo_dword;
union {
u32 rss; /* RSS Hash */
__le32 rss; /* RSS Hash */
struct {
u16 ip_id; /* IP id */
u16 csum; /* Packet Checksum */
__le16 ip_id; /* IP id */
__le16 csum; /* Packet Checksum */
} csum_ip;
} hi_dword;
} lower;
struct {
u32 status_error; /* ext status/error */
u16 length; /* Packet length */
u16 vlan; /* VLAN tag */
__le32 status_error; /* ext status/error */
__le16 length; /* Packet length */
__le16 vlan; /* VLAN tag */
} upper;
} wb; /* writeback */
};
......@@ -97,14 +97,14 @@ union e1000_adv_rx_desc {
/* Transmit Descriptor - Advanced */
union e1000_adv_tx_desc {
struct {
u64 buffer_addr; /* Address of descriptor's data buf */
u32 cmd_type_len;
u32 olinfo_status;
__le64 buffer_addr; /* Address of descriptor's data buf */
__le32 cmd_type_len;
__le32 olinfo_status;
} read;
struct {
u64 rsvd; /* Reserved */
u32 nxtseq_seed;
u32 status;
__le64 rsvd; /* Reserved */
__le32 nxtseq_seed;
__le32 status;
} wb;
};
......@@ -119,10 +119,10 @@ union e1000_adv_tx_desc {
/* Context descriptors */
struct e1000_adv_tx_context_desc {
u32 vlan_macip_lens;
u32 seqnum_seed;
u32 type_tucmd_mlhl;
u32 mss_l4len_idx;
__le32 vlan_macip_lens;
__le32 seqnum_seed;
__le32 type_tucmd_mlhl;
__le32 mss_l4len_idx;
};
#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
......
......@@ -143,35 +143,35 @@ enum e1000_fc_type {
/* Receive Descriptor */
struct e1000_rx_desc {
u64 buffer_addr; /* Address of the descriptor's data buffer */
u16 length; /* Length of data DMAed into data buffer */
u16 csum; /* Packet checksum */
__le64 buffer_addr; /* Address of the descriptor's data buffer */
__le16 length; /* Length of data DMAed into data buffer */
__le16 csum; /* Packet checksum */
u8 status; /* Descriptor status */
u8 errors; /* Descriptor Errors */
u16 special;
__le16 special;
};
/* Receive Descriptor - Extended */
union e1000_rx_desc_extended {
struct {
u64 buffer_addr;
u64 reserved;
__le64 buffer_addr;
__le64 reserved;
} read;
struct {
struct {
u32 mrq; /* Multiple Rx Queues */
__le32 mrq; /* Multiple Rx Queues */
union {
u32 rss; /* RSS Hash */
__le32 rss; /* RSS Hash */
struct {
u16 ip_id; /* IP id */
u16 csum; /* Packet Checksum */
__le16 ip_id; /* IP id */
__le16 csum; /* Packet Checksum */
} csum_ip;
} hi_dword;
} lower;
struct {
u32 status_error; /* ext status/error */
u16 length;
u16 vlan; /* VLAN tag */
__le32 status_error; /* ext status/error */
__le16 length;
__le16 vlan; /* VLAN tag */
} upper;
} wb; /* writeback */
};
......@@ -181,49 +181,49 @@ union e1000_rx_desc_extended {
union e1000_rx_desc_packet_split {
struct {
/* one buffer for protocol header(s), three data buffers */
u64 buffer_addr[MAX_PS_BUFFERS];
__le64 buffer_addr[MAX_PS_BUFFERS];
} read;
struct {
struct {
u32 mrq; /* Multiple Rx Queues */
__le32 mrq; /* Multiple Rx Queues */
union {
u32 rss; /* RSS Hash */
__le32 rss; /* RSS Hash */
struct {
u16 ip_id; /* IP id */
u16 csum; /* Packet Checksum */
__le16 ip_id; /* IP id */
__le16 csum; /* Packet Checksum */
} csum_ip;
} hi_dword;
} lower;
struct {
u32 status_error; /* ext status/error */
u16 length0; /* length of buffer 0 */
u16 vlan; /* VLAN tag */
__le32 status_error; /* ext status/error */
__le16 length0; /* length of buffer 0 */
__le16 vlan; /* VLAN tag */
} middle;
struct {
u16 header_status;
u16 length[3]; /* length of buffers 1-3 */
__le16 header_status;
__le16 length[3]; /* length of buffers 1-3 */
} upper;
u64 reserved;
__le64 reserved;
} wb; /* writeback */
};
/* Transmit Descriptor */
struct e1000_tx_desc {
u64 buffer_addr; /* Address of the descriptor's data buffer */
__le64 buffer_addr; /* Address of the descriptor's data buffer */
union {
u32 data;
__le32 data;
struct {
u16 length; /* Data buffer length */
__le16 length; /* Data buffer length */
u8 cso; /* Checksum offset */
u8 cmd; /* Descriptor control */
} flags;
} lower;
union {
u32 data;
__le32 data;
struct {
u8 status; /* Descriptor status */
u8 css; /* Checksum start */
u16 special;
__le16 special;
} fields;
} upper;
};
......@@ -231,49 +231,49 @@ struct e1000_tx_desc {
/* Offload Context Descriptor */
struct e1000_context_desc {
union {
u32 ip_config;
__le32 ip_config;
struct {
u8 ipcss; /* IP checksum start */
u8 ipcso; /* IP checksum offset */
u16 ipcse; /* IP checksum end */
__le16 ipcse; /* IP checksum end */
} ip_fields;
} lower_setup;
union {
u32 tcp_config;
__le32 tcp_config;
struct {
u8 tucss; /* TCP checksum start */
u8 tucso; /* TCP checksum offset */
u16 tucse; /* TCP checksum end */
__le16 tucse; /* TCP checksum end */
} tcp_fields;
} upper_setup;
u32 cmd_and_length;
__le32 cmd_and_length;
union {
u32 data;
__le32 data;
struct {
u8 status; /* Descriptor status */
u8 hdr_len; /* Header length */
u16 mss; /* Maximum segment size */
__le16 mss; /* Maximum segment size */
} fields;
} tcp_seg_setup;
};
/* Offload data descriptor */
struct e1000_data_desc {
u64 buffer_addr; /* Address of the descriptor's buffer address */
__le64 buffer_addr; /* Address of the descriptor's buffer address */
union {
u32 data;
__le32 data;
struct {
u16 length; /* Data buffer length */
__le16 length; /* Data buffer length */
u8 typ_len_ext;
u8 cmd;
} flags;
} lower;
union {
u32 data;
__le32 data;
struct {
u8 status; /* Descriptor status */
u8 popts; /* Packet Options */
u16 special;
__le16 special;
} fields;
} upper;
};
......
......@@ -3254,6 +3254,13 @@ static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
return 1;
}
static inline u32 get_head(struct igb_ring *tx_ring)
{
void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
return le32_to_cpu(*(volatile __le32 *)end);
}
/**
* igb_clean_tx_irq - Reclaim resources after transmit completes
* @adapter: board private structure
......@@ -3275,9 +3282,7 @@ static bool igb_clean_tx_irq(struct igb_adapter *adapter,
unsigned int total_bytes = 0, total_packets = 0;
rmb();
head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
+ tx_ring->count);
head = le32_to_cpu(head);
head = get_head(tx_ring);
i = tx_ring->next_to_clean;
while (1) {
while (i != head) {
......@@ -3312,9 +3317,7 @@ static bool igb_clean_tx_irq(struct igb_adapter *adapter,
}
oldhead = head;
rmb();
head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
+ tx_ring->count);
head = le32_to_cpu(head);
head = get_head(tx_ring);
if (head == oldhead)
goto done_cleaning;
} /* while (1) */
......@@ -3388,7 +3391,7 @@ static bool igb_clean_tx_irq(struct igb_adapter *adapter,
* @vlan: descriptor vlan field as written by hardware (no le/be conversion)
* @skb: pointer to sk_buff to be indicated to stack
**/
static void igb_receive_skb(struct igb_adapter *adapter, u8 status, u16 vlan,
static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
struct sk_buff *skb)
{
if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
......
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