Commit 6e76538b authored by Olof Johansson's avatar Olof Johansson

Merge branch 'v3.4-samsung-fixes-3' of...

Merge branch 'v3.4-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

* 'v3.4-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
  ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
  ARM: EXYNOS: Fix resource on dev-dwmci.c
  ARM: S3C24XX: Fix build warning for S3C2410_PM
  ARM: mini2440_defconfig: Fix build error
  ARM: EXYNOS: Fix incorrect initialization of GIC
  ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
parents dadb3660 9b4d1cbb
...@@ -14,6 +14,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y ...@@ -14,6 +14,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_ARCH_S3C24XX=y CONFIG_ARCH_S3C24XX=y
# CONFIG_CPU_S3C2410 is not set
CONFIG_CPU_S3C2440=y
CONFIG_S3C_ADC=y CONFIG_S3C_ADC=y
CONFIG_S3C24XX_PWM=y CONFIG_S3C24XX_PWM=y
CONFIG_MACH_MINI2440=y CONFIG_MACH_MINI2440=y
......
...@@ -497,25 +497,25 @@ static struct clk exynos4_init_clocks_off[] = { ...@@ -497,25 +497,25 @@ static struct clk exynos4_init_clocks_off[] = {
.ctrlbit = (1 << 3), .ctrlbit = (1 << 3),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.0", .devname = "exynos4-sdhci.0",
.parent = &exynos4_clk_aclk_133.clk, .parent = &exynos4_clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl, .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 5), .ctrlbit = (1 << 5),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.1", .devname = "exynos4-sdhci.1",
.parent = &exynos4_clk_aclk_133.clk, .parent = &exynos4_clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl, .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 6), .ctrlbit = (1 << 6),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.2", .devname = "exynos4-sdhci.2",
.parent = &exynos4_clk_aclk_133.clk, .parent = &exynos4_clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl, .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 7), .ctrlbit = (1 << 7),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.3", .devname = "exynos4-sdhci.3",
.parent = &exynos4_clk_aclk_133.clk, .parent = &exynos4_clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl, .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 8), .ctrlbit = (1 << 8),
...@@ -1202,7 +1202,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = { ...@@ -1202,7 +1202,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = {
static struct clksrc_clk exynos4_clk_sclk_mmc0 = { static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.0", .devname = "exynos4-sdhci.0",
.parent = &exynos4_clk_dout_mmc0.clk, .parent = &exynos4_clk_dout_mmc0.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl, .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 0), .ctrlbit = (1 << 0),
...@@ -1213,7 +1213,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = { ...@@ -1213,7 +1213,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
static struct clksrc_clk exynos4_clk_sclk_mmc1 = { static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.1", .devname = "exynos4-sdhci.1",
.parent = &exynos4_clk_dout_mmc1.clk, .parent = &exynos4_clk_dout_mmc1.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl, .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 4), .ctrlbit = (1 << 4),
...@@ -1224,7 +1224,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = { ...@@ -1224,7 +1224,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
static struct clksrc_clk exynos4_clk_sclk_mmc2 = { static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.2", .devname = "exynos4-sdhci.2",
.parent = &exynos4_clk_dout_mmc2.clk, .parent = &exynos4_clk_dout_mmc2.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl, .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 8), .ctrlbit = (1 << 8),
...@@ -1235,7 +1235,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = { ...@@ -1235,7 +1235,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
static struct clksrc_clk exynos4_clk_sclk_mmc3 = { static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.3", .devname = "exynos4-sdhci.3",
.parent = &exynos4_clk_dout_mmc3.clk, .parent = &exynos4_clk_dout_mmc3.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl, .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 12), .ctrlbit = (1 << 12),
...@@ -1340,10 +1340,10 @@ static struct clk_lookup exynos4_clk_lookup[] = { ...@@ -1340,10 +1340,10 @@ static struct clk_lookup exynos4_clk_lookup[] = {
CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk), CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk),
CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk), CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk),
CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk), CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk),
CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk), CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk), CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk), CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk), CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0), CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0), CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1), CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
......
...@@ -455,25 +455,25 @@ static struct clk exynos5_init_clocks_off[] = { ...@@ -455,25 +455,25 @@ static struct clk exynos5_init_clocks_off[] = {
.ctrlbit = (1 << 20), .ctrlbit = (1 << 20),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.0", .devname = "exynos4-sdhci.0",
.parent = &exynos5_clk_aclk_200.clk, .parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl, .enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 12), .ctrlbit = (1 << 12),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.1", .devname = "exynos4-sdhci.1",
.parent = &exynos5_clk_aclk_200.clk, .parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl, .enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 13), .ctrlbit = (1 << 13),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.2", .devname = "exynos4-sdhci.2",
.parent = &exynos5_clk_aclk_200.clk, .parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl, .enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 14), .ctrlbit = (1 << 14),
}, { }, {
.name = "hsmmc", .name = "hsmmc",
.devname = "s3c-sdhci.3", .devname = "exynos4-sdhci.3",
.parent = &exynos5_clk_aclk_200.clk, .parent = &exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl, .enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 15), .ctrlbit = (1 << 15),
...@@ -813,7 +813,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = { ...@@ -813,7 +813,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
static struct clksrc_clk exynos5_clk_sclk_mmc0 = { static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.0", .devname = "exynos4-sdhci.0",
.parent = &exynos5_clk_dout_mmc0.clk, .parent = &exynos5_clk_dout_mmc0.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl, .enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 0), .ctrlbit = (1 << 0),
...@@ -824,7 +824,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = { ...@@ -824,7 +824,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
static struct clksrc_clk exynos5_clk_sclk_mmc1 = { static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.1", .devname = "exynos4-sdhci.1",
.parent = &exynos5_clk_dout_mmc1.clk, .parent = &exynos5_clk_dout_mmc1.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl, .enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 4), .ctrlbit = (1 << 4),
...@@ -835,7 +835,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = { ...@@ -835,7 +835,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
static struct clksrc_clk exynos5_clk_sclk_mmc2 = { static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.2", .devname = "exynos4-sdhci.2",
.parent = &exynos5_clk_dout_mmc2.clk, .parent = &exynos5_clk_dout_mmc2.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl, .enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 8), .ctrlbit = (1 << 8),
...@@ -846,7 +846,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = { ...@@ -846,7 +846,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
static struct clksrc_clk exynos5_clk_sclk_mmc3 = { static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
.clk = { .clk = {
.name = "sclk_mmc", .name = "sclk_mmc",
.devname = "s3c-sdhci.3", .devname = "exynos4-sdhci.3",
.parent = &exynos5_clk_dout_mmc3.clk, .parent = &exynos5_clk_dout_mmc3.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl, .enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 12), .ctrlbit = (1 << 12),
...@@ -990,10 +990,10 @@ static struct clk_lookup exynos5_clk_lookup[] = { ...@@ -990,10 +990,10 @@ static struct clk_lookup exynos5_clk_lookup[] = {
CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk), CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk), CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk), CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk), CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk), CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk), CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk), CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
......
...@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void) ...@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void)
s3c_fimc_setname(2, "exynos4-fimc"); s3c_fimc_setname(2, "exynos4-fimc");
s3c_fimc_setname(3, "exynos4-fimc"); s3c_fimc_setname(3, "exynos4-fimc");
s3c_sdhci_setname(0, "exynos4-sdhci");
s3c_sdhci_setname(1, "exynos4-sdhci");
s3c_sdhci_setname(2, "exynos4-sdhci");
s3c_sdhci_setname(3, "exynos4-sdhci");
/* The I2C bus controllers are directly compatible with s3c2440 */ /* The I2C bus controllers are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c");
...@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void) ...@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void)
s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
s3c_sdhci_setname(0, "exynos4-sdhci");
s3c_sdhci_setname(1, "exynos4-sdhci");
s3c_sdhci_setname(2, "exynos4-sdhci");
s3c_sdhci_setname(3, "exynos4-sdhci");
/* The I2C bus controllers are directly compatible with s3c2440 */ /* The I2C bus controllers are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c");
...@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void) ...@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void)
{ {
int irq; int irq;
gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); #ifdef CONFIG_OF
of_irq_init(exynos4_dt_irq_match);
#endif
for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) { for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mmc/dw_mmc.h> #include <linux/mmc/dw_mmc.h>
#include <plat/devs.h> #include <plat/devs.h>
...@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data) ...@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
} }
static struct resource exynos4_dwmci_resource[] = { static struct resource exynos4_dwmci_resource[] = {
[0] = { [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
.start = EXYNOS4_PA_DWMCI, [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
.end = EXYNOS4_PA_DWMCI + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_DWMCI,
.end = IRQ_DWMCI,
.flags = IORESOURCE_IRQ,
}
}; };
static struct dw_mci_board exynos4_dwci_pdata = { static struct dw_mci_board exynos4_dwci_pdata = {
......
...@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = { ...@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
.host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
MMC_CAP_ERASE), MMC_CAP_ERASE),
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type = S3C_SDHCI_CD_PERMANENT, .cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
}; };
......
...@@ -747,6 +747,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { ...@@ -747,6 +747,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
.max_width = 8, .max_width = 8,
.host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type = S3C_SDHCI_CD_PERMANENT, .cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
}; };
......
...@@ -111,10 +111,6 @@ config S3C24XX_SETUP_TS ...@@ -111,10 +111,6 @@ config S3C24XX_SETUP_TS
help help
Compile in platform device definition for Samsung TouchScreen. Compile in platform device definition for Samsung TouchScreen.
# cpu-specific sections
if CPU_S3C2410
config S3C2410_DMA config S3C2410_DMA
bool bool
depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)
...@@ -127,6 +123,10 @@ config S3C2410_PM ...@@ -127,6 +123,10 @@ config S3C2410_PM
help help
Power Management code common to S3C2410 and better Power Management code common to S3C2410 and better
# cpu-specific sections
if CPU_S3C2410
config S3C24XX_SIMTEC_NOR config S3C24XX_SIMTEC_NOR
bool bool
help help
......
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
#include <linux/input.h> #include <linux/input.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <asm/hardware/vic.h> #include <asm/hardware/vic.h>
...@@ -765,6 +766,7 @@ static void __init goni_pmic_init(void) ...@@ -765,6 +766,7 @@ static void __init goni_pmic_init(void)
/* MoviNAND */ /* MoviNAND */
static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
.max_width = 4, .max_width = 4,
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type = S3C_SDHCI_CD_PERMANENT, .cd_type = S3C_SDHCI_CD_PERMANENT,
}; };
......
...@@ -18,6 +18,8 @@ ...@@ -18,6 +18,8 @@
#ifndef __PLAT_S3C_SDHCI_H #ifndef __PLAT_S3C_SDHCI_H
#define __PLAT_S3C_SDHCI_H __FILE__ #define __PLAT_S3C_SDHCI_H __FILE__
#include <plat/devs.h>
struct platform_device; struct platform_device;
struct mmc_host; struct mmc_host;
struct mmc_card; struct mmc_card;
...@@ -356,4 +358,30 @@ static inline void exynos4_default_sdhci3(void) { } ...@@ -356,4 +358,30 @@ static inline void exynos4_default_sdhci3(void) { }
#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */ #endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
static inline void s3c_sdhci_setname(int id, char *name)
{
switch (id) {
#ifdef CONFIG_S3C_DEV_HSMMC
case 0:
s3c_device_hsmmc0.name = name;
break;
#endif
#ifdef CONFIG_S3C_DEV_HSMMC1
case 1:
s3c_device_hsmmc1.name = name;
break;
#endif
#ifdef CONFIG_S3C_DEV_HSMMC2
case 2:
s3c_device_hsmmc2.name = name;
break;
#endif
#ifdef CONFIG_S3C_DEV_HSMMC3
case 3:
s3c_device_hsmmc3.name = name;
break;
#endif
}
}
#endif /* __PLAT_S3C_SDHCI_H */ #endif /* __PLAT_S3C_SDHCI_H */
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