Commit 6e899e6c authored by Neil Armstrong's avatar Neil Armstrong Committed by David S. Miller

net: dsa: Make mv88e6xxx use nested mdiobus read/write

Make the mv88e6xxx driver use the previously introduced nested
variants of mdiobus_read/write functions.
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 21dd19fe
...@@ -24,34 +24,6 @@ ...@@ -24,34 +24,6 @@
#include <net/switchdev.h> #include <net/switchdev.h>
#include "mv88e6xxx.h" #include "mv88e6xxx.h"
/* MDIO bus access can be nested in the case of PHYs connected to the
* internal MDIO bus of the switch, which is accessed via MDIO bus of
* the Ethernet interface. Avoid lockdep false positives by using
* mutex_lock_nested().
*/
static int mv88e6xxx_mdiobus_read(struct mii_bus *bus, int addr, u32 regnum)
{
int ret;
mutex_lock_nested(&bus->mdio_lock, SINGLE_DEPTH_NESTING);
ret = bus->read(bus, addr, regnum);
mutex_unlock(&bus->mdio_lock);
return ret;
}
static int mv88e6xxx_mdiobus_write(struct mii_bus *bus, int addr, u32 regnum,
u16 val)
{
int ret;
mutex_lock_nested(&bus->mdio_lock, SINGLE_DEPTH_NESTING);
ret = bus->write(bus, addr, regnum, val);
mutex_unlock(&bus->mdio_lock);
return ret;
}
/* If the switch's ADDR[4:0] strap pins are strapped to zero, it will /* If the switch's ADDR[4:0] strap pins are strapped to zero, it will
* use all 32 SMI bus addresses on its SMI bus, and all switch registers * use all 32 SMI bus addresses on its SMI bus, and all switch registers
* will be directly accessible on some {device address,register address} * will be directly accessible on some {device address,register address}
...@@ -66,7 +38,7 @@ static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr) ...@@ -66,7 +38,7 @@ static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr)
int i; int i;
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_CMD); ret = mdiobus_read_nested(bus, sw_addr, SMI_CMD);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -82,7 +54,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg) ...@@ -82,7 +54,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
int ret; int ret;
if (sw_addr == 0) if (sw_addr == 0)
return mv88e6xxx_mdiobus_read(bus, addr, reg); return mdiobus_read_nested(bus, addr, reg);
/* Wait for the bus to become free. */ /* Wait for the bus to become free. */
ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
...@@ -90,7 +62,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg) ...@@ -90,7 +62,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
return ret; return ret;
/* Transmit the read command. */ /* Transmit the read command. */
ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD, ret = mdiobus_write_nested(bus, sw_addr, SMI_CMD,
SMI_CMD_OP_22_READ | (addr << 5) | reg); SMI_CMD_OP_22_READ | (addr << 5) | reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -101,7 +73,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg) ...@@ -101,7 +73,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
return ret; return ret;
/* Read the data. */ /* Read the data. */
ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_DATA); ret = mdiobus_read_nested(bus, sw_addr, SMI_DATA);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -145,7 +117,7 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr, ...@@ -145,7 +117,7 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
int ret; int ret;
if (sw_addr == 0) if (sw_addr == 0)
return mv88e6xxx_mdiobus_write(bus, addr, reg, val); return mdiobus_write_nested(bus, addr, reg, val);
/* Wait for the bus to become free. */ /* Wait for the bus to become free. */
ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
...@@ -153,12 +125,12 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr, ...@@ -153,12 +125,12 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
return ret; return ret;
/* Transmit the data to write. */ /* Transmit the data to write. */
ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_DATA, val); ret = mdiobus_write_nested(bus, sw_addr, SMI_DATA, val);
if (ret < 0) if (ret < 0)
return ret; return ret;
/* Transmit the write command. */ /* Transmit the write command. */
ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD, ret = mdiobus_write_nested(bus, sw_addr, SMI_CMD,
SMI_CMD_OP_22_WRITE | (addr << 5) | reg); SMI_CMD_OP_22_WRITE | (addr << 5) | reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
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