Commit 71bd98af authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper <jason@lakedaemon.net>:

mvebu fixes for v3.9 round 3

 - Kirkwood
    - a couple of small fixes for the Iomega ix2-200 board (ether and led)
 - mvebu
    - allow GPIO button to work on Mirabox when running SMP

* tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: Fix the irq map function in SMP mode
  Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
  ARM: Kirkwood: Fix typo in the definition of ix2-200 rebuild LED
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b94db2ac 600468d0
...@@ -96,11 +96,11 @@ pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 { ...@@ -96,11 +96,11 @@ pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
marvell,function = "gpio"; marvell,function = "gpio";
}; };
pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
marvell,pins = "mpp44"; marvell,pins = "mpp46";
marvell,function = "gpio"; marvell,function = "gpio";
}; };
pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
marvell,pins = "mpp45"; marvell,pins = "mpp47";
marvell,function = "gpio"; marvell,function = "gpio";
}; };
...@@ -157,14 +157,14 @@ power_led { ...@@ -157,14 +157,14 @@ power_led {
gpios = <&gpio0 16 0>; gpios = <&gpio0 16 0>;
linux,default-trigger = "default-on"; linux,default-trigger = "default-on";
}; };
health_led1 { rebuild_led {
label = "status:white:rebuild_led";
gpios = <&gpio1 4 0>;
};
health_led {
label = "status:red:health_led"; label = "status:red:health_led";
gpios = <&gpio1 5 0>; gpios = <&gpio1 5 0>;
}; };
health_led2 {
label = "status:white:health_led";
gpios = <&gpio1 4 0>;
};
backup_led { backup_led {
label = "status:blue:backup_led"; label = "status:blue:backup_led";
gpios = <&gpio0 15 0>; gpios = <&gpio0 15 0>;
......
...@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { ...@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
.duplex = DUPLEX_FULL, .duplex = DUPLEX_FULL,
}; };
static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(11),
};
void __init iomega_ix2_200_init(void) void __init iomega_ix2_200_init(void)
{ {
/* /*
* Basic setup. Needs to be called early. * Basic setup. Needs to be called early.
*/ */
kirkwood_ge01_init(&iomega_ix2_200_ge00_data); kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
} }
...@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain; ...@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain;
*/ */
static void armada_370_xp_irq_mask(struct irq_data *d) static void armada_370_xp_irq_mask(struct irq_data *d)
{ {
#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d); irq_hw_number_t hwirq = irqd_to_hwirq(d);
if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
...@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d) ...@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d)
else else
writel(hwirq, per_cpu_int_base + writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_SET_MASK_OFFS); ARMADA_370_XP_INT_SET_MASK_OFFS);
#else
writel(irqd_to_hwirq(d),
per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
#endif
} }
static void armada_370_xp_irq_unmask(struct irq_data *d) static void armada_370_xp_irq_unmask(struct irq_data *d)
{ {
#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d); irq_hw_number_t hwirq = irqd_to_hwirq(d);
if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
...@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) ...@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)
else else
writel(hwirq, per_cpu_int_base + writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_CLEAR_MASK_OFFS); ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
#else
writel(irqd_to_hwirq(d),
per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
#endif
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
...@@ -146,6 +136,10 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, ...@@ -146,6 +136,10 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
unsigned int virq, irq_hw_number_t hw) unsigned int virq, irq_hw_number_t hw)
{ {
armada_370_xp_irq_mask(irq_get_irq_data(virq)); armada_370_xp_irq_mask(irq_get_irq_data(virq));
if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
writel(hw, per_cpu_int_base +
ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
else
writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
irq_set_status_flags(virq, IRQ_LEVEL); irq_set_status_flags(virq, IRQ_LEVEL);
......
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