Commit 73659be7 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki

Merge branches 'pm-core', 'powercap' and 'pm-tools'

* pm-core:
  PM / wakeirq: fix wakeirq setting after wakup re-configuration from sysfs
  PM / runtime: Document steps for device removal

* powercap:
  powercap: intel_rapl: Add missing Haswell model

* pm-tools:
  tools/power turbostat: work around RC6 counter wrap
  tools/power turbostat: initial KBL support
  tools/power turbostat: initial SKX support
  tools/power turbostat: decode BXT TSC frequency via CPUID
  tools/power turbostat: initial BXT support
  tools/power turbostat: print IRTL MSRs
  tools/power turbostat: SGX state should print only if --debug
...@@ -586,6 +586,10 @@ drivers to make their ->remove() callbacks avoid races with runtime PM directly, ...@@ -586,6 +586,10 @@ drivers to make their ->remove() callbacks avoid races with runtime PM directly,
but also it allows of more flexibility in the handling of devices during the but also it allows of more flexibility in the handling of devices during the
removal of their drivers. removal of their drivers.
Drivers in ->remove() callback should undo the runtime PM changes done
in ->probe(). Usually this means calling pm_runtime_disable(),
pm_runtime_dont_use_autosuspend() etc.
The user space can effectively disallow the driver of the device to power manage The user space can effectively disallow the driver of the device to power manage
it at run time by changing the value of its /sys/devices/.../power/control it at run time by changing the value of its /sys/devices/.../power/control
attribute to "on", which causes pm_runtime_forbid() to be called. In principle, attribute to "on", which causes pm_runtime_forbid() to be called. In principle,
......
...@@ -167,6 +167,14 @@ ...@@ -167,6 +167,14 @@
#define MSR_PKG_C9_RESIDENCY 0x00000631 #define MSR_PKG_C9_RESIDENCY 0x00000631
#define MSR_PKG_C10_RESIDENCY 0x00000632 #define MSR_PKG_C10_RESIDENCY 0x00000632
/* Interrupt Response Limit */
#define MSR_PKGC3_IRTL 0x0000060a
#define MSR_PKGC6_IRTL 0x0000060b
#define MSR_PKGC7_IRTL 0x0000060c
#define MSR_PKGC8_IRTL 0x00000633
#define MSR_PKGC9_IRTL 0x00000634
#define MSR_PKGC10_IRTL 0x00000635
/* Run Time Average Power Limiting (RAPL) Interface */ /* Run Time Average Power Limiting (RAPL) Interface */
#define MSR_RAPL_POWER_UNIT 0x00000606 #define MSR_RAPL_POWER_UNIT 0x00000606
......
...@@ -246,6 +246,8 @@ static int device_wakeup_attach(struct device *dev, struct wakeup_source *ws) ...@@ -246,6 +246,8 @@ static int device_wakeup_attach(struct device *dev, struct wakeup_source *ws)
return -EEXIST; return -EEXIST;
} }
dev->power.wakeup = ws; dev->power.wakeup = ws;
if (dev->power.wakeirq)
device_wakeup_attach_irq(dev, dev->power.wakeirq);
spin_unlock_irq(&dev->power.lock); spin_unlock_irq(&dev->power.lock);
return 0; return 0;
} }
......
...@@ -1091,6 +1091,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { ...@@ -1091,6 +1091,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */ RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */
RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */ RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */
RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */
RAPL_CPU(0x46, rapl_defaults_core),/* Haswell */
RAPL_CPU(0x47, rapl_defaults_core),/* Broadwell-H */ RAPL_CPU(0x47, rapl_defaults_core),/* Broadwell-H */
RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */ RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */
RAPL_CPU(0x4C, rapl_defaults_cht),/* Braswell/Cherryview */ RAPL_CPU(0x4C, rapl_defaults_cht),/* Braswell/Cherryview */
......
...@@ -66,6 +66,8 @@ unsigned int do_slm_cstates; ...@@ -66,6 +66,8 @@ unsigned int do_slm_cstates;
unsigned int use_c1_residency_msr; unsigned int use_c1_residency_msr;
unsigned int has_aperf; unsigned int has_aperf;
unsigned int has_epb; unsigned int has_epb;
unsigned int do_irtl_snb;
unsigned int do_irtl_hsw;
unsigned int units = 1000000; /* MHz etc */ unsigned int units = 1000000; /* MHz etc */
unsigned int genuine_intel; unsigned int genuine_intel;
unsigned int has_invariant_tsc; unsigned int has_invariant_tsc;
...@@ -187,7 +189,7 @@ struct pkg_data { ...@@ -187,7 +189,7 @@ struct pkg_data {
unsigned long long pkg_any_core_c0; unsigned long long pkg_any_core_c0;
unsigned long long pkg_any_gfxe_c0; unsigned long long pkg_any_gfxe_c0;
unsigned long long pkg_both_core_gfxe_c0; unsigned long long pkg_both_core_gfxe_c0;
unsigned long long gfx_rc6_ms; long long gfx_rc6_ms;
unsigned int gfx_mhz; unsigned int gfx_mhz;
unsigned int package_id; unsigned int package_id;
unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */ unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
...@@ -621,8 +623,14 @@ int format_counters(struct thread_data *t, struct core_data *c, ...@@ -621,8 +623,14 @@ int format_counters(struct thread_data *t, struct core_data *c,
outp += sprintf(outp, "%8d", p->pkg_temp_c); outp += sprintf(outp, "%8d", p->pkg_temp_c);
/* GFXrc6 */ /* GFXrc6 */
if (do_gfx_rc6_ms) if (do_gfx_rc6_ms) {
outp += sprintf(outp, "%8.2f", 100.0 * p->gfx_rc6_ms / 1000.0 / interval_float); if (p->gfx_rc6_ms == -1) { /* detect counter reset */
outp += sprintf(outp, " ***.**");
} else {
outp += sprintf(outp, "%8.2f",
p->gfx_rc6_ms / 10.0 / interval_float);
}
}
/* GFXMHz */ /* GFXMHz */
if (do_gfx_mhz) if (do_gfx_mhz)
...@@ -766,7 +774,12 @@ delta_package(struct pkg_data *new, struct pkg_data *old) ...@@ -766,7 +774,12 @@ delta_package(struct pkg_data *new, struct pkg_data *old)
old->pc10 = new->pc10 - old->pc10; old->pc10 = new->pc10 - old->pc10;
old->pkg_temp_c = new->pkg_temp_c; old->pkg_temp_c = new->pkg_temp_c;
/* flag an error when rc6 counter resets/wraps */
if (old->gfx_rc6_ms > new->gfx_rc6_ms)
old->gfx_rc6_ms = -1;
else
old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms; old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
old->gfx_mhz = new->gfx_mhz; old->gfx_mhz = new->gfx_mhz;
DELTA_WRAP32(new->energy_pkg, old->energy_pkg); DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
...@@ -1296,6 +1309,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, ...@@ -1296,6 +1309,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S,
int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
static void static void
...@@ -1579,6 +1593,47 @@ dump_config_tdp(void) ...@@ -1579,6 +1593,47 @@ dump_config_tdp(void)
fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1); fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
fprintf(outf, ")\n"); fprintf(outf, ")\n");
} }
unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
void print_irtl(void)
{
unsigned long long msr;
get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
if (!do_irtl_hsw)
return;
get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
}
void free_fd_percpu(void) void free_fd_percpu(void)
{ {
int i; int i;
...@@ -2144,6 +2199,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) ...@@ -2144,6 +2199,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
case 0x56: /* BDX-DE */ case 0x56: /* BDX-DE */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
case 0x55: /* SKX */
pkg_cstate_limits = hsw_pkg_cstate_limits; pkg_cstate_limits = hsw_pkg_cstate_limits;
break; break;
case 0x37: /* BYT */ case 0x37: /* BYT */
...@@ -2156,6 +2214,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) ...@@ -2156,6 +2214,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
case 0x57: /* PHI */ case 0x57: /* PHI */
pkg_cstate_limits = phi_pkg_cstate_limits; pkg_cstate_limits = phi_pkg_cstate_limits;
break; break;
case 0x5C: /* BXT */
pkg_cstate_limits = bxt_pkg_cstate_limits;
break;
default: default:
return 0; return 0;
} }
...@@ -2248,6 +2309,9 @@ int has_config_tdp(unsigned int family, unsigned int model) ...@@ -2248,6 +2309,9 @@ int has_config_tdp(unsigned int family, unsigned int model)
case 0x56: /* BDX-DE */ case 0x56: /* BDX-DE */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
case 0x55: /* SKX */
case 0x57: /* Knights Landing */ case 0x57: /* Knights Landing */
return 1; return 1;
...@@ -2585,13 +2649,19 @@ void rapl_probe(unsigned int family, unsigned int model) ...@@ -2585,13 +2649,19 @@ void rapl_probe(unsigned int family, unsigned int model)
case 0x47: /* BDW */ case 0x47: /* BDW */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
break; break;
case 0x5C: /* BXT */
do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
break;
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
break; break;
case 0x3F: /* HSX */ case 0x3F: /* HSX */
case 0x4F: /* BDX */ case 0x4F: /* BDX */
case 0x56: /* BDX-DE */ case 0x56: /* BDX-DE */
case 0x55: /* SKX */
case 0x57: /* KNL */ case 0x57: /* KNL */
do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
break; break;
...@@ -2871,6 +2941,10 @@ int has_snb_msrs(unsigned int family, unsigned int model) ...@@ -2871,6 +2941,10 @@ int has_snb_msrs(unsigned int family, unsigned int model)
case 0x56: /* BDX-DE */ case 0x56: /* BDX-DE */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
case 0x55: /* SKX */
case 0x5C: /* BXT */
return 1; return 1;
} }
return 0; return 0;
...@@ -2882,6 +2956,11 @@ int has_snb_msrs(unsigned int family, unsigned int model) ...@@ -2882,6 +2956,11 @@ int has_snb_msrs(unsigned int family, unsigned int model)
* MSR_PKG_C8_RESIDENCY 0x00000630 * MSR_PKG_C8_RESIDENCY 0x00000630
* MSR_PKG_C9_RESIDENCY 0x00000631 * MSR_PKG_C9_RESIDENCY 0x00000631
* MSR_PKG_C10_RESIDENCY 0x00000632 * MSR_PKG_C10_RESIDENCY 0x00000632
*
* MSR_PKGC8_IRTL 0x00000633
* MSR_PKGC9_IRTL 0x00000634
* MSR_PKGC10_IRTL 0x00000635
*
*/ */
int has_hsw_msrs(unsigned int family, unsigned int model) int has_hsw_msrs(unsigned int family, unsigned int model)
{ {
...@@ -2893,6 +2972,9 @@ int has_hsw_msrs(unsigned int family, unsigned int model) ...@@ -2893,6 +2972,9 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
case 0x3D: /* BDW */ case 0x3D: /* BDW */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
case 0x5C: /* BXT */
return 1; return 1;
} }
return 0; return 0;
...@@ -2914,6 +2996,8 @@ int has_skl_msrs(unsigned int family, unsigned int model) ...@@ -2914,6 +2996,8 @@ int has_skl_msrs(unsigned int family, unsigned int model)
switch (model) { switch (model) {
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x8E: /* KBL */
case 0x9E: /* KBL */
return 1; return 1;
} }
return 0; return 0;
...@@ -3187,7 +3271,7 @@ void process_cpuid() ...@@ -3187,7 +3271,7 @@ void process_cpuid()
if (debug) if (debug)
decode_misc_enable_msr(); decode_misc_enable_msr();
if (max_level >= 0x7) { if (max_level >= 0x7 && debug) {
int has_sgx; int has_sgx;
ecx = 0; ecx = 0;
...@@ -3221,7 +3305,15 @@ void process_cpuid() ...@@ -3221,7 +3305,15 @@ void process_cpuid()
switch(model) { switch(model) {
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
crystal_hz = 24000000; /* 24 MHz */ case 0x8E: /* KBL */
case 0x9E: /* KBL */
crystal_hz = 24000000; /* 24.0 MHz */
break;
case 0x55: /* SKX */
crystal_hz = 25000000; /* 25.0 MHz */
break;
case 0x5C: /* BXT */
crystal_hz = 19200000; /* 19.2 MHz */
break; break;
default: default:
crystal_hz = 0; crystal_hz = 0;
...@@ -3254,11 +3346,13 @@ void process_cpuid() ...@@ -3254,11 +3346,13 @@ void process_cpuid()
do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
do_snb_cstates = has_snb_msrs(family, model); do_snb_cstates = has_snb_msrs(family, model);
do_irtl_snb = has_snb_msrs(family, model);
do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
do_pc3 = (pkg_cstate_limit >= PCL__3); do_pc3 = (pkg_cstate_limit >= PCL__3);
do_pc6 = (pkg_cstate_limit >= PCL__6); do_pc6 = (pkg_cstate_limit >= PCL__6);
do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7); do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
do_c8_c9_c10 = has_hsw_msrs(family, model); do_c8_c9_c10 = has_hsw_msrs(family, model);
do_irtl_hsw = has_hsw_msrs(family, model);
do_skl_residency = has_skl_msrs(family, model); do_skl_residency = has_skl_msrs(family, model);
do_slm_cstates = is_slm(family, model); do_slm_cstates = is_slm(family, model);
do_knl_cstates = is_knl(family, model); do_knl_cstates = is_knl(family, model);
...@@ -3564,6 +3658,9 @@ void turbostat_init() ...@@ -3564,6 +3658,9 @@ void turbostat_init()
if (debug) if (debug)
for_all_cpus(print_thermal, ODD_COUNTERS); for_all_cpus(print_thermal, ODD_COUNTERS);
if (debug && do_irtl_snb)
print_irtl();
} }
int fork_it(char **argv) int fork_it(char **argv)
...@@ -3629,7 +3726,7 @@ int get_and_dump_counters(void) ...@@ -3629,7 +3726,7 @@ int get_and_dump_counters(void)
} }
void print_version() { void print_version() {
fprintf(outf, "turbostat version 4.11 27 Feb 2016" fprintf(outf, "turbostat version 4.12 5 Apr 2016"
" - Len Brown <lenb@kernel.org>\n"); " - Len Brown <lenb@kernel.org>\n");
} }
......
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