Commit 792f80d1 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: clean up the overdrive settings

Eliminate the buffer allocation and drop the unnecessary
overdrive table uploading.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4a13b4ce
...@@ -1197,7 +1197,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu, ...@@ -1197,7 +1197,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
if (ret) if (ret)
return ret; return ret;
ret = smu_set_default_od_settings(smu, initialize); ret = smu_set_default_od_settings(smu);
if (ret) if (ret)
return ret; return ret;
......
...@@ -480,7 +480,7 @@ struct pptable_funcs { ...@@ -480,7 +480,7 @@ struct pptable_funcs {
uint32_t *value); uint32_t *value);
int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range); int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);
int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states); int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
int (*set_default_od_settings)(struct smu_context *smu, bool initialize); int (*set_default_od_settings)(struct smu_context *smu);
int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level); int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level);
int (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch); int (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch);
void (*dump_pptable)(struct smu_context *smu); void (*dump_pptable)(struct smu_context *smu);
......
...@@ -259,8 +259,6 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_ ...@@ -259,8 +259,6 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
int smu_v11_0_override_pcie_parameters(struct smu_context *smu); int smu_v11_0_override_pcie_parameters(struct smu_context *smu);
int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size);
uint32_t smu_v11_0_get_max_power_limit(struct smu_context *smu); uint32_t smu_v11_0_get_max_power_limit(struct smu_context *smu);
int smu_v11_0_set_performance_level(struct smu_context *smu, int smu_v11_0_set_performance_level(struct smu_context *smu,
......
...@@ -1969,26 +1969,26 @@ static bool navi10_is_baco_supported(struct smu_context *smu) ...@@ -1969,26 +1969,26 @@ static bool navi10_is_baco_supported(struct smu_context *smu)
return (val & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK) ? true : false; return (val & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK) ? true : false;
} }
static int navi10_set_default_od_settings(struct smu_context *smu, bool initialize) { static int navi10_set_default_od_settings(struct smu_context *smu)
OverDriveTable_t *od_table, *boot_od_table; {
OverDriveTable_t *od_table =
(OverDriveTable_t *)smu->smu_table.overdrive_table;
OverDriveTable_t *boot_od_table =
(OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
int ret = 0; int ret = 0;
ret = smu_v11_0_set_default_od_settings(smu, initialize, sizeof(OverDriveTable_t)); ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, false);
if (ret) if (ret) {
pr_err("Failed to get overdrive table!\n");
return ret; return ret;
}
od_table = (OverDriveTable_t *)smu->smu_table.overdrive_table;
boot_od_table = (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
if (initialize) {
if (od_table) {
if (!od_table->GfxclkVolt1) { if (!od_table->GfxclkVolt1) {
ret = navi10_overdrive_get_gfx_clk_base_voltage(smu, ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
&od_table->GfxclkVolt1, &od_table->GfxclkVolt1,
od_table->GfxclkFreq1); od_table->GfxclkFreq1);
if (ret) if (ret)
od_table->GfxclkVolt1 = 0; return ret;
if (boot_od_table)
boot_od_table->GfxclkVolt1 = od_table->GfxclkVolt1;
} }
if (!od_table->GfxclkVolt2) { if (!od_table->GfxclkVolt2) {
...@@ -1996,9 +1996,7 @@ static int navi10_set_default_od_settings(struct smu_context *smu, bool initiali ...@@ -1996,9 +1996,7 @@ static int navi10_set_default_od_settings(struct smu_context *smu, bool initiali
&od_table->GfxclkVolt2, &od_table->GfxclkVolt2,
od_table->GfxclkFreq2); od_table->GfxclkFreq2);
if (ret) if (ret)
od_table->GfxclkVolt2 = 0; return ret;
if (boot_od_table)
boot_od_table->GfxclkVolt2 = od_table->GfxclkVolt2;
} }
if (!od_table->GfxclkVolt3) { if (!od_table->GfxclkVolt3) {
...@@ -2006,18 +2004,14 @@ static int navi10_set_default_od_settings(struct smu_context *smu, bool initiali ...@@ -2006,18 +2004,14 @@ static int navi10_set_default_od_settings(struct smu_context *smu, bool initiali
&od_table->GfxclkVolt3, &od_table->GfxclkVolt3,
od_table->GfxclkFreq3); od_table->GfxclkFreq3);
if (ret) if (ret)
od_table->GfxclkVolt3 = 0; return ret;
if (boot_od_table)
boot_od_table->GfxclkVolt3 = od_table->GfxclkVolt3;
}
}
} }
if (od_table) { memcpy(boot_od_table, od_table, sizeof(OverDriveTable_t));
navi10_dump_od_table(od_table); navi10_dump_od_table(od_table);
}
return ret; return 0;
} }
static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) { static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) {
......
...@@ -66,8 +66,8 @@ ...@@ -66,8 +66,8 @@
((smu)->ppt_funcs->system_features_control ? (smu)->ppt_funcs->system_features_control((smu), (en)) : 0) ((smu)->ppt_funcs->system_features_control ? (smu)->ppt_funcs->system_features_control((smu), (en)) : 0)
#define smu_init_max_sustainable_clocks(smu) \ #define smu_init_max_sustainable_clocks(smu) \
((smu)->ppt_funcs->init_max_sustainable_clocks ? (smu)->ppt_funcs->init_max_sustainable_clocks((smu)) : 0) ((smu)->ppt_funcs->init_max_sustainable_clocks ? (smu)->ppt_funcs->init_max_sustainable_clocks((smu)) : 0)
#define smu_set_default_od_settings(smu, initialize) \ #define smu_set_default_od_settings(smu) \
((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs->set_default_od_settings((smu), (initialize)) : 0) ((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs->set_default_od_settings((smu)) : 0)
#define smu_send_smc_msg_with_param(smu, msg, param, read_arg) \ #define smu_send_smc_msg_with_param(smu, msg, param, read_arg) \
((smu)->ppt_funcs->send_smc_msg_with_param? (smu)->ppt_funcs->send_smc_msg_with_param((smu), (msg), (param), (read_arg)) : 0) ((smu)->ppt_funcs->send_smc_msg_with_param? (smu)->ppt_funcs->send_smc_msg_with_param((smu), (msg), (param), (read_arg)) : 0)
......
...@@ -1912,26 +1912,6 @@ int smu_v11_0_override_pcie_parameters(struct smu_context *smu) ...@@ -1912,26 +1912,6 @@ int smu_v11_0_override_pcie_parameters(struct smu_context *smu)
} }
int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size)
{
struct smu_table_context *table_context = &smu->smu_table;
int ret = 0;
if (initialize) {
ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, table_context->overdrive_table, false);
if (ret) {
pr_err("Failed to export overdrive table!\n");
return ret;
}
}
ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, table_context->overdrive_table, true);
if (ret) {
pr_err("Failed to import overdrive table!\n");
return ret;
}
return ret;
}
int smu_v11_0_set_performance_level(struct smu_context *smu, int smu_v11_0_set_performance_level(struct smu_context *smu,
enum amd_dpm_forced_level level) enum amd_dpm_forced_level level)
{ {
......
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