[PATCH] h8300: H8S architecture support

arch/h8300/platform/h8s/Makefile

+#
+# Makefile for the linux kernel.
+#
+# Reuse any files we can from the H8S
+#
+
+#VPATH := $(VPATH):$(BOARD)
+
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+.S.o:
+	$(CC) -D__ASSEMBLY__ $(AFLAGS) -I. -c $< -o $*.o
+
+obj-y := entry.o ints.o
+
+$(BOARD)/crt0_$(MODEL).o: $(BOARD)/crt0_$(MODEL).S
+
+entry.o: entry.S
+
+ints.o: ints.c

arch/h8300/platform/h8s/edosk2674/Makefile

+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+extra-y := crt0_ram.o
+obj-y := timer.o
+
+timer.o: timer.c
+
+clean:
+	rm -f *.[oa]

arch/h8300/platform/h8s/edosk2674/crt0_ram.S

+/*
+ *  linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend startup
+ *  Target Archtecture:	EDOSK-2674
+ *  Memory Layout     :	RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+			
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+	
+	.global SYMBOL_NAME(_start)
+	.global SYMBOL_NAME(_command_line)
+	.global SYMBOL_NAME(_platform_gpio_table)
+	.global SYMBOL_NAME(_target_name)
+	
+	.h8300s
+
+	.section .text
+	.file	"crt0_ram.S"
+
+	/* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+	mov.l	#RAMEND,sp
+	ldc	#0x07,exr
+
+	/* Peripheral Setup */
+	bclr	#4,@INTCR:8	/* interrupt mode 2 */
+	bset	#5,@INTCR:8
+	bclr	#0,@IER+1:16
+	bset	#1,@ISCRL+1:16	/* IRQ0 Positive Edge */
+	bclr	#0,@ISCRL+1:16
+
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+	/* move romfs image */
+	jsr	@__move_romfs	
+#endif
+	
+	/* .bss clear */
+	mov.l	#__sbss,er5
+	mov.l	er5,er6
+	mov.l	#__ebss,er4
+	sub.l	er5,er4
+	shlr	#2,er4
+	sub.l	er0,er0
+1:	
+	mov.l	er0,@er5
+	adds	#4,er5
+	dec.l	#1,er4
+	bne	1b
+
+	/* copy kernel commandline */
+	mov.l	#COMMAND_START,er5
+	mov.l	#SYMBOL_NAME(command_line),er6
+	mov.w	#512,r4
+	eepmov.w
+
+	/* uClinux kernel start */
+	ldc	#0x10,ccr	/* running kernel */
+	mov.l	#SYMBOL_NAME(init_thread_union),sp
+	add.l	#0x2000,sp
+	jsr	@_start_kernel
+_exit:
+
+	jmp	_exit
+
+	rts
+
+	/* I/O port assign information */
+__platform_gpio_table:	
+	mov.l	#gpio_table,er0
+	rts
+
+gpio_table:
+	;; P1DDR
+	;;      used,ddr
+	.byte	0x00,0x00
+	;; P2DDR
+	.byte	0x00,0x00
+	;; P3DDR
+	.byte	0x3f,0x3a
+	;; dummy
+	.byte	0x00,0x00
+	;; P5DDR
+	.byte	0x00,0x00
+	;; P6DDR
+	.byte	0x00,0x00
+	;; P7DDR
+	.byte	0x00,0x00
+	;; P8DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; PADDR
+	.byte	0xff,0xff
+	;; PBDDR
+	.byte	0xff,0x00
+	;; PCDDR
+	.byte	0xff,0x00
+	;; PDDDR
+	.byte	0xff,0x00
+	;; PEDDR
+	.byte	0xff,0x00
+	;; PFDDR
+	.byte	0xff,0xff
+	;; PGDDR
+	.byte	0x0f,0x0f
+	;; PHDDR
+	.byte	0x0f,0x0f
+
+__target_name:	
+	.asciz	"EDOSK-2674"
+	
+	.section .bootvec,"ax"
+	jmp	@SYMBOL_NAME(_start)

arch/h8300/platform/h8s/edosk2674/crt0_rom.S

+/*
+ *  linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend startup
+ *  Target Archtecture:	EDOSK-2674
+ *  Memory Layout     :	ROM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+		
+	.global SYMBOL_NAME(_start)
+	.global SYMBOL_NAME(_command_line)
+	.global SYMBOL_NAME(_platform_gpio_table)
+	.global SYMBOL_NAME(_target_name)
+	
+	.h8300s
+	.section .text
+	.file	"crt0_rom.S"
+
+	/* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+	mov.l	#__ramend,sp
+	ldc	#0x80,ccr
+	ldc	#0,exr
+	
+	/* Peripheral Setup */
+;BSC/GPIO setup
+	mov.l	#init_regs,er0
+	mov.w	#0xffff,e2
+1:
+	mov.w	@er0+,r2
+	beq	2f
+	mov.w	@er0+,r1
+	mov.b	r1l,@er2
+	bra	1b
+
+2:
+;SDRAM setup
+#define SDRAM_SMR 0x400040
+
+	mov.b	#0,r0l
+	mov.b	r0l,@DRACCR:16
+	mov.w	#0x188,r0
+	mov.w	r0,@REFCR:16
+	mov.w	#0x85b4,r0
+	mov.w	r0,@DRAMCR:16
+	mov.b	#0,r1l
+	mov.b	r1l,@SDRAM_SMR
+	mov.w	#0x84b4,r0
+	mov.w	r0,@DRAMCR:16
+;special thanks to Arizona Cooperative Power
+	
+	/* copy .data */
+	mov.l	#__begin_data,er5
+	mov.l	#__sdata,er6
+	mov.l	#__edata,er4
+	sub.l	er6,er4
+	shlr.l	#2,er4
+1:	
+	mov.l	@er5+,er0
+	mov.l	er0,@er6
+	adds	#4,er6
+	dec.l	#1,er4
+	bne	1b	
+
+	/* .bss clear */
+	mov.l	#__sbss,er5
+	mov.l	#__ebss,er4
+	sub.l	er5,er4
+	shlr.l	#2,er4		
+	sub.l	er0,er0
+1:
+	mov.l	er0,@er5
+	adds	#4,er5
+	dec.l	#1,er4
+	bne	1b
+
+	/* copy kernel commandline */
+	mov.l	#COMMAND_START,er5
+	mov.l	#SYMBOL_NAME(_command_line),er6
+	mov.w	#512,r4
+	eepmov.w
+
+	/* linux kernel start */
+	ldc	#0x90,ccr	/* running kernel */
+	mov.l	#SYMBOL_NAME(init_thread_union),sp
+	add.l	#0x2000,sp
+	jsr	@_start_kernel
+_exit:
+
+	jmp	_exit
+
+	rts
+
+	/* I/O port assign information */
+__platform_gpio_table:	
+	mov.l	#gpio_table,er0
+	rts
+
+#define INIT_REGS_DATA(REGS,DATA) \
+	.word	((REGS) & 0xffff),DATA
+
+init_regs:
+INIT_REGS_DATA(ASTCR,0xff)
+INIT_REGS_DATA(RDNCR,0x00)
+INIT_REGS_DATA(ABWCR,0x80)
+INIT_REGS_DATA(WTCRAH,0x27)
+INIT_REGS_DATA(WTCRAL,0x77)
+INIT_REGS_DATA(WTCRBH,0x71)
+INIT_REGS_DATA(WTCRBL,0x22)
+INIT_REGS_DATA(CSACRH,0x80)
+INIT_REGS_DATA(CSACRL,0x80)
+INIT_REGS_DATA(BROMCRH,0xa0)
+INIT_REGS_DATA(BROMCRL,0xa0)
+INIT_REGS_DATA(P3DDR,0x3a)
+INIT_REGS_DATA(P3ODR,0x06)
+INIT_REGS_DATA(PADDR,0xff)
+INIT_REGS_DATA(PFDDR,0xfe)
+INIT_REGS_DATA(PGDDR,0x0f)
+INIT_REGS_DATA(PHDDR,0x0f)
+INIT_REGS_DATA(PFCR0,0xff)
+INIT_REGS_DATA(PFCR2,0x0d)
+INIT_REGS_DATA(ITSR, 0x00)
+INIT_REGS_DATA(ITSR+1,0x3f)
+INIT_REGS_DATA(INTCR,0x20)
+		
+	.word	0
+
+gpio_table:
+	;; P1DDR
+	.byte	0x00,0x00
+	;; P2DDR
+	.byte	0x00,0x00
+	;; P3DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; P5DDR
+	.byte	0x00,0x00
+	;; P6DDR
+	.byte	0x00,0x00
+	;; P7DDR
+	.byte	0x00,0x00
+	;; P8DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; PADDR
+	.byte	0x00,0x00
+	;; PBDDR
+	.byte	0x00,0x00
+	;; PCDDR
+	.byte	0x00,0x00
+	;; PDDDR
+	.byte	0x00,0x00
+	;; PEDDR
+	.byte	0x00,0x00
+	;; PFDDR
+	.byte	0x00,0x00
+	;; PGDDR
+	.byte	0x00,0x00
+	;; PHDDR
+	.byte	0x00,0x00
+
+__target_name:	
+	.asciz	"EDOSK-2674"
+	
+	.section .bss
+__command_line:	
+	.space	512
+
+	/* interrupt vector */
+	.section .vectors,"ax"
+	.long	__start
+	.long	__start
+vector	=	2
+	.rept	126-1
+	.long	_interrupt_redirect_table+vector*4
+vector	=	vector + 1
+	.endr

arch/h8300/platform/h8s/edosk2674/ram.ld

+/* EDOSK-2674R RAM */
+
+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY 
+	{
+	ram    : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
+	eram   : ORIGIN = 0xc00000, LENGTH = 0
+	}

arch/h8300/platform/h8s/edosk2674/rom.ld

+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY 
+	{
+	vector : ORIGIN = 0x000000, LENGTH = 0x000200
+	rom    : ORIGIN = 0x000200, LENGTH = 0x100000-0x000200
+	erom   : ORIGIN = 0x100000, LENGTH = 0
+	ram    : ORIGIN = 0x400000, LENGTH = 0xc00000-0x400000
+	eram   : ORIGIN = 0xc00000, LENGTH = 0
+	}

arch/h8300/platform/h8s/edosk2674/timer.c

+/*
+ *  linux/arch/h8300/platform/h8s/generic/timer.c
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend Timer Handler
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs267x.h>
+
+#define REGS(regs) __REGS(regs)
+#define __REGS(regs) #regs
+
+extern int request_irq_boot(unsigned int,
+		            irqreturn_t (*handler)(int, void *, struct pt_regs *),
+		            unsigned long, const char *, void *);
+
+int __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
+{
+	unsigned char mstpcrl;
+	mstpcrl = inb(MSTPCRL);                  /* Enable timer */
+	mstpcrl &= ~0x01;
+	outb(mstpcrl,MSTPCRL);
+	outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+	outb(0x00,_8TCSR1);
+	request_irq_boot(76,timer_int,0,"timer",0);
+	outb(0x40|0x08|0x03,_8TCR1);
+	return 0;
+}
+
+void platform_timer_eoi(void)
+{
+        __asm__("bclr #6,@" REGS(_8TCSR1) ":8");
+}
+
+void platform_gettod(int *year, int *mon, int *day, int *hour,
+		 int *min, int *sec)
+{
+/* FIXME! not RTC support */
+	*year = *mon = *day = *hour = *min = *sec = 0;
+}

arch/h8300/platform/h8s/entry.S

+/* -*- mode: asm -*-
+ *
+ *  linux/arch/h8300/platform/h8s/entry.S
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *	fairly heavy changes to fix syscall args and signal processing
+ *	by David McCullough <davidm@snapgear.com>
+ */
+
+/*
+ *  entry.S
+ *  include exception/interrupt gateway
+ *          system call entry
+ */
+
+#include <linux/sys.h>
+#include <linux/config.h>
+#include <asm/unistd.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+
+ENOSYS = 38
+
+LSIGTRAP = 5
+
+SOFTIRQ_PENDING = 0
+		
+/* the following macro is used when enabling interrupts */
+
+LER4	=	0
+LER5	=	4
+LER6	=	8
+LER3	=	12
+LER2	=	16
+LER1	=	20
+LORIG	=	24
+LCCR	=	28
+LER0	=	30
+LVEC	=	34
+LEXR	=	38
+LRET	=	40
+
+	.h8300s
+
+/* CPU context save/restore macros. */
+	
+	.macro	SAVE_ALL
+	mov.l	er0,@-sp
+
+	stc	ccr,r0l				/* check kernel mode */
+	orc	#0x10,ccr
+	btst	#4,r0l
+	bne	5f
+
+	mov.l	sp,@SYMBOL_NAME(sw_usp)		/* user mode */
+	mov.l	@sp,er0
+	mov.l	@SYMBOL_NAME(sw_ksp),sp
+	sub.l	#(LRET-LORIG),sp		/* allocate LORIG - LRET */ 
+	stm.l	er0-er3,@-sp
+	mov.l	@SYMBOL_NAME(sw_usp),er0
+	mov.l	@(10:16,er0),er1		/* copy the RET addr */
+	mov.l	er1,@(LRET-LER3:16,sp)
+	mov.w	@(8:16,er0),r1
+	mov.w	r1,@(LEXR-LER3:16,sp)		/* copy EXR */
+
+	mov.w	e1,r1				/* e1 highbyte = ccr */
+	and	#0xef,r1h			/* mask mode? flag */
+	sub.w	r0,r0
+	mov.b	r1h,r0l
+	mov.w	r0,@(LCCR-LER3:16,sp)		/* copy ccr */
+	mov.l	@(LORIG-LER3:16,sp),er0
+	mov.l	er0,@(LER0-LER3:16,sp)		/* copy ER0 */
+	bra	6f
+5:
+	mov.l	@sp,er0				/* kernel mode */
+	subs	#2,sp				/* dummy ccr */
+	stm.l	er0-er3,@-sp
+	mov.w	@(LRET-LER3:16,sp),r1		/* copy old ccr */
+	mov.b	r1h,r1l
+	mov.b	#0,r1h
+	mov.w	r1,@(LCCR-LER3:16,sp)
+6:	
+	mov.l	er6,@-sp			/* syscall arg #6 */
+	mov.l	er5,@-sp			/* syscall arg #5 */
+	mov.l	er4,@-sp			/* syscall arg #4 */
+	.endm
+
+	.macro	RESTORE_ALL
+	mov.l	@sp+,er4
+	mov.l	@sp+,er5
+	mov.l	@sp+,er6
+	ldm.l	@sp+,er2-er3
+	mov.w	@(LCCR-LER1:16,sp),r0		/* check kernel mode */
+	btst	#4,r0l
+	bne	7f
+
+	orc	#0x80,ccr
+	mov.l	@SYMBOL_NAME(sw_usp),er0
+	mov.l	@(LER0-LER1:16,sp),er1		/* restore ER0 */
+	mov.l	er1,@er0
+	mov.w	@(LEXR-LER1:16,sp),r1		/* restore EXR */
+	mov.w	r1,@(8:16,er0)
+	mov.w	@(LCCR-LER1:16,sp),r1		/* restore the RET addr */
+	mov.b	r1l,r1h
+	mov.b	@(LRET+1-LER1:16,sp),r1l
+	mov.w	r1,e1
+	mov.w	@(LRET+2-LER1:16,sp),r1
+	mov.l	er1,@(10:16,er0)
+
+	mov.l	@sp+,er1
+	add.l	#(LRET-LORIG),sp		/* remove LORIG - LRET */ 
+	mov.l	sp,@SYMBOL_NAME(sw_ksp)
+	mov.l	er0,sp
+	bra	8f
+7:
+	mov.l	@sp+,er1
+	adds	#4,sp
+	adds	#2,sp
+8:
+	mov.l	@sp+,er0
+	adds	#4,sp				/* remove the sw created LVEC */
+	rte
+	.endm
+	
+.globl SYMBOL_NAME(system_call)
+.globl SYMBOL_NAME(ret_from_exception)
+.globl SYMBOL_NAME(ret_from_fork)
+.globl SYMBOL_NAME(ret_from_signal)
+.globl SYMBOL_NAME(ret_from_interrupt)
+.globl SYMBOL_NAME(interrupt_redirect_table)
+.globl SYMBOL_NAME(sw_ksp),SYMBOL_NAME(sw_usp)
+.globl SYMBOL_NAME(resume)
+.globl SYMBOL_NAME(syscall_trampoline)
+.globl SYMBOL_NAME(trace_break)
+.globl SYMBOL_NAME(interrupt_entry)
+		
+INTERRUPTS = 128
+#if defined(CONFIG_ROMKERNEL)
+	.section .int_redirect,"ax"
+SYMBOL_NAME_LABEL(interrupt_redirect_table)
+	.rept	7
+	.long	0
+	.endr
+	jsr	@SYMBOL_NAME(interrupt_entry)	/* NMI */
+	jmp	@SYMBOL_NAME(system_call)	/* TRAPA #0 (System call) */
+	.long	0
+	.long	0
+	jmp	@SYMBOL_NAME(trace_break)	/* TRAPA #3 (breakpoint) */
+	.rept	INTERRUPTS-12
+	jsr	@SYMBOL_NAME(interrupt_entry)
+	.endr
+#endif
+#if defined(CONFIG_RAMKERNEL)
+.globl SYMBOL_NAME(interrupt_redirect_table)
+	.section .bss
+SYMBOL_NAME_LABEL(interrupt_redirect_table)
+	.space	4
+#endif
+	
+	.section .text
+	.align	2
+SYMBOL_NAME_LABEL(interrupt_entry)
+	SAVE_ALL
+	mov.w	@(LCCR,sp),r0
+	btst	#4,r0l
+	bne	1f
+	mov.l	@SYMBOL_NAME(sw_usp),er0
+	mov.l	@(4:16,er0),er0
+	bra	2f
+1:
+	mov.l	@(LVEC:16,sp),er0
+2:
+#if defined(CONFIG_ROMKERNEL)
+	sub.l	#SYMBOL_NAME(interrupt_redirect_table),er0
+#endif
+#if defined(CONFIG_RAMKERNEL)
+	mov.l	@SYMBOL_NAME(interrupt_redirect_table),er1
+	sub.l	er1,er0
+#endif
+	shlr.l	#2,er0
+	dec.l	#1,er0
+	mov.l	sp,er1
+	subs	#4,er1				/* adjust ret_pc */
+	jsr	@SYMBOL_NAME(process_int)
+	mov.l	@SYMBOL_NAME(irq_stat)+SOFTIRQ_PENDING,er0
+	beq	1f
+	jsr	@SYMBOL_NAME(do_softirq)
+1:
+	jmp	@SYMBOL_NAME(ret_from_exception)
+
+SYMBOL_NAME_LABEL(system_call)
+	subs	#4,sp				/* dummy LVEC */
+	SAVE_ALL
+	mov.w	@(LCCR:16,sp),r1
+	bset	#4,r1l
+	ldc	r1l,ccr				/* restore ccr */
+	mov.l	er0,er4
+	mov.l	#-ENOSYS,er0
+	mov.l	er0,@(LER0:16,sp)
+
+	/* save top of frame */
+	mov.l	sp,er0
+	jsr	@SYMBOL_NAME(set_esp0)
+	cmp.l	#NR_syscalls,er4
+	bcc	SYMBOL_NAME(ret_from_exception):16
+	shll.l	#2,er4
+	mov.l	#SYMBOL_NAME(sys_call_table),er0
+	add.l	er4,er0
+	mov.l	@er0,er0
+	mov.l	er0,er4
+	beq	SYMBOL_NAME(ret_from_exception):16	
+	mov.l	sp,er2
+	and.w	#0xe000,r2
+	mov.b	@((TASK_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
+	btst	#(TIF_SYSCALL_TRACE & 7),r2l
+	mov.l	@(LER1:16,sp),er0
+	mov.l	@(LER2:16,sp),er1
+	mov.l	@(LER3:16,sp),er2
+	jsr	@er4
+	mov.l	er0,@(LER0,sp)			/* save the return value */
+#if defined(CONFIG_SYSCALL_PRINT)
+	jsr	@SYMBOL_NAME(syscall_print)
+#endif
+	jmp	@SYMBOL_NAME(ret_from_exception)
+1:
+	jsr	SYMBOL_NAME(syscall_trace)
+	mov.l	@(LER1:16,sp),er0
+	mov.l	@(LER2:16,sp),er1
+	mov.l	@(LER3:16,sp),er2
+	jsr	@er4
+	mov.l	er0,@(LER0:16,sp)		/* save the return value */
+	jsr	SYMBOL_NAME(syscall_trace)
+
+SYMBOL_NAME_LABEL(ret_from_signal)
+
+SYMBOL_NAME_LABEL(ret_from_exception)
+	mov.b	@(LCCR+1:16,sp),r0l
+	btst	#4,r0l			/* check if returning to kernel */
+	bne	3f			/* if so, skip resched, signals */
+	andc	#0x7f,ccr
+	mov.l	sp,er2
+	and.w	#0xe000,r2
+	mov.l	@(TI_FLAGS:16,er2),er1
+	and.l	#_TIF_WORK_MASK,er1
+	beq	3f
+1:
+	mov.l	@(TI_FLAGS:16,er2),er1
+	btst	#TIF_NEED_RESCHED,r1l
+	bne	@SYMBOL_NAME(reschedule):16
+	mov.l	sp,er1
+	mov.l	er2,er0
+	jsr	@SYMBOL_NAME(do_signal)
+3:	 
+	RESTORE_ALL			/* Does RTE */
+
+SYMBOL_NAME_LABEL(reschedule)
+	/* save top of frame */
+	mov.l	sp,er0
+	jsr	@SYMBOL_NAME(set_esp0)
+
+	mov.l	#SYMBOL_NAME(ret_from_exception),er0
+	mov.l	er0,@-sp
+	jmp	@SYMBOL_NAME(schedule)
+
+SYMBOL_NAME_LABEL(ret_from_fork)
+	mov.l	er2,er0
+	jsr	@SYMBOL_NAME(schedule_tail)
+	jmp	@SYMBOL_NAME_LABEL(ret_from_exception)	
+
+
+SYMBOL_NAME_LABEL(resume)
+	/*
+	 *	er0 = prev
+	 *	er1 = next
+	 *	return last in er2
+	 */
+
+	/* save sr */
+	sub.w	r3,r3
+	stc	ccr,r3l
+	stc	exr,r3h
+	mov.w	r3,@(THREAD_CCR+2:16,er0)
+
+	/* disable interrupts */
+	orc	#0x80,ccr
+	mov.l	@SYMBOL_NAME(sw_usp),er3
+	mov.l	er3,@(THREAD_USP:16,er0)
+	mov.l	sp,@(THREAD_KSP:16,er0)
+	
+	/* Skip address space switching if they are the same. */
+	/* FIXME: what did we hack out of here, this does nothing! */
+
+	mov.l	@(THREAD_USP:16,er1),er0
+	mov.l	er0,@SYMBOL_NAME(sw_usp)
+	mov.l	@(THREAD_KSP:16,er1),sp
+			
+	/* restore status register */
+	mov.w	@(THREAD_CCR+2:16,er1),r3
+
+	ldc	r3l,ccr
+	ldc	r3h,exr
+	
+	rts
+
+SYMBOL_NAME_LABEL(trace_break)
+	subs	#4,sp			/* dummy LVEC */
+	SAVE_ALL
+	sub.l	er1,er1
+	dec.l	#1,er1
+	mov.l	er1,@(LORIG,sp)	
+	mov.l	sp,er0
+	jsr	@SYMBOL_NAME(set_esp0)
+	mov.l	@SYMBOL_NAME(sw_usp),er0
+	mov.l	@er0,er1
+	subs	#2,er1
+	mov.l	er1,@er0	
+	and.w	#0xff,e1
+	mov.l	er1,er0
+	jsr	@SYMBOL_NAME(trace_trap)
+	jmp	@SYMBOL_NAME(ret_from_exception)	
+
+SYMBOL_NAME_LABEL(syscall_trampoline)
+	mov.l	er0,er6
+	mov.l	sp,er0
+	jmp	@er6
+
+	.section	.bss
+SYMBOL_NAME_LABEL(sw_ksp)
+	.space	4	
+SYMBOL_NAME_LABEL(sw_usp)
+	.space	4	

arch/h8300/platform/h8s/generic/Makefile

+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+extra-y =  crt0_$(MODEL).o
+obj-y := timer.o
+
+timer.o: timer.c
+
+clean:
+	rm -f *.[oa]

arch/h8300/platform/h8s/generic/crt0_ram.S

+/*
+ *  linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend startup
+ *  Target Archtecture:	generic
+ *  Memory Layout     :	RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+			
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+	
+	.global SYMBOL_NAME(_start)
+	.global SYMBOL_NAME(_command_line)
+	.global SYMBOL_NAME(_platform_gpio_table)
+	.global SYMBOL_NAME(_target_name)
+	
+	.h8300s
+
+	.section .text
+	.file	"crt0_ram.S"
+
+	/* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+	mov.l	#RAMEND,sp
+	ldc	#0x07,exr
+
+	/* Peripheral Setup */
+	bclr	#4,@INTCR:8	/* interrupt mode 2 */
+	bset	#5,@INTCR:8
+
+#if defined(CONFIG_BLK_DEV_BLKMEM)
+	/* move romfs image */
+	jsr	@__move_romfs	
+#endif
+	
+	/* .bss clear */
+	mov.l	#__sbss,er5
+	mov.l	er5,er6
+	mov.l	#__ebss,er4
+	sub.l	er5,er4
+	shlr	#2,er4
+	sub.l	er0,er0
+1:	
+	mov.l	er0,@er5
+	adds	#4,er5
+	dec.l	#1,er4
+	bne	1b
+
+	/* copy kernel commandline */
+	mov.l	#COMMAND_START,er5
+	mov.l	#SYMBOL_NAME(command_line),er6
+	mov.w	#512,r4
+	eepmov.w
+
+	/* uClinux kernel start */
+	ldc	#0x10,ccr	/* running kernel */
+	mov.l	#SYMBOL_NAME(init_thread_union),sp
+	add.l	#0x2000,sp
+	jsr	@_start_kernel
+_exit:
+
+	jmp	_exit
+
+	rts
+
+	/* I/O port assign information */
+__platform_gpio_table:	
+	mov.l	#gpio_table,er0
+	rts
+
+gpio_table:
+	;; P1DDR
+	;;      used,ddr
+	.byte	0x00,0x00
+	;; P2DDR
+	.byte	0x00,0x00
+	;; P3DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; P5DDR
+	.byte	0x00,0x00
+	;; P6DDR
+	.byte	0x00,0x00
+	;; P7DDR
+	.byte	0x00,0x00
+	;; P8DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; PADDR
+	.byte	0x00,0x00
+	;; PBDDR
+	.byte	0x00,0x00
+	;; PCDDR
+	.byte	0x00,0x00
+	;; PDDDR
+	.byte	0x00,0x00
+	;; PEDDR
+	.byte	0x00,0x00
+	;; PFDDR
+	.byte	0x00,0x00
+	;; PGDDR
+	.byte	0x00,0x00
+	;; PHDDR
+	.byte	0x00,0x00
+
+__target_name:	
+	.asciz	"generic"
+	
+	.section .bootvec,"ax"
+	jmp	@SYMBOL_NAME(_start)

arch/h8300/platform/h8s/generic/crt0_rom.S

+/*
+ *  linux/arch/h8300/platform/h8s/generic/crt0_rom.S
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend startup 
+ *  Target Archtecture:	generic
+ *  Memory Layout     :	ROM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+	
+	.global SYMBOL_NAME(_start)
+	.global SYMBOL_NAME(_command_line)
+	.global SYMBOL_NAME(_platform_gpio_table)
+	.global SYMBOL_NAME(_target_name)
+	
+	.h8300s
+	.section .text
+	.file	"crt0_rom.S"
+
+	/* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+	mov.l	#__ramend,sp
+	ldc	#0x80,ccr
+	ldc	#0,exr
+	bclr	#4,@INTCR:8
+	bset	#5,@INTCR:8	/* Interrupt mode 2 */
+	
+	/* Peripheral Setup */
+	
+	/* .bss clear */
+	mov.l	#__sbss,er5
+	mov.l	er5,er6
+	inc.l	#1,er6
+	mov.l	#__ebss,er4
+	sub.l	er5,er4
+	sub.w	r0,r0
+	mov.b	r0l,@er5
+1:	
+	eepmov.w
+	dec.w	#1,e4
+	bpl	1b
+
+	/* copy .data */
+#if !defined(CONFIG_H8S_SIM)
+	mov.l	#__begin_data,er5
+	mov.l	#__sdata,er6
+	mov.l	#__edata,er4
+	sub.l	er6,er4		
+1:	
+	eepmov.w	
+	dec.w	#1,e4
+	bpl	1b	
+#endif
+
+	/* copy kernel commandline */
+	mov.l	#COMMAND_START,er5
+	mov.l	#SYMBOL_NAME(_command_line),er6
+	mov.w	#512,r4
+	eepmov.w
+
+	/* linux kernel start */
+	ldc	#0x90,ccr	/* running kernel */
+	mov.l	#SYMBOL_NAME(init_thread_union),sp
+	add.l	#0x2000,sp
+	jsr	@_start_kernel
+_exit:
+
+	jmp	_exit
+
+	rts
+
+	/* I/O port assign information */
+__platform_gpio_table:	
+	mov.l	#gpio_table,er0
+	rts
+
+gpio_table:
+	;; P1DDR
+	.byte	0x00,0x00
+	;; P2DDR
+	.byte	0x00,0x00
+	;; P3DDR
+	.byte	0x00,0x00
+	;; P4DDR
+	.byte	0x00,0x00
+	;; P5DDR
+	.byte	0x00,0x00
+	;; P6DDR
+	.byte	0x00,0x00
+	;; dummy
+	.byte	0x00,0x00
+	;; P8DDR
+	.byte	0x00,0x00
+	;; PADDR
+	.byte	0x00,0x00
+	;; PBDDR
+	.byte	0x00,0x00
+	;; PCDDR
+	.byte	0x00,0x00
+	;; PDDDR
+	.byte	0x00,0x00
+	;; PEDDR
+	.byte	0x00,0x00
+	;; PFDDR
+	.byte	0x00,0x00
+	;; PGDDR
+	.byte	0x00,0x00
+	;; PHDDR
+	.byte	0x00,0x00
+
+__target_name:	
+	.asciz	"generic"
+	
+	.section .bss
+__command_line:	
+	.space	512
+
+	/* interrupt vector */
+	.section .vectors,"ax"
+	.long	__start
+	.long	__start
+vector	=	2
+	.rept	126-1
+	.long	_interrupt_redirect_table+vector*4
+vector	=	vector + 1
+	.endr

arch/h8300/platform/h8s/generic/ram.ld

+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY 
+	{
+	ram    : ORIGIN = 0x400000, LENGTH = 0x200000
+	eram   : ORIGIN = 0x600000, LENGTH = 0
+	}

arch/h8300/platform/h8s/generic/rom.ld

+OUTPUT_ARCH(h8300s)
+ENTRY("__start")
+
+MEMORY 
+	{
+	vector : ORIGIN = 0x000000, LENGTH = 0x000200
+	rom    : ORIGIN = 0x000200, LENGTH = 0x200000-0x000200
+	erom   : ORIGIN = 0x200000, LENGTH = 0
+	ram    : ORIGIN = 0x200000, LENGTH = 0x200000
+	eram   : ORIGIN = 0x400000, LENGTH = 0
+	}

arch/h8300/platform/h8s/generic/timer.c

+/*
+ *  linux/arch/h8300/platform/h8s/generic/timer.c
+ *
+ *  Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ *  Platform depend Timer Handler
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs267x.h>
+
+extern int request_irq_boot(unsigned int,
+		            irqreturn_t (*handler)(int, void *, struct pt_regs *),
+		            unsigned long, const char *, void *);
+
+int platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
+{
+	outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+	outb(0x00,_8TCSR1);
+	request_irq_boot(76,timer_int,0,"timer",0);
+	outb(0x40|0x08|0x03,_8TCR1);
+	return 0;
+}
+
+void platform_timer_eoi(void)
+{
+        __asm__("bclr #6,@0xffffb3:8");
+}
+
+void platform_gettod(int *year, int *mon, int *day, int *hour,
+		 int *min, int *sec)
+{
+	*year = *mon = *day = *hour = *min = *sec = 0;
+}

arch/h8300/platform/h8s/ints.c

+/*
+ * linux/arch/h8300/platform/h8sh/ints.c
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Based on linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/bootmem.h>
+#include <linux/random.h>
+
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/traps.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/gpio.h>
+#include <asm/hardirq.h>
+#include <asm/regs267x.h>
+#include <asm/errno.h>
+
+#define EXT_IRQ0 16
+#define EXT_IRQ1 17
+#define EXT_IRQ2 18
+#define EXT_IRQ3 19
+#define EXT_IRQ4 20
+#define EXT_IRQ5 21
+#define EXT_IRQ6 22
+#define EXT_IRQ7 23
+#define EXT_IRQ8 24
+#define EXT_IRQ9 25
+#define EXT_IRQ10 26
+#define EXT_IRQ11 27
+#define EXT_IRQ12 28
+#define EXT_IRQ13 29
+#define EXT_IRQ14 30
+#define EXT_IRQ15 31
+
+/*
+ * This structure has only 4 elements for speed reasons
+ */
+typedef struct irq_handler {
+	irqreturn_t (*handler)(int, void *, struct pt_regs *);
+	int         flags;
+	int         count;
+	void	    *dev_id;
+	const char  *devname;
+} irq_handler_t;
+
+static irq_handler_t *irq_list[NR_IRQS];
+
+/* IRQ pin assignment */
+struct irq_pins {
+	unsigned char port_no;
+	unsigned char bit_no;
+};
+/* ISTR = 0 */
+const static struct irq_pins irq_assign_table0[16]={
+        {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
+	{H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
+	{H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
+	{H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
+	{H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
+	{H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
+	{H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
+	{H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
+};
+/* ISTR = 1 */
+const static struct irq_pins irq_assign_table1[16]={
+	{H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
+	{H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
+	{H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
+	{H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
+	{H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
+	{H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
+	{H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
+	{H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
+};
+
+extern unsigned long *interrupt_redirect_table;
+
+static inline unsigned long *get_vector_address(void)
+{
+	volatile unsigned long *rom_vector = (unsigned long *)0x000000;
+	unsigned long base,tmp;
+	int vec_no;
+
+	base = rom_vector[EXT_IRQ0];
+	
+	/* check romvector format */
+	for (vec_no = EXT_IRQ1; vec_no <= EXT_IRQ15; vec_no++) {
+		if ((base+(vec_no - EXT_IRQ0)*4) != rom_vector[vec_no])
+			return NULL;
+	}
+
+	/* ramvector base address */
+	base -= EXT_IRQ0*4;
+
+	/* writerble check */
+	tmp = ~(*(unsigned long *)base);
+	(*(unsigned long *)base) = tmp;
+	if ((*(unsigned long *)base) != tmp)
+		return NULL;
+	return (unsigned long *)base;
+}
+
+void __init init_IRQ(void)
+{
+#if defined(CONFIG_RAMKERNEL)
+	int i;
+	unsigned long *ramvec,*ramvec_p;
+	unsigned long break_vec;
+
+	ramvec = get_vector_address();
+	if (ramvec == NULL)
+		panic("interrupt vector serup failed.");
+	else
+		printk("virtual vector at 0x%08lx\n",(unsigned long)ramvec);
+
+#if defined(CONFIG_GDB_DEBUG)
+	/* save orignal break vector */
+	break_vec = ramvec[TRAP3_VEC];
+#else
+	break_vec = VECTOR(trace_break);
+#endif
+
+	/* create redirect table */
+	for (ramvec_p = ramvec, i = 0; i < NR_IRQS; i++)
+		*ramvec_p++ = REDIRECT(interrupt_entry);
+
+	/* set special vector */
+	ramvec[TRAP0_VEC] = VECTOR(system_call);
+	ramvec[TRAP3_VEC] = break_vec;
+	interrupt_redirect_table = ramvec;
+#ifdef DUMP_VECTOR
+	ramvec_p = ramvec;
+	for (i = 0; i < NR_IRQS; i++) {
+		if ((i % 8) == 0)
+			printk("\n%p: ",ramvec_p);
+		printk("%p ",*ramvec_p);
+		ramvec_p++;
+	}
+	printk("\n");
+#endif
+#endif
+}
+
+/* special request_irq */
+/* used bootmem allocater */
+void __init request_irq_boot(unsigned int irq, 
+  	                     irqreturn_t (*handler)(int, void *, struct pt_regs *),
+                             unsigned long flags, const char *devname, void *dev_id)
+{
+	irq_handler_t *irq_handle;
+	irq_handle = alloc_bootmem(sizeof(irq_handler_t));
+	irq_handle->handler = handler;
+	irq_handle->flags   = flags;
+	irq_handle->count   = 0;
+	irq_handle->dev_id  = dev_id;
+	irq_handle->devname = devname;
+	irq_list[irq] = irq_handle;
+}
+
+int request_irq(unsigned int irq,
+		irqreturn_t (*handler)(int, void *, struct pt_regs *),
+                unsigned long flags, const char *devname, void *dev_id)
+{
+	unsigned short ptn = 1 << (irq - EXT_IRQ0);
+	irq_handler_t *irq_handle;
+	if (irq < 0 || irq >= NR_IRQS) {
+		printk("Incorrect IRQ %d from %s\n", irq, devname);
+		return -EINVAL;
+	}
+	if (irq_list[irq])
+		return -EBUSY; /* already used */
+	if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
+		/* initialize IRQ pin */
+		unsigned int port_no,bit_no;
+		if (*(volatile unsigned short *)ITSR & ptn) {
+			port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
+			bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
+		} else {
+			port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
+			bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
+		}
+		if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
+			return -EBUSY;                   /* pin already use */
+		H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
+		*(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
+	}		
+	irq_handle = (irq_handler_t *)kmalloc(sizeof(irq_handler_t), GFP_ATOMIC);
+	if (irq_handle == NULL)
+		return -ENOMEM;
+
+	irq_handle->handler = handler;
+	irq_handle->flags   = flags;
+	irq_handle->count   = 0;
+	irq_handle->dev_id  = dev_id;
+	irq_handle->devname = devname;
+	irq_list[irq] = irq_handle;
+	if (irq_handle->flags & SA_SAMPLE_RANDOM)
+		rand_initialize_irq(irq);
+	
+	/* enable interrupt */
+	/* compatible i386  */
+	if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+		*(volatile unsigned short *)IER |= ptn;
+	return 0;
+}
+
+void free_irq(unsigned int irq, void *dev_id)
+{
+	if (irq >= NR_IRQS)
+		return;
+	if (irq_list[irq]->dev_id != dev_id)
+		printk("%s: Removing probably wrong IRQ %d from %s\n",
+		       __FUNCTION__, irq, irq_list[irq]->devname);
+	if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
+		/* disable interrupt & release IRQ pin */
+		unsigned short port_no,bit_no;
+		*(volatile unsigned short *)ISR &= ~(1 << (irq - EXT_IRQ0));
+		*(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
+		if (*(volatile unsigned short *)ITSR & (1 << (irq - EXT_IRQ0))) {
+			port_no = irq_assign_table1[irq - EXT_IRQ0].port_no;
+			bit_no = irq_assign_table1[irq - EXT_IRQ0].bit_no;
+		} else {
+			port_no = irq_assign_table0[irq - EXT_IRQ0].port_no;
+			bit_no = irq_assign_table0[irq - EXT_IRQ0].bit_no;
+		}
+		H8300_GPIO_FREE(port_no, bit_no);
+	}
+	kfree(irq_list[irq]);
+	irq_list[irq] = NULL;
+}
+
+unsigned long probe_irq_on (void)
+{
+	return 0;
+}
+
+int probe_irq_off (unsigned long irqs)
+{
+	return 0;
+}
+
+void enable_irq(unsigned int irq)
+{
+	if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+		*(volatile unsigned short *)IER |= 1 << (irq - EXT_IRQ0);
+}
+
+void disable_irq(unsigned int irq)
+{
+	if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15)
+		*(volatile unsigned short *)IER &= ~(1 << (irq - EXT_IRQ0));
+}
+
+asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
+{
+	irq_enter();
+	/* ISR clear       */
+	/* compatible i386 */
+	if (vec >= EXT_IRQ0 && vec <= EXT_IRQ15)
+		*(volatile unsigned short *)ISR &= ~(1 << (vec - EXT_IRQ0));
+	if (vec < NR_IRQS) {
+		if (irq_list[vec]) {
+			irq_list[vec]->handler(vec, irq_list[vec]->dev_id, fp);
+			irq_list[vec]->count++;
+			if (irq_list[vec]->flags & SA_SAMPLE_RANDOM)
+				add_interrupt_randomness(vec);
+		}
+	} else {
+		BUG();
+	}
+	irq_exit();
+}
+
+int show_interrupts(struct seq_file *p, void *v)
+{
+	int i;
+
+	for (i = 0; i < NR_IRQS; i++) {
+		if (irq_list[i]) {
+			seq_printf(p, "%3d: %10u ",i,irq_list[i]->count);
+			seq_printf(p, "%s\n", irq_list[i]->devname);
+		}
+	}
+
+	return 0;
+}
+
+void init_irq_proc(void)
+{
+}