[PATCH] Fix APIC ID handling

Fix APIC ID lookup.  In the bios_cpu_apicid[] case, it would walk off
the end of bios_cpu_apicid[] and attempt to send APIC INIT messages to
garbage without this patch, and in the NUMA-Q case, it would attempt to
send NMI wakeups to destinations in the broadcast cluster (which is
harmless, but very poor form) without this patch.

include/asm-i386/mach-bigsmp/mach_apic.h

@@ -86,7 +86,10 @@ extern u8 bios_cpu_apicid[];
 
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
-	return (int) bios_cpu_apicid[mps_cpu];
+	if (mps_cpu < NR_CPUS)
+		return (int)bios_cpu_apicid[mps_cpu];
+	else
+		return BAD_APICID;
 }
 
 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)

include/asm-i386/mach-es7000/mach_apic.h

@@ -106,8 +106,10 @@ static inline int cpu_present_to_apicid(int mps_cpu)
 {
 	if (!mps_cpu)
 		return boot_cpu_physical_apicid;
-	else
+	else if (mps_cpu < NR_CPUS)
 		return (int) bios_cpu_apicid[mps_cpu];
+	else
+		return BAD_APICID;
 }
 
 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)

include/asm-i386/mach-numaq/mach_apic.h

@@ -65,9 +65,17 @@ static inline int cpu_to_logical_apicid(int cpu)
 	return (int)cpu_2_logical_apicid[cpu];
 }
 
+/*
+ * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
+ * cpu to APIC ID relation to properly interact with the intelligent
+ * mode of the cluster controller.
+ */
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
+	if (mps_cpu < 60)
 		return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
+	else
+		return BAD_APICID;
 }
 
 static inline int generate_logical_apicid(int quad, int phys_apicid)

include/asm-i386/mach-summit/mach_apic.h

@@ -87,7 +87,10 @@ static inline int cpu_to_logical_apicid(int cpu)
 
 static inline int cpu_present_to_apicid(int mps_cpu)
 {
-	return (int) bios_cpu_apicid[mps_cpu];
+	if (mps_cpu < NR_CPUS)
+		return (int)bios_cpu_apicid[mps_cpu];
+	else
+		return BAD_APICID;
 }
 
 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)