Commit 7ec4b243 authored by Sekhar Nori's avatar Sekhar Nori Committed by Kevin Hilman

davinci: move DDR2 controller defines to memory.h

Move defintions of DDR2 controller registers to memory.h
from cpuidle.c. The motivation behind the change is to be
able to use these defintions in assembly code that puts
DDR2 in self-refresh and enables the SoC to enter suspend
state.
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 9a219a9e
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/proc-fns.h> #include <asm/proc-fns.h>
#include <mach/cpuidle.h> #include <mach/cpuidle.h>
#include <mach/memory.h>
#define DAVINCI_CPUIDLE_MAX_STATES 2 #define DAVINCI_CPUIDLE_MAX_STATES 2
...@@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = { ...@@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = {
static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
static void __iomem *ddr2_reg_base; static void __iomem *ddr2_reg_base;
#define DDR2_SDRCR_OFFSET 0xc
#define DDR2_SRPD_BIT BIT(23)
#define DDR2_LPMODEN_BIT BIT(31)
static void davinci_save_ddr_power(int enter, bool pdown) static void davinci_save_ddr_power(int enter, bool pdown)
{ {
u32 val; u32 val;
......
...@@ -31,6 +31,10 @@ ...@@ -31,6 +31,10 @@
#define PHYS_OFFSET DAVINCI_DDR_BASE #define PHYS_OFFSET DAVINCI_DDR_BASE
#endif #endif
#define DDR2_SDRCR_OFFSET 0xc
#define DDR2_SRPD_BIT BIT(23)
#define DDR2_LPMODEN_BIT BIT(31)
/* /*
* Increase size of DMA-consistent memory region * Increase size of DMA-consistent memory region
*/ */
......
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