Commit 81f66606 authored by Shawn Lin's avatar Shawn Lin Committed by Heiko Stuebner

arm64: dts: rockchip: extent IORESOURCE_MEM_64 of PCIe for rk3399

Make full use of 32 regions and increase IORESOURCE_MEM_64
so that we could have more chance to support PCIe switch with
more endpoints attached to our RC.
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent d633becc
...@@ -239,8 +239,8 @@ pcie0: pcie@f8000000 { ...@@ -239,8 +239,8 @@ pcie0: pcie@f8000000 {
msi-map = <0x0 &its 0x0 0x1000>; msi-map = <0x0 &its 0x0 0x1000>;
phys = <&pcie_phy>; phys = <&pcie_phy>;
phy-names = "pcie-phy"; phy-names = "pcie-phy";
ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>; 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>, <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
......
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