Commit 835c0553 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Benjamin Herrenschmidt

powerpc: mpic irq_data conversion.

Signed-off-by: default avatarLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 4e8b0cf4
...@@ -467,11 +467,11 @@ extern void mpic_request_ipis(void); ...@@ -467,11 +467,11 @@ extern void mpic_request_ipis(void);
void smp_mpic_message_pass(int target, int msg); void smp_mpic_message_pass(int target, int msg);
/* Unmask a specific virq */ /* Unmask a specific virq */
extern void mpic_unmask_irq(unsigned int irq); extern void mpic_unmask_irq(struct irq_data *d);
/* Mask a specific virq */ /* Mask a specific virq */
extern void mpic_mask_irq(unsigned int irq); extern void mpic_mask_irq(struct irq_data *d);
/* EOI a specific virq */ /* EOI a specific virq */
extern void mpic_end_irq(unsigned int irq); extern void mpic_end_irq(struct irq_data *d);
/* Fetch interrupt from a given mpic */ /* Fetch interrupt from a given mpic */
extern unsigned int mpic_get_one_irq(struct mpic *mpic); extern unsigned int mpic_get_one_irq(struct mpic *mpic);
......
...@@ -240,7 +240,7 @@ static __init void pas_init_IRQ(void) ...@@ -240,7 +240,7 @@ static __init void pas_init_IRQ(void)
nmi_virq = irq_create_mapping(NULL, *nmiprop); nmi_virq = irq_create_mapping(NULL, *nmiprop);
mpic_irq_set_priority(nmi_virq, 15); mpic_irq_set_priority(nmi_virq, 15);
set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING); set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
mpic_unmask_irq(nmi_virq); mpic_unmask_irq(irq_get_irq_data(nmi_virq));
} }
of_node_put(mpic_node); of_node_put(mpic_node);
...@@ -266,7 +266,7 @@ static int pas_machine_check_handler(struct pt_regs *regs) ...@@ -266,7 +266,7 @@ static int pas_machine_check_handler(struct pt_regs *regs)
if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) { if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
printk(KERN_ERR "NMI delivered\n"); printk(KERN_ERR "NMI delivered\n");
debugger(regs); debugger(regs);
mpic_end_irq(nmi_virq); mpic_end_irq(irq_get_irq_data(nmi_virq));
goto out; goto out;
} }
......
...@@ -611,7 +611,7 @@ static struct mpic *mpic_find(unsigned int irq) ...@@ -611,7 +611,7 @@ static struct mpic *mpic_find(unsigned int irq)
if (irq < NUM_ISA_INTERRUPTS) if (irq < NUM_ISA_INTERRUPTS)
return NULL; return NULL;
return irq_to_desc(irq)->chip_data; return get_irq_chip_data(irq);
} }
/* Determine if the linux irq is an IPI */ /* Determine if the linux irq is an IPI */
...@@ -636,16 +636,22 @@ static inline u32 mpic_physmask(u32 cpumask) ...@@ -636,16 +636,22 @@ static inline u32 mpic_physmask(u32 cpumask)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
/* Get the mpic structure from the IPI number */ /* Get the mpic structure from the IPI number */
static inline struct mpic * mpic_from_ipi(unsigned int ipi) static inline struct mpic * mpic_from_ipi(struct irq_data *d)
{ {
return irq_to_desc(ipi)->chip_data; return irq_data_get_irq_chip_data(d);
} }
#endif #endif
/* Get the mpic structure from the irq number */ /* Get the mpic structure from the irq number */
static inline struct mpic * mpic_from_irq(unsigned int irq) static inline struct mpic * mpic_from_irq(unsigned int irq)
{ {
return irq_to_desc(irq)->chip_data; return get_irq_chip_data(irq);
}
/* Get the mpic structure from the irq data */
static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
{
return irq_data_get_irq_chip_data(d);
} }
/* Send an EOI */ /* Send an EOI */
...@@ -660,13 +666,13 @@ static inline void mpic_eoi(struct mpic *mpic) ...@@ -660,13 +666,13 @@ static inline void mpic_eoi(struct mpic *mpic)
*/ */
void mpic_unmask_irq(unsigned int irq) void mpic_unmask_irq(struct irq_data *d)
{ {
unsigned int loops = 100000; unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src);
mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) &
...@@ -681,13 +687,13 @@ void mpic_unmask_irq(unsigned int irq) ...@@ -681,13 +687,13 @@ void mpic_unmask_irq(unsigned int irq)
} while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK); } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
} }
void mpic_mask_irq(unsigned int irq) void mpic_mask_irq(struct irq_data *d)
{ {
unsigned int loops = 100000; unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src);
mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) | mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) |
...@@ -703,12 +709,12 @@ void mpic_mask_irq(unsigned int irq) ...@@ -703,12 +709,12 @@ void mpic_mask_irq(unsigned int irq)
} while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK)); } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
} }
void mpic_end_irq(unsigned int irq) void mpic_end_irq(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
#ifdef DEBUG_IRQ #ifdef DEBUG_IRQ
DBG("%s: end_irq: %d\n", mpic->name, irq); DBG("%s: end_irq: %d\n", mpic->name, d->irq);
#endif #endif
/* We always EOI on end_irq() even for edge interrupts since that /* We always EOI on end_irq() even for edge interrupts since that
* should only lower the priority, the MPIC should have properly * should only lower the priority, the MPIC should have properly
...@@ -720,51 +726,51 @@ void mpic_end_irq(unsigned int irq) ...@@ -720,51 +726,51 @@ void mpic_end_irq(unsigned int irq)
#ifdef CONFIG_MPIC_U3_HT_IRQS #ifdef CONFIG_MPIC_U3_HT_IRQS
static void mpic_unmask_ht_irq(unsigned int irq) static void mpic_unmask_ht_irq(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
mpic_unmask_irq(irq); mpic_unmask_irq(d);
if (irq_to_desc(irq)->status & IRQ_LEVEL) if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
mpic_ht_end_irq(mpic, src); mpic_ht_end_irq(mpic, src);
} }
static unsigned int mpic_startup_ht_irq(unsigned int irq) static unsigned int mpic_startup_ht_irq(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
mpic_unmask_irq(irq); mpic_unmask_irq(d);
mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status); mpic_startup_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
return 0; return 0;
} }
static void mpic_shutdown_ht_irq(unsigned int irq) static void mpic_shutdown_ht_irq(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status); mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
mpic_mask_irq(irq); mpic_mask_irq(d);
} }
static void mpic_end_ht_irq(unsigned int irq) static void mpic_end_ht_irq(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
#ifdef DEBUG_IRQ #ifdef DEBUG_IRQ
DBG("%s: end_irq: %d\n", mpic->name, irq); DBG("%s: end_irq: %d\n", mpic->name, d->irq);
#endif #endif
/* We always EOI on end_irq() even for edge interrupts since that /* We always EOI on end_irq() even for edge interrupts since that
* should only lower the priority, the MPIC should have properly * should only lower the priority, the MPIC should have properly
* latched another edge interrupt coming in anyway * latched another edge interrupt coming in anyway
*/ */
if (irq_to_desc(irq)->status & IRQ_LEVEL) if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
mpic_ht_end_irq(mpic, src); mpic_ht_end_irq(mpic, src);
mpic_eoi(mpic); mpic_eoi(mpic);
} }
...@@ -772,23 +778,23 @@ static void mpic_end_ht_irq(unsigned int irq) ...@@ -772,23 +778,23 @@ static void mpic_end_ht_irq(unsigned int irq)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
static void mpic_unmask_ipi(unsigned int irq) static void mpic_unmask_ipi(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_ipi(irq); struct mpic *mpic = mpic_from_ipi(d);
unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0]; unsigned int src = mpic_irq_to_hw(d->irq) - mpic->ipi_vecs[0];
DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src);
mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
} }
static void mpic_mask_ipi(unsigned int irq) static void mpic_mask_ipi(struct irq_data *d)
{ {
/* NEVER disable an IPI... that's just plain wrong! */ /* NEVER disable an IPI... that's just plain wrong! */
} }
static void mpic_end_ipi(unsigned int irq) static void mpic_end_ipi(struct irq_data *d)
{ {
struct mpic *mpic = mpic_from_ipi(irq); struct mpic *mpic = mpic_from_ipi(d);
/* /*
* IPIs are marked IRQ_PER_CPU. This has the side effect of * IPIs are marked IRQ_PER_CPU. This has the side effect of
...@@ -802,10 +808,11 @@ static void mpic_end_ipi(unsigned int irq) ...@@ -802,10 +808,11 @@ static void mpic_end_ipi(unsigned int irq)
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
bool force)
{ {
struct mpic *mpic = mpic_from_irq(irq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(irq); unsigned int src = mpic_irq_to_hw(d->irq);
if (mpic->flags & MPIC_SINGLE_DEST_CPU) { if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
int cpuid = irq_choose_cpu(cpumask); int cpuid = irq_choose_cpu(cpumask);
...@@ -848,15 +855,15 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) ...@@ -848,15 +855,15 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
} }
} }
int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
{ {
struct mpic *mpic = mpic_from_irq(virq); struct mpic *mpic = mpic_from_irq_data(d);
unsigned int src = mpic_irq_to_hw(virq); unsigned int src = mpic_irq_to_hw(d->irq);
struct irq_desc *desc = irq_to_desc(virq); struct irq_desc *desc = irq_to_desc(d->irq);
unsigned int vecpri, vold, vnew; unsigned int vecpri, vold, vnew;
DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
mpic, virq, src, flow_type); mpic, d->irq, src, flow_type);
if (src >= mpic->irq_count) if (src >= mpic->irq_count)
return -EINVAL; return -EINVAL;
...@@ -907,28 +914,28 @@ void mpic_set_vector(unsigned int virq, unsigned int vector) ...@@ -907,28 +914,28 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
} }
static struct irq_chip mpic_irq_chip = { static struct irq_chip mpic_irq_chip = {
.mask = mpic_mask_irq, .irq_mask = mpic_mask_irq,
.unmask = mpic_unmask_irq, .irq_unmask = mpic_unmask_irq,
.eoi = mpic_end_irq, .irq_eoi = mpic_end_irq,
.set_type = mpic_set_irq_type, .irq_set_type = mpic_set_irq_type,
}; };
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
static struct irq_chip mpic_ipi_chip = { static struct irq_chip mpic_ipi_chip = {
.mask = mpic_mask_ipi, .irq_mask = mpic_mask_ipi,
.unmask = mpic_unmask_ipi, .irq_unmask = mpic_unmask_ipi,
.eoi = mpic_end_ipi, .irq_eoi = mpic_end_ipi,
}; };
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
#ifdef CONFIG_MPIC_U3_HT_IRQS #ifdef CONFIG_MPIC_U3_HT_IRQS
static struct irq_chip mpic_irq_ht_chip = { static struct irq_chip mpic_irq_ht_chip = {
.startup = mpic_startup_ht_irq, .irq_startup = mpic_startup_ht_irq,
.shutdown = mpic_shutdown_ht_irq, .irq_shutdown = mpic_shutdown_ht_irq,
.mask = mpic_mask_irq, .irq_mask = mpic_mask_irq,
.unmask = mpic_unmask_ht_irq, .irq_unmask = mpic_unmask_ht_irq,
.eoi = mpic_end_ht_irq, .irq_eoi = mpic_end_ht_irq,
.set_type = mpic_set_irq_type, .irq_set_type = mpic_set_irq_type,
}; };
#endif /* CONFIG_MPIC_U3_HT_IRQS */ #endif /* CONFIG_MPIC_U3_HT_IRQS */
...@@ -1060,12 +1067,12 @@ struct mpic * __init mpic_alloc(struct device_node *node, ...@@ -1060,12 +1067,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic->hc_irq = mpic_irq_chip; mpic->hc_irq = mpic_irq_chip;
mpic->hc_irq.name = name; mpic->hc_irq.name = name;
if (flags & MPIC_PRIMARY) if (flags & MPIC_PRIMARY)
mpic->hc_irq.set_affinity = mpic_set_affinity; mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
#ifdef CONFIG_MPIC_U3_HT_IRQS #ifdef CONFIG_MPIC_U3_HT_IRQS
mpic->hc_ht_irq = mpic_irq_ht_chip; mpic->hc_ht_irq = mpic_irq_ht_chip;
mpic->hc_ht_irq.name = name; mpic->hc_ht_irq.name = name;
if (flags & MPIC_PRIMARY) if (flags & MPIC_PRIMARY)
mpic->hc_ht_irq.set_affinity = mpic_set_affinity; mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
#endif /* CONFIG_MPIC_U3_HT_IRQS */ #endif /* CONFIG_MPIC_U3_HT_IRQS */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
......
...@@ -34,9 +34,10 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic) ...@@ -34,9 +34,10 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
} }
#endif #endif
extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type); extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
extern void mpic_set_vector(unsigned int virq, unsigned int vector); extern void mpic_set_vector(unsigned int virq, unsigned int vector);
extern int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask); extern int mpic_set_affinity(struct irq_data *d,
const struct cpumask *cpumask, bool force);
extern void mpic_reset_core(int cpu); extern void mpic_reset_core(int cpu);
#endif /* _POWERPC_SYSDEV_MPIC_H */ #endif /* _POWERPC_SYSDEV_MPIC_H */
...@@ -43,13 +43,13 @@ static void mpic_pasemi_msi_mask_irq(struct irq_data *data) ...@@ -43,13 +43,13 @@ static void mpic_pasemi_msi_mask_irq(struct irq_data *data)
{ {
pr_debug("mpic_pasemi_msi_mask_irq %d\n", data->irq); pr_debug("mpic_pasemi_msi_mask_irq %d\n", data->irq);
mask_msi_irq(data); mask_msi_irq(data);
mpic_mask_irq(data->irq); mpic_mask_irq(data);
} }
static void mpic_pasemi_msi_unmask_irq(struct irq_data *data) static void mpic_pasemi_msi_unmask_irq(struct irq_data *data)
{ {
pr_debug("mpic_pasemi_msi_unmask_irq %d\n", data->irq); pr_debug("mpic_pasemi_msi_unmask_irq %d\n", data->irq);
mpic_unmask_irq(data->irq); mpic_unmask_irq(data);
unmask_msi_irq(data); unmask_msi_irq(data);
} }
...@@ -57,9 +57,9 @@ static struct irq_chip mpic_pasemi_msi_chip = { ...@@ -57,9 +57,9 @@ static struct irq_chip mpic_pasemi_msi_chip = {
.irq_shutdown = mpic_pasemi_msi_mask_irq, .irq_shutdown = mpic_pasemi_msi_mask_irq,
.irq_mask = mpic_pasemi_msi_mask_irq, .irq_mask = mpic_pasemi_msi_mask_irq,
.irq_unmask = mpic_pasemi_msi_unmask_irq, .irq_unmask = mpic_pasemi_msi_unmask_irq,
.eoi = mpic_end_irq, .irq_eoi = mpic_end_irq,
.set_type = mpic_set_irq_type, .irq_set_type = mpic_set_irq_type,
.set_affinity = mpic_set_affinity, .irq_set_affinity = mpic_set_affinity,
.name = "PASEMI-MSI", .name = "PASEMI-MSI",
}; };
......
...@@ -26,12 +26,12 @@ static struct mpic *msi_mpic; ...@@ -26,12 +26,12 @@ static struct mpic *msi_mpic;
static void mpic_u3msi_mask_irq(struct irq_data *data) static void mpic_u3msi_mask_irq(struct irq_data *data)
{ {
mask_msi_irq(data); mask_msi_irq(data);
mpic_mask_irq(data->irq); mpic_mask_irq(data);
} }
static void mpic_u3msi_unmask_irq(struct irq_data *data) static void mpic_u3msi_unmask_irq(struct irq_data *data)
{ {
mpic_unmask_irq(data->irq); mpic_unmask_irq(data);
unmask_msi_irq(data); unmask_msi_irq(data);
} }
...@@ -39,9 +39,9 @@ static struct irq_chip mpic_u3msi_chip = { ...@@ -39,9 +39,9 @@ static struct irq_chip mpic_u3msi_chip = {
.irq_shutdown = mpic_u3msi_mask_irq, .irq_shutdown = mpic_u3msi_mask_irq,
.irq_mask = mpic_u3msi_mask_irq, .irq_mask = mpic_u3msi_mask_irq,
.irq_unmask = mpic_u3msi_unmask_irq, .irq_unmask = mpic_u3msi_unmask_irq,
.eoi = mpic_end_irq, .irq_eoi = mpic_end_irq,
.set_type = mpic_set_irq_type, .irq_set_type = mpic_set_irq_type,
.set_affinity = mpic_set_affinity, .irq_set_affinity = mpic_set_affinity,
.name = "MPIC-U3MSI", .name = "MPIC-U3MSI",
}; };
......
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