drm/nouveau/flcn/qmgr: explicitly create queue manager from subdevs

Code to interface with LS firmwares is being moved to the subdevs where it
belongs, rather than living in the common falcon code.

This is an incremental step towards that goal.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

@@ -29,4 +29,8 @@ int gp102_sec2_flcn_enable(struct nvkm_falcon *);
 } while(0)
 #define FLCN_DBG(f,fmt,a...) FLCN_PRINTK(debug, (f), fmt, ##a)
 #define FLCN_ERR(f,fmt,a...) FLCN_PRINTK(error, (f), fmt, ##a)
+
+struct nvkm_falcon_qmgr;
+int nvkm_falcon_qmgr_new(struct nvkm_falcon *, struct nvkm_falcon_qmgr **);
+void nvkm_falcon_qmgr_del(struct nvkm_falcon_qmgr **);
 #endif

drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h

@@ -10,6 +10,7 @@ struct nvkm_sec2 {
 	struct nvkm_engine engine;
 	struct nvkm_falcon falcon;
 
+	struct nvkm_falcon_qmgr *qmgr;
 	struct nvkm_msgqueue *queue;
 	struct work_struct work;
 };

drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h

@@ -8,6 +8,8 @@ struct nvkm_pmu {
 	const struct nvkm_pmu_func *func;
 	struct nvkm_subdev subdev;
 	struct nvkm_falcon falcon;
+
+	struct nvkm_falcon_qmgr *qmgr;
 	struct nvkm_msgqueue *queue;
 
 	struct {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

@@ -59,6 +59,7 @@ nvkm_sec2_dtor(struct nvkm_engine *engine)
 {
 	struct nvkm_sec2 *sec2 = nvkm_sec2(engine);
 	nvkm_msgqueue_del(&sec2->queue);
+	nvkm_falcon_qmgr_del(&sec2->qmgr);
 	nvkm_falcon_dtor(&sec2->falcon);
 	return sec2;
 }
@@ -95,6 +96,9 @@ nvkm_sec2_new_(const struct nvkm_sec2_fwif *fwif, struct nvkm_device *device,
 	if (ret)
 		return ret;
 
+	if ((ret = nvkm_falcon_qmgr_new(&sec2->falcon, &sec2->qmgr)))
+		return ret;
+
 	INIT_WORK(&sec2->work, nvkm_sec2_recv);
 	return 0;
 };

drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.h

@@ -132,6 +132,7 @@ struct nvkm_msgqueue_func {
  * @tail_reg:	address of the TAIL register for this queue
  */
 struct nvkm_msgqueue_queue {
+	struct nvkm_falcon_qmgr *qmgr;
 	struct mutex mutex;
 	u32 index;
 	u32 offset;

drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.c

@@ -54,3 +54,26 @@ msgqueue_seq_release(struct nvkm_msgqueue *priv, struct nvkm_msgqueue_seq *seq)
 	seq->completion = NULL;
 	clear_bit(seq->id, priv->seq_tbl);
 }
+
+void
+nvkm_falcon_qmgr_del(struct nvkm_falcon_qmgr **pqmgr)
+{
+	struct nvkm_falcon_qmgr *qmgr = *pqmgr;
+	if (qmgr) {
+		kfree(*pqmgr);
+		*pqmgr = NULL;
+	}
+}
+
+int
+nvkm_falcon_qmgr_new(struct nvkm_falcon *falcon,
+		     struct nvkm_falcon_qmgr **pqmgr)
+{
+	struct nvkm_falcon_qmgr *qmgr;
+
+	if (!(qmgr = *pqmgr = kzalloc(sizeof(*qmgr), GFP_KERNEL)))
+		return -ENOMEM;
+
+	qmgr->falcon = falcon;
+	return 0;
+}

drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h

@@ -9,6 +9,10 @@
 /* max size of the messages we can receive */
 #define MSG_BUF_SIZE 128
 
+struct nvkm_falcon_qmgr {
+	struct nvkm_falcon *falcon;
+};
+
 struct nvkm_msgqueue_seq *msgqueue_seq_acquire(struct nvkm_msgqueue *);
 void msgqueue_seq_release(struct nvkm_msgqueue *, struct nvkm_msgqueue_seq *);
 #endif

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c

@@ -139,6 +139,7 @@ nvkm_pmu_dtor(struct nvkm_subdev *subdev)
 {
 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
 	nvkm_msgqueue_del(&pmu->queue);
+	nvkm_falcon_qmgr_del(&pmu->qmgr);
 	nvkm_falcon_dtor(&pmu->falcon);
 	return nvkm_pmu(subdev);
 }
@@ -156,6 +157,8 @@ int
 nvkm_pmu_ctor(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
 	      int index, struct nvkm_pmu *pmu)
 {
+	int ret;
+
 	nvkm_subdev_ctor(&nvkm_pmu, device, index, &pmu->subdev);
 
 	INIT_WORK(&pmu->recv.work, nvkm_pmu_recv);
@@ -167,9 +170,16 @@ nvkm_pmu_ctor(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
 
 	pmu->func = fwif->func;
 
-	return nvkm_falcon_ctor(pmu->func->flcn, &pmu->subdev,
+	ret = nvkm_falcon_ctor(pmu->func->flcn, &pmu->subdev,
 			       nvkm_subdev_name[pmu->subdev.index], 0x10a000,
 			       &pmu->falcon);
+	if (ret)
+		return ret;
+
+	if ((ret = nvkm_falcon_qmgr_new(&pmu->falcon, &pmu->qmgr)))
+		return ret;
+
+	return 0;
 }
 
 int