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Commit 8c6619ff authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Stefan Agner
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drm: mxsfb: Use BIT() macro to define register bitfields 

Using BIT() is preferred over manual shifts as it's more readable,
handles the 1 << 31 case properly, and avoids other mistakes as shown by
the DEBUG0_HSYNC and DEBUG0_VSYNC bits (that are currently unused). Use
it.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarStefan Agner <stefan@agner.ch>
Reviewed-by: default avatarEmil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20200727020654.8231-4-laurent.pinchart@ideasonboard.com
parent c42001e3
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Showing with 28 additions and 28 deletions
drivers/gpu/drm/mxsfb/mxsfb_regs.h
View file @ 8c6619ff
...@@ -28,51 +28,51 @@ ...@@ -28,51 +28,51 @@
#define LCDC_V4_DEBUG0 0x1d0 #define LCDC_V4_DEBUG0 0x1d0
#define LCDC_V3_DEBUG0 0x1f0 #define LCDC_V3_DEBUG0 0x1f0
#define CTRL_SFTRST (1 << 31) #define CTRL_SFTRST BIT(31)
#define CTRL_CLKGATE (1 << 30) #define CTRL_CLKGATE BIT(30)
#define CTRL_BYPASS_COUNT (1 << 19) #define CTRL_BYPASS_COUNT BIT(19)
#define CTRL_VSYNC_MODE (1 << 18) #define CTRL_VSYNC_MODE BIT(18)
#define CTRL_DOTCLK_MODE (1 << 17) #define CTRL_DOTCLK_MODE BIT(17)
#define CTRL_DATA_SELECT (1 << 16) #define CTRL_DATA_SELECT BIT(16)
#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10) #define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3) #define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
#define CTRL_BUS_WIDTH_MASK (0x3 << 10) #define CTRL_BUS_WIDTH_MASK (0x3 << 10)
#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8) #define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3) #define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
#define CTRL_MASTER (1 << 5) #define CTRL_MASTER BIT(5)
#define CTRL_DF16 (1 << 3) #define CTRL_DF16 BIT(3)
#define CTRL_DF18 (1 << 2) #define CTRL_DF18 BIT(2)
#define CTRL_DF24 (1 << 1) #define CTRL_DF24 BIT(1)
#define CTRL_RUN (1 << 0) #define CTRL_RUN BIT(0)
#define CTRL1_FIFO_CLEAR (1 << 21) #define CTRL1_FIFO_CLEAR BIT(21)
#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) #define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) #define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13) #define CTRL1_CUR_FRAME_DONE_IRQ_EN BIT(13)
#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9) #define CTRL1_CUR_FRAME_DONE_IRQ BIT(9)
#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) #define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) #define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) #define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff) #define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
#define VDCTRL0_ENABLE_PRESENT (1 << 28) #define VDCTRL0_ENABLE_PRESENT BIT(28)
#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27) #define VDCTRL0_VSYNC_ACT_HIGH BIT(27)
#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26) #define VDCTRL0_HSYNC_ACT_HIGH BIT(26)
#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25) #define VDCTRL0_DOTCLK_ACT_FALLING BIT(25)
#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24) #define VDCTRL0_ENABLE_ACT_HIGH BIT(24)
#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21) #define VDCTRL0_VSYNC_PERIOD_UNIT BIT(21)
#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20) #define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT BIT(20)
#define VDCTRL0_HALF_LINE (1 << 19) #define VDCTRL0_HALF_LINE BIT(19)
#define VDCTRL0_HALF_LINE_MODE (1 << 18) #define VDCTRL0_HALF_LINE_MODE BIT(18)
#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff) #define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff) #define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29) #define VDCTRL3_MUX_SYNC_SIGNALS BIT(29)
#define VDCTRL3_VSYNC_ONLY (1 << 28) #define VDCTRL3_VSYNC_ONLY BIT(28)
#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16) #define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff) #define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff) #define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
...@@ -80,11 +80,11 @@ ...@@ -80,11 +80,11 @@
#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */ #define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */ #define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18) #define VDCTRL4_SYNC_SIGNALS_ON BIT(18)
#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff) #define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
#define DEBUG0_HSYNC (1 < 26) #define DEBUG0_HSYNC BIT(26)
#define DEBUG0_VSYNC (1 < 25) #define DEBUG0_VSYNC BIT(25)
#define MXSFB_MIN_XRES 120 #define MXSFB_MIN_XRES 120
#define MXSFB_MIN_YRES 120 #define MXSFB_MIN_YRES 120
......
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