Commit 8d1e3dca authored by Thomas Gleixner's avatar Thomas Gleixner

x86/vector: Add tracepoints for vector management

Add tracepoints for analysing the new vector management
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarJuergen Gross <jgross@suse.com>
Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
Acked-by: default avatarJuergen Gross <jgross@suse.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Rui Zhang <rui.zhang@intel.com>
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Len Brown <lenb@kernel.org>
Link: https://lkml.kernel.org/r/20170913213155.357986795@linutronix.de
parent 8ed4f3e6
...@@ -137,6 +137,250 @@ DEFINE_IRQ_VECTOR_EVENT(deferred_error_apic); ...@@ -137,6 +137,250 @@ DEFINE_IRQ_VECTOR_EVENT(deferred_error_apic);
DEFINE_IRQ_VECTOR_EVENT(thermal_apic); DEFINE_IRQ_VECTOR_EVENT(thermal_apic);
#endif #endif
TRACE_EVENT(vector_config,
TP_PROTO(unsigned int irq, unsigned int vector,
unsigned int cpu, unsigned int apicdest),
TP_ARGS(irq, vector, cpu, apicdest),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( unsigned int, vector )
__field( unsigned int, cpu )
__field( unsigned int, apicdest )
),
TP_fast_assign(
__entry->irq = irq;
__entry->vector = vector;
__entry->cpu = cpu;
__entry->apicdest = apicdest;
),
TP_printk("irq=%u vector=%u cpu=%u apicdest=0x%08x",
__entry->irq, __entry->vector, __entry->cpu,
__entry->apicdest)
);
DECLARE_EVENT_CLASS(vector_mod,
TP_PROTO(unsigned int irq, unsigned int vector,
unsigned int cpu, unsigned int prev_vector,
unsigned int prev_cpu),
TP_ARGS(irq, vector, cpu, prev_vector, prev_cpu),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( unsigned int, vector )
__field( unsigned int, cpu )
__field( unsigned int, prev_vector )
__field( unsigned int, prev_cpu )
),
TP_fast_assign(
__entry->irq = irq;
__entry->vector = vector;
__entry->cpu = cpu;
__entry->prev_vector = prev_vector;
__entry->prev_cpu = prev_cpu;
),
TP_printk("irq=%u vector=%u cpu=%u prev_vector=%u prev_cpu=%u",
__entry->irq, __entry->vector, __entry->cpu,
__entry->prev_vector, __entry->prev_cpu)
);
#define DEFINE_IRQ_VECTOR_MOD_EVENT(name) \
DEFINE_EVENT_FN(vector_mod, name, \
TP_PROTO(unsigned int irq, unsigned int vector, \
unsigned int cpu, unsigned int prev_vector, \
unsigned int prev_cpu), \
TP_ARGS(irq, vector, cpu, prev_vector, prev_cpu), NULL, NULL); \
DEFINE_IRQ_VECTOR_MOD_EVENT(vector_update);
DEFINE_IRQ_VECTOR_MOD_EVENT(vector_clear);
DECLARE_EVENT_CLASS(vector_reserve,
TP_PROTO(unsigned int irq, int ret),
TP_ARGS(irq, ret),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( int, ret )
),
TP_fast_assign(
__entry->irq = irq;
__entry->ret = ret;
),
TP_printk("irq=%u ret=%d", __entry->irq, __entry->ret)
);
#define DEFINE_IRQ_VECTOR_RESERVE_EVENT(name) \
DEFINE_EVENT_FN(vector_reserve, name, \
TP_PROTO(unsigned int irq, int ret), \
TP_ARGS(irq, ret), NULL, NULL); \
DEFINE_IRQ_VECTOR_RESERVE_EVENT(vector_reserve_managed);
DEFINE_IRQ_VECTOR_RESERVE_EVENT(vector_reserve);
TRACE_EVENT(vector_alloc,
TP_PROTO(unsigned int irq, unsigned int vector, bool reserved,
int ret),
TP_ARGS(irq, vector, ret, reserved),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( unsigned int, vector )
__field( bool, reserved )
__field( int, ret )
),
TP_fast_assign(
__entry->irq = irq;
__entry->vector = ret < 0 ? 0 : vector;
__entry->reserved = reserved;
__entry->ret = ret > 0 ? 0 : ret;
),
TP_printk("irq=%u vector=%u reserved=%d ret=%d",
__entry->irq, __entry->vector,
__entry->reserved, __entry->ret)
);
TRACE_EVENT(vector_alloc_managed,
TP_PROTO(unsigned int irq, unsigned int vector,
int ret),
TP_ARGS(irq, vector, ret),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( unsigned int, vector )
__field( int, ret )
),
TP_fast_assign(
__entry->irq = irq;
__entry->vector = ret < 0 ? 0 : vector;
__entry->ret = ret > 0 ? 0 : ret;
),
TP_printk("irq=%u vector=%u ret=%d",
__entry->irq, __entry->vector, __entry->ret)
);
DECLARE_EVENT_CLASS(vector_activate,
TP_PROTO(unsigned int irq, bool is_managed, bool can_reserve,
bool early),
TP_ARGS(irq, is_managed, can_reserve, early),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( bool, is_managed )
__field( bool, can_reserve )
__field( bool, early )
),
TP_fast_assign(
__entry->irq = irq;
__entry->is_managed = is_managed;
__entry->can_reserve = can_reserve;
__entry->early = early;
),
TP_printk("irq=%u is_managed=%d can_reserve=%d early=%d",
__entry->irq, __entry->is_managed, __entry->can_reserve,
__entry->early)
);
#define DEFINE_IRQ_VECTOR_ACTIVATE_EVENT(name) \
DEFINE_EVENT_FN(vector_activate, name, \
TP_PROTO(unsigned int irq, bool is_managed, \
bool can_reserve, bool early), \
TP_ARGS(irq, is_managed, can_reserve, early), NULL, NULL); \
DEFINE_IRQ_VECTOR_ACTIVATE_EVENT(vector_activate);
DEFINE_IRQ_VECTOR_ACTIVATE_EVENT(vector_deactivate);
TRACE_EVENT(vector_teardown,
TP_PROTO(unsigned int irq, bool is_managed, bool has_reserved),
TP_ARGS(irq, is_managed, has_reserved),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( bool, is_managed )
__field( bool, has_reserved )
),
TP_fast_assign(
__entry->irq = irq;
__entry->is_managed = is_managed;
__entry->has_reserved = has_reserved;
),
TP_printk("irq=%u is_managed=%d has_reserved=%d",
__entry->irq, __entry->is_managed, __entry->has_reserved)
);
TRACE_EVENT(vector_setup,
TP_PROTO(unsigned int irq, bool is_legacy, int ret),
TP_ARGS(irq, is_legacy, ret),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( bool, is_legacy )
__field( int, ret )
),
TP_fast_assign(
__entry->irq = irq;
__entry->is_legacy = is_legacy;
__entry->ret = ret;
),
TP_printk("irq=%u is_legacy=%d ret=%d",
__entry->irq, __entry->is_legacy, __entry->ret)
);
TRACE_EVENT(vector_free_moved,
TP_PROTO(unsigned int irq, unsigned int vector, bool is_managed),
TP_ARGS(irq, vector, is_managed),
TP_STRUCT__entry(
__field( unsigned int, irq )
__field( unsigned int, vector )
__field( bool, is_managed )
),
TP_fast_assign(
__entry->irq = irq;
__entry->vector = vector;
__entry->is_managed = is_managed;
),
TP_printk("irq=%u vector=%u is_managed=%d",
__entry->irq, __entry->vector, __entry->is_managed)
);
#endif /* CONFIG_X86_LOCAL_APIC */ #endif /* CONFIG_X86_LOCAL_APIC */
#undef TRACE_INCLUDE_PATH #undef TRACE_INCLUDE_PATH
......
...@@ -22,6 +22,8 @@ ...@@ -22,6 +22,8 @@
#include <asm/desc.h> #include <asm/desc.h>
#include <asm/irq_remapping.h> #include <asm/irq_remapping.h>
#include <asm/trace/irq_vectors.h>
struct apic_chip_data { struct apic_chip_data {
struct irq_cfg cfg; struct irq_cfg cfg;
unsigned int cpu; unsigned int cpu;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment