Commit 902233ee authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (30 commits)
  Blackfin SMC91X ethernet supporting driver: SMC91C111 LEDs are note drived in the kernel like in uboot
  Blackfin SPI driver: fix bug SPI DMA incomplete transmission
  Blackfin SPI driver: tweak spi cleanup function to match newer kernel changes
  Blackfin RTC drivers: update MAINTAINERS information
  Blackfin serial driver: decouple PARODD and CMSPAR checking from PARENB
  Blackfin serial driver: actually implement the break_ctl() function
  Blackfin serial driver: ignore framing and parity errors
  Blackfin serial driver: hook up our UARTs STP bit with userspaces CMSPAR
  Blackfin arch: move HI/LO macros into blackfin.h and punt the rest of macros.h as it includes VDSP macros we never use
  Blackfin arch: redo our linker script a bit
  Blackfin arch: make sure we initialize our L1 Data B section properly based on the linked kernel
  Blackfin arch: fix bug can not wakeup from sleep via push buttons
  Blackfin arch: add support for Alon Bar-Lev's dynamic kernel command-line
  Blackfin arch: add missing gpio.h header to fix compiling in some pm configurations
  Blackfin arch: As Mike pointed out range goes form m..MAX_BLACKFIN_GPIO -1
  Blackfin arch: fix spelling typo in output
  Blackfin arch: try to split up functions like this into smaller units according to LKML review
  Blackfin arch: add proper ENDPROC()
  Blackfin arch: move more of our startup code to .init so it can be freed once we are up and running
  Blackfin arch: unify differences between our diff head.S files -- no functional changes
  ...
parents e871e3c2 c5760abd
......@@ -731,12 +731,12 @@ P: Bryan Wu
M: bryan.wu@analog.com
P: Grace Pan
M: grace.pan@analog.com
P: Marc Hoffman
M: marc.hoffman@analog.com
P: Michael Hennerich
M: michael.hennerich@analog.com
P: Mike Frysinger
M: michael.frysinger@analog.com
P: Jane Lv
M: jane.lv@analog.com
P: Jerry Zeng
M: jerry.zeng@analog.com
P: Jie Zhang
......@@ -747,16 +747,26 @@ P: Roy Huang
M: roy.huang@analog.com
P: Sonic Zhang
M: sonic.zhang@analog.com
P: Vivi Li
M: vivi.li@analog.com
P: Yi Li
M: yi.li@analog.com
L: uclinux-dist-devel@blackfin.uclinux.org
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
W: http://blackfin.uclinux.org
S: Supported
BLACKFIN RTC DRIVER
P: Mike Frysinger
M: michael.frysinger@analog.com
M: vapier.adi@gmail.com
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
W: http://blackfin.uclinux.org
S: Supported
BLACKFIN SERIAL DRIVER
P: Aubrey Li
M: aubrey.li@analog.com
L: uclinux-dist-devel@blackfin.uclinux.org
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
W: http://blackfin.uclinux.org
S: Supported
......
......@@ -394,41 +394,6 @@ config BFIN_IDLE_LED_PIN
default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
comment "Console UART Setup"
choice
prompt "Baud Rate"
default BAUD_57600
config BAUD_9600
bool "9600"
config BAUD_19200
bool "19200"
config BAUD_38400
bool "38400"
config BAUD_57600
bool "57600"
config BAUD_115200
bool "115200"
endchoice
choice
prompt "Parity"
default BAUD_NO_PARITY
config BAUD_NO_PARITY
bool "No Parity"
config BAUD_PARITY
bool "Parity"
endchoice
choice
prompt "Stop Bits"
default BAUD_1_STOPBIT
config BAUD_1_STOPBIT
bool "1"
config BAUD_2_STOPBIT
bool "2"
endchoice
endmenu
......
This diff is collapsed.
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20.4
# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
......@@ -33,6 +34,7 @@ CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
......@@ -41,6 +43,7 @@ CONFIG_SYSVIPC=y
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
......@@ -55,9 +58,7 @@ CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
......@@ -127,6 +128,7 @@ CONFIG_BFIN533_STAMP=y
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC64M4A2FB_7E=y
......@@ -192,19 +194,6 @@ CONFIG_BFIN_ALIVE_LED_DPORT=0xFFC00730
CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700
CONFIG_BFIN_IDLE_LED_DPORT=0xFFC00730
#
# Console UART Setup
#
# CONFIG_BAUD_9600 is not set
# CONFIG_BAUD_19200 is not set
# CONFIG_BAUD_38400 is not set
CONFIG_BAUD_57600=y
# CONFIG_BAUD_115200 is not set
CONFIG_BAUD_NO_PARITY=y
# CONFIG_BAUD_PARITY is not set
CONFIG_BAUD_1_STOPBIT=y
# CONFIG_BAUD_2_STOPBIT is not set
#
# Blackfin Kernel Optimizations
#
......@@ -233,6 +222,7 @@ CONFIG_MEMSET_L1=y
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
......@@ -246,6 +236,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
......@@ -318,7 +309,7 @@ CONFIG_BINFMT_ZFLAT=y
# Power management options
#
CONFIG_PM=y
CONFIG_PM_LEGACY=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
......@@ -346,6 +337,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
......@@ -580,6 +572,7 @@ CONFIG_BFIN_FLASH_BANK_3=0x7BB0
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
......@@ -591,14 +584,12 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
......@@ -733,7 +724,7 @@ CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=39
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
# CONFIG_BF533_PFLAGS is not set
# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
......@@ -742,6 +733,8 @@ CONFIG_BFIN_SPORT=y
CONFIG_TWI_LCD=m
CONFIG_TWI_LCD_SLAVE_ADDR=34
# CONFIG_AD5304 is not set
# CONFIG_BF5xx_TEA5764 is not set
# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
......@@ -778,7 +771,14 @@ CONFIG_UNIX98_PTYS=y
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
CONFIG_BLACKFIN_DPMC=y
......@@ -840,12 +840,13 @@ CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
......@@ -861,6 +862,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
......@@ -899,6 +901,11 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
......@@ -912,15 +919,22 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
CONFIG_FB=m
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
CONFIG_FB_BFIN_7171=m
CONFIG_FB_BFIN_7393=m
CONFIG_NTSC=y
......@@ -938,7 +952,6 @@ CONFIG_ADV7393_1XMEM=y
# Logo configuration
#
# CONFIG_LOGO is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
......@@ -970,6 +983,18 @@ CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# ALSA Blackfin devices
#
# CONFIG_SND_BLACKFIN_AD1836 is not set
# CONFIG_SND_BLACKFIN_AD1981B is not set
# CONFIG_SND_BFIN_AD73311 is not set
#
# SoC audio support
#
# CONFIG_SND_SOC is not set
#
# Open Sound System
#
......@@ -979,6 +1004,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
......@@ -1051,7 +1077,6 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
......@@ -1073,6 +1098,10 @@ CONFIG_RTC_DRV_BFIN=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
......@@ -1085,13 +1114,9 @@ CONFIG_RTC_DRV_BFIN=y
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
......@@ -1103,7 +1128,7 @@ CONFIG_FS_MBCACHE=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
......@@ -1275,7 +1300,7 @@ CONFIG_ACCESS_CHECK=y
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_CAPABILITIES=y
CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
......@@ -1293,4 +1318,5 @@ CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20.4
# Linux kernel version: 2.6.21.3
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_BFIN=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
......@@ -33,6 +34,7 @@ CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
......@@ -41,6 +43,7 @@ CONFIG_SYSVIPC=y
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
......@@ -55,9 +58,7 @@ CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
# CONFIG_LIMIT_PAGECACHE is not set
CONFIG_BUDDY=y
# CONFIG_NP2 is not set
CONFIG_SLAB=y
......@@ -127,6 +128,7 @@ CONFIG_BFIN537_STAMP=y
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_BLUETECHNIX_CM is not set
# CONFIG_BFIN561_EZKIT is not set
# CONFIG_BFIN561_TEPLA is not set
# CONFIG_PNAV10 is not set
# CONFIG_GENERIC_BOARD is not set
CONFIG_MEM_MT48LC32M8A2_75=y
......@@ -195,19 +197,6 @@ CONFIG_MEM_SIZE=64
CONFIG_MEM_ADD_WIDTH=10
CONFIG_BOOT_LOAD=0x1000
#
# Console UART Setup
#
# CONFIG_BAUD_9600 is not set
# CONFIG_BAUD_19200 is not set
# CONFIG_BAUD_38400 is not set
CONFIG_BAUD_57600=y
# CONFIG_BAUD_115200 is not set
CONFIG_BAUD_NO_PARITY=y
# CONFIG_BAUD_PARITY is not set
CONFIG_BAUD_1_STOPBIT=y
# CONFIG_BAUD_2_STOPBIT is not set
#
# Blackfin Kernel Optimizations
#
......@@ -236,6 +225,7 @@ CONFIG_MEMSET_L1=y
CONFIG_MEMCPY_L1=y
CONFIG_SYS_BFIN_SPINLOCK_L1=y
# CONFIG_IP_CHECKSUM_L1 is not set
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_RAMKERNEL=y
......@@ -249,6 +239,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
......@@ -321,7 +312,7 @@ CONFIG_BINFMT_ZFLAT=y
# Power management options
#
CONFIG_PM=y
CONFIG_PM_LEGACY=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
......@@ -349,6 +340,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
......@@ -593,6 +585,7 @@ CONFIG_MTD_NAND_IDS=m
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
......@@ -604,14 +597,12 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
......@@ -751,7 +742,7 @@ CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=72
#
# CONFIG_AD9960 is not set
# CONFIG_SPI_ADC_BF533 is not set
# CONFIG_BF533_PFLAGS is not set
# CONFIG_BF5xx_PFLAGS is not set
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BF5xx_TIMERS is not set
# CONFIG_BF5xx_PPI is not set
......@@ -760,6 +751,8 @@ CONFIG_BFIN_SPORT=y
CONFIG_TWI_LCD=m
CONFIG_TWI_LCD_SLAVE_ADDR=34
# CONFIG_AD5304 is not set
# CONFIG_BF5xx_TEA5764 is not set
# CONFIG_BF5xx_FBDMA is not set
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
......@@ -804,7 +797,14 @@ CONFIG_CAN_BLACKFIN=m
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
CONFIG_BLACKFIN_DPMC=y
......@@ -868,12 +868,13 @@ CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
#
# Dallas's 1-wire bus
......@@ -889,6 +890,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
......@@ -927,6 +929,11 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
......@@ -940,15 +947,24 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=m
CONFIG_LCD_CLASS_DEVICE=m
CONFIG_FB=m
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
CONFIG_FB_BFIN_7171=m
CONFIG_FB_BFIN_7393=m
CONFIG_NTSC=y
......@@ -970,11 +986,6 @@ CONFIG_LQ035_SLAVE_ADDR=0x58
# Logo configuration
#
# CONFIG_LOGO is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=m
CONFIG_BACKLIGHT_DEVICE=y
CONFIG_LCD_CLASS_DEVICE=m
CONFIG_LCD_DEVICE=y
#
# Sound
......@@ -1006,6 +1017,18 @@ CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# ALSA Blackfin devices
#
# CONFIG_SND_BLACKFIN_AD1836 is not set
# CONFIG_SND_BLACKFIN_AD1981B is not set
# CONFIG_SND_BFIN_AD73311 is not set
#
# SoC audio support
#
# CONFIG_SND_SOC is not set
#
# Open Sound System
#
......@@ -1015,6 +1038,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
......@@ -1087,7 +1111,6 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
......@@ -1109,6 +1132,10 @@ CONFIG_RTC_DRV_BFIN=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
......@@ -1121,13 +1148,9 @@ CONFIG_RTC_DRV_BFIN=y
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
......@@ -1139,7 +1162,7 @@ CONFIG_FS_MBCACHE=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
......@@ -1311,7 +1334,7 @@ CONFIG_ACCESS_CHECK=y
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_CAPABILITIES=y
CONFIG_SECURITY_CAPABILITIES=m
#
# Cryptographic options
......@@ -1329,4 +1352,5 @@ CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
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......@@ -595,7 +595,7 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
}
EXPORT_SYMBOL(get_dma_curr_ycount);
void *_dma_memcpy(void *dest, const void *src, size_t size)
static void *__dma_memcpy(void *dest, const void *src, size_t size)
{
int direction; /* 1 - address decrease, 0 - address increase */
int flag_align; /* 1 - address aligned, 0 - address unaligned */
......@@ -744,8 +744,8 @@ void *dma_memcpy(void *dest, const void *src, size_t size)
bulk = (size >> 16) << 16;
rest = size - bulk;
if (bulk)
_dma_memcpy(dest, src, bulk);
addr = _dma_memcpy(dest+bulk, src+bulk, rest);
__dma_memcpy(dest, src, bulk);
addr = __dma_memcpy(dest+bulk, src+bulk, rest);
return addr;
}
......
......@@ -138,7 +138,7 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INT
inline int check_gpio(unsigned short gpio)
{
if (gpio > MAX_BLACKFIN_GPIOS)
if (gpio >= MAX_BLACKFIN_GPIOS)
return -EINVAL;
return 0;
}
......@@ -494,19 +494,24 @@ u32 gpio_pm_setup(void)
gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
gpio_bank_saved[bank].reserved = reserved_map[bank];
gpio = i;
while (mask) {
if (mask & 1) {
bfin_gpio_wakeup_type(gpio, wakeup_flags_map[gpio]);
reserved_map[gpio_bank(gpio)] |=
gpio_bit(gpio);
bfin_gpio_wakeup_type(gpio,
wakeup_flags_map[gpio]);
set_gpio_data(gpio, 0); /*Clear*/
}
gpio++;
mask >>= 1;
}
sic_iwr |= 1 << (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
sic_iwr |= 1 <<
(sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
}
}
......@@ -535,6 +540,9 @@ void gpio_pm_restore(void)
gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
reserved_map[bank] = gpio_bank_saved[bank].reserved;
}
gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
......
......@@ -58,10 +58,12 @@ ENTRY(_ret_from_fork)
RESTORE_ALL_SYS
p0 = reti;
jump (p0);
ENDPROC(_ret_from_fork)
ENTRY(_sys_fork)
r0 = -EINVAL;
rts;
ENDPROC(_sys_fork)
ENTRY(_sys_vfork)
r0 = sp;
......@@ -72,6 +74,7 @@ ENTRY(_sys_vfork)
SP += 12;
rets = [sp++];
rts;
ENDPROC(_sys_vfork)
ENTRY(_sys_clone)
r0 = sp;
......@@ -82,6 +85,7 @@ ENTRY(_sys_clone)
SP += 12;
rets = [sp++];
rts;
ENDPROC(_sys_clone)
ENTRY(_sys_rt_sigreturn)
r0 = sp;
......@@ -92,3 +96,4 @@ ENTRY(_sys_rt_sigreturn)
SP += 12;
rets = [sp++];
rts;
ENDPROC(_sys_rt_sigreturn)
......@@ -91,7 +91,7 @@ int show_interrupts(struct seq_file *p, void *v)
}
/*
* do_IRQ handles all hardware IRQ's. Decoded IRQs should not
* do_IRQ handles all hardware IRQs. Decoded IRQs should not
* come via this function. Instead, they should provide their
* own 'handler'
*/
......
......@@ -61,7 +61,7 @@ EXPORT_SYMBOL(memory_mtd_start);
EXPORT_SYMBOL(mtd_size);
#endif
char command_line[COMMAND_LINE_SIZE];
char __initdata command_line[COMMAND_LINE_SIZE];
#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
static void generate_cpl_tables(void);
......@@ -90,7 +90,7 @@ void __init bf53x_cache_init(void)
#endif
}
void bf53x_relocate_l1_mem(void)
void __init bf53x_relocate_l1_mem(void)
{
unsigned long l1_code_length;
unsigned long l1_data_a_length;
......@@ -205,7 +205,6 @@ void __init setup_arch(char **cmdline_p)
#endif
#if defined(CONFIG_CMDLINE_BOOL)
memset(command_line, 0, sizeof(command_line));
strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
command_line[sizeof(command_line) - 1] = 0;
#endif
......@@ -213,7 +212,7 @@ void __init setup_arch(char **cmdline_p)
/* Keep a copy of command line */
*cmdline_p = &command_line[0];
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
boot_command_line[COMMAND_LINE_SIZE - 1] = 0;
boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
/* setup memory defaults from the user config */
physical_mem_end = 0;
......@@ -411,7 +410,7 @@ static int __init topology_init(void)
subsys_initcall(topology_init);
#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
u16 lock_kernel_check(u32 start, u32 end)
static u16 __init lock_kernel_check(u32 start, u32 end)
{
if ((start <= (u32) _stext && end >= (u32) _end)
|| (start >= (u32) _stext && end <= (u32) _end))
......@@ -471,6 +470,67 @@ close_cplbtab(struct cplb_tab *table)
return 0;
}
/* helper function */
static void __fill_code_cplbtab(struct cplb_tab *t, int i,
u32 a_start, u32 a_end)
{
if (cplb_data[i].psize) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].i_conf);
} else {
#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
if (i == SDRAM_KERN) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
SIZE_4M,
cplb_data[i].i_conf);
} else {
#endif
fill_cplbtab(t,
cplb_data[i].start,
a_start,
SIZE_1M,
cplb_data[i].i_conf);
fill_cplbtab(t,
a_start,
a_end,
SIZE_4M,
cplb_data[i].i_conf);
fill_cplbtab(t, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].i_conf);
}
}
}
static void __fill_data_cplbtab(struct cplb_tab *t, int i,
u32 a_start, u32 a_end)
{
if (cplb_data[i].psize) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].d_conf);
} else {
fill_cplbtab(t,
cplb_data[i].start,
a_start, SIZE_1M,
cplb_data[i].d_conf);
fill_cplbtab(t, a_start,
a_end, SIZE_4M,
cplb_data[i].d_conf);
fill_cplbtab(t, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].d_conf);
}
}
static void __init generate_cpl_tables(void)
{
......@@ -540,26 +600,34 @@ static void __init generate_cpl_tables(void)
cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
for (i = ZERO_P; i <= L2_MEM; i++) {
if (cplb_data[i].valid) {
if (!cplb_data[i].valid)
continue;
as_1m = cplb_data[i].start % SIZE_1M;
/* We need to make sure all sections are properly 1M aligned
* However between Kernel Memory and the Kernel mtd section, depending on the
* rootfs size, there can be overlapping memory areas.
/*
* We need to make sure all sections are properly 1M aligned
* However between Kernel Memory and the Kernel mtd section,
* depending on the rootfs size, there can be overlapping
* memory areas.
*/
if (as_1m && i!=L1I_MEM && i!=L1D_MEM) {
if (as_1m && i != L1I_MEM && i != L1D_MEM) {
#ifdef CONFIG_MTD_UCLINUX
if (i == SDRAM_RAM_MTD) {
if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
if ((cplb_data[SDRAM_KERN].end + 1) >
cplb_data[SDRAM_RAM_MTD].start)
cplb_data[SDRAM_RAM_MTD].start =
(cplb_data[i].start &
(-2*SIZE_1M)) + SIZE_1M;
else
cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
cplb_data[SDRAM_RAM_MTD].start =
(cplb_data[i].start &
(-2*SIZE_1M));
} else
#endif
printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
printk(KERN_WARNING
"Unaligned Start of %s at 0x%X\n",
cplb_data[i].name, cplb_data[i].start);
}
......@@ -597,73 +665,13 @@ static void __init generate_cpl_tables(void)
break;
}
if (process) {
if (cplb_data[i].attr & I_CPLB) {
if (cplb_data[i].psize) {
fill_cplbtab(t_i,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].i_conf);
} else {
/*icplb_table */
#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
if (i == SDRAM_KERN) {
fill_cplbtab(t_i,
cplb_data[i].start,
cplb_data[i].end,
SIZE_4M,
cplb_data[i].i_conf);
} else
#endif
{
fill_cplbtab(t_i,
cplb_data[i].start,
a_start,
SIZE_1M,
cplb_data[i].i_conf);
fill_cplbtab(t_i,
a_start,
a_end,
SIZE_4M,
cplb_data[i].i_conf);
fill_cplbtab(t_i, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].i_conf);
}
}
}
if (cplb_data[i].attr & D_CPLB) {
if (cplb_data[i].psize) {
fill_cplbtab(t_d,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].d_conf);
} else {
/*dcplb_table*/
fill_cplbtab(t_d,
cplb_data[i].start,
a_start, SIZE_1M,
cplb_data[i].d_conf);
fill_cplbtab(t_d, a_start,
a_end, SIZE_4M,
cplb_data[i].d_conf);
fill_cplbtab(t_d, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].d_conf);
}
}
}
}
if (!process)
continue;
if (cplb_data[i].attr & I_CPLB)
__fill_code_cplbtab(t_i, i, a_start, a_end);
if (cplb_data[i].attr & D_CPLB)
__fill_data_cplbtab(t_d, i, a_start, a_end);
}
}
......@@ -681,7 +689,7 @@ static void __init generate_cpl_tables(void)
#endif
static inline u_long get_vco(void)
static u_long get_vco(void)
{
u_long msel;
u_long vco;
......@@ -889,8 +897,8 @@ struct seq_operations cpuinfo_op = {
.show = show_cpuinfo,
};
void cmdline_init(unsigned long r0)
void __init cmdline_init(const char *r0)
{
if (r0)
strncpy(command_line, (char *)r0, COMMAND_LINE_SIZE);
strncpy(command_line, r0, COMMAND_LINE_SIZE);
}
......@@ -557,7 +557,7 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr)
break;
#ifndef CONFIG_DEBUG_HWERR
/* If one of the last few instructions was a STI
* it is likily that the error occured awhile ago
* it is likely that the error occured awhile ago
* and we just noticed
*/
if (x >= 0x0040 && x <= 0x0047 && i <= 0)
......
......@@ -7,7 +7,7 @@
* Description: Master linker script for blackfin architecture
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
......@@ -32,97 +32,54 @@
#include <asm-generic/vmlinux.lds.h>
#include <asm/mem_map.h>
OUTPUT_FORMAT("elf32-bfin")
ENTRY(__start)
_jiffies = _jiffies_64;
MEMORY
{
ram : ORIGIN = CONFIG_BOOT_LOAD, LENGTH = (CONFIG_MEM_SIZE * 1024 * 1024) - (CONFIG_BOOT_LOAD)
l1_data_a : ORIGIN = L1_DATA_A_START, LENGTH = L1_DATA_A_LENGTH
l1_data_b : ORIGIN = L1_DATA_B_START, LENGTH = L1_DATA_B_LENGTH
l1_code : ORIGIN = L1_CODE_START, LENGTH = L1_CODE_LENGTH
l1_scratch : ORIGIN = L1_SCRATCH_START, LENGTH = L1_SCRATCH_LENGTH
}
SECTIONS
{
. = CONFIG_BOOT_LOAD;
.text :
{
__text = .;
_text = .;
__stext = .;
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
*(.text.lock)
*(.fixup)
. = ALIGN(16);
___start___ex_table = .;
*(__ex_table)
___stop___ex_table = .;
*($code)
*(.rodata)
*(.rodata.*)
*(__vermagic) /* Kernel version magic */
*(.rodata1)
*(.fixup)
*(.spinlock.text)
/* Kernel symbol table: Normal symbols */
. = ALIGN(4);
___start___ksymtab = .;
*(__ksymtab)
___stop___ksymtab = .;
/* Kernel symbol table: GPL-only symbols */
___start___ksymtab_gpl = .;
*(__ksymtab_gpl)
___stop___ksymtab_gpl = .;
/* Kernel symbol table: Normal unused symbols */ \
___start___ksymtab_unused = .;
*(__ksymtab_unused)
___stop___ksymtab_unused = .;
/* Kernel symbol table: GPL-only unused symbols */
___start___ksymtab_unused_gpl = .;
*(__ksymtab_unused_gpl)
___stop___ksymtab_unused_gpl = .;
/* Kernel symbol table: GPL-future symbols */
___start___ksymtab_gpl_future = .;
*(__ksymtab_gpl_future)
___stop___ksymtab_gpl_future = .;
/* Kernel symbol table: Normal symbols */
___start___kcrctab = .;
*(__kcrctab)
___stop___kcrctab = .;
__etext = .;
}
/* Kernel symbol table: GPL-only symbols */
___start___kcrctab_gpl = .;
*(__kcrctab_gpl)
___stop___kcrctab_gpl = .;
RODATA
/* Kernel symbol table: GPL-future symbols */
___start___kcrctab_gpl_future = .;
*(__kcrctab_gpl_future)
___stop___kcrctab_gpl_future = .;
.data :
{
__sdata = .;
. = ALIGN(0x2000);
*(.data.init_task)
DATA_DATA
CONSTRUCTORS
/* Kernel symbol table: strings */
*(__ksymtab_strings)
. = ALIGN(32);
*(.data.cacheline_aligned)
. = ALIGN(4);
__etext = .;
} > ram
. = ALIGN(0x2000);
__edata = .;
}
___init_begin = .;
.init :
{
. = ALIGN(4096);
___init_begin = .;
__sinittext = .;
*(.init.text)
__einittext = .;
......@@ -148,12 +105,11 @@ SECTIONS
*(.init.ramfs)
___initramfs_end = .;
. = ALIGN(4);
___init_end = .;
} > ram
}
__l1_lma_start = .;
.text_l1 :
.text_l1 L1_CODE_START : AT(LOADADDR(.init) + SIZEOF(.init))
{
. = ALIGN(4);
__stext_l1 = .;
......@@ -161,9 +117,9 @@ SECTIONS
. = ALIGN(4);
__etext_l1 = .;
} > l1_code AT > ram
}
.data_l1 :
.data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
{
. = ALIGN(4);
__sdata_l1 = .;
......@@ -179,8 +135,9 @@ SECTIONS
. = ALIGN(4);
__ebss_l1 = .;
} > l1_data_a AT > ram
.data_b_l1 :
}
.data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
{
. = ALIGN(4);
__sdata_b_l1 = .;
......@@ -193,29 +150,11 @@ SECTIONS
. = ALIGN(4);
__ebss_b_l1 = .;
} > l1_data_b AT > ram
.data :
{
__sdata = .;
. = ALIGN(0x2000);
*(.data.init_task)
DATA_DATA
. = ALIGN(32);
*(.data.cacheline_aligned)
}
. = ALIGN(0x2000);
__edata = .;
} > ram
___init_end = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
/DISCARD/ : { /* Exit code and data*/
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
} > ram
.bss :
.bss LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1) :
{
. = ALIGN(4);
___bss_start = .;
......@@ -223,6 +162,13 @@ SECTIONS
*(COMMON)
. = ALIGN(4);
___bss_stop = .;
__end = . ;
} > ram
__end = .;
}
/DISCARD/ :
{
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
}
}
......@@ -44,6 +44,7 @@
*/
.global ___divsi3;
.type ___divsi3, STT_FUNC;
#ifdef CONFIG_ARITHMETIC_OPS_L1
.section .l1.text
......@@ -214,3 +215,5 @@ ___divsi3 :
.Lret_zero:
R0 = 0;
RTS;
.size ___divsi3, .-___divsi3
......@@ -46,7 +46,7 @@ ENTRY(_insl)
.Llong_loop_e: NOP;
sti R3;
RTS;
ENDPROC(_insl)
ENTRY(_insw)
P0 = R0; /* P0 = port */
......@@ -61,6 +61,7 @@ ENTRY(_insw)
.Lword_loop_e: NOP;
sti R3;
RTS;
ENDPROC(_insw)
ENTRY(_insb)
P0 = R0; /* P0 = port */
......@@ -75,3 +76,4 @@ ENTRY(_insb)
.Lbyte_loop_e: NOP;
sti R3;
RTS;
ENDPROC(_insb)
......@@ -67,4 +67,4 @@ ENTRY(_memchr)
R0 += -1;
RTS;
.size _memchr,.-_memchr
ENDPROC(_memchr)
......@@ -107,4 +107,4 @@ ENTRY(_memcmp)
P3 = I1;
RTS;
.size _memcmp,.-_memcmp
ENDPROC(_memcmp)
......@@ -140,3 +140,5 @@ ENTRY(_memcpy)
B[P0--] = R1;
RTS;
ENDPROC(_memcpy)
......@@ -100,4 +100,4 @@ ENTRY(_memmove)
P3 = I1;
RTS;
.size _memmove,.-_memmove
ENDPROC(_memmove)
......@@ -106,4 +106,4 @@ ENTRY(_memset)
B[P0++] = R1;
JUMP .Laligned;
.size _memset,.-_memset
ENDPROC(_memset)
......@@ -77,3 +77,5 @@ ___modsi3:
R0 = 0;
.LRETURN_R0:
RTS;
.size ___modsi3, .-___modsi3
......@@ -40,6 +40,7 @@ ENTRY(_outsl)
.Llong_loop_s: R0 = [P1++];
.Llong_loop_e: [P0] = R0;
RTS;
ENDPROC(_outsl)
ENTRY(_outsw)
P0 = R0; /* P0 = port */
......@@ -50,6 +51,7 @@ ENTRY(_outsw)
.Lword_loop_s: R0 = W[P1++];
.Lword_loop_e: W[P0] = R0;
RTS;
ENDPROC(_outsw)
ENTRY(_outsb)
P0 = R0; /* P0 = port */
......@@ -60,3 +62,4 @@ ENTRY(_outsb)
.Lbyte_loop_s: R0 = B[P1++];
.Lbyte_loop_e: B[P0] = R0;
RTS;
ENDPROC(_outsb)
......@@ -28,3 +28,5 @@ ___smulsi3_highpart:
R0 = R0 + R1;
RTS;
.size ___smulsi3_highpart, .-___smulsi3_highpart
......@@ -296,3 +296,5 @@ ENTRY(___udivsi3)
R1 = R0 - R3;
IF CC R0 = R1;
RTS;
ENDPROC(___udivsi3)
......@@ -34,7 +34,9 @@
#endif
.extern ___udivsi3;
.type ___udivsi3, STT_FUNC;
.globl ___umodsi3
.type ___umodsi3, STT_FUNC;
___umodsi3:
CC=R0==0;
......@@ -64,3 +66,5 @@ ___umodsi3:
R0 = 0;
.LRETURN_R0:
RTS;
.size ___umodsi3, .-___umodsi3
......@@ -21,3 +21,5 @@ ___umulsi3_highpart:
R1 = PACK(R1.l,R0.h);
R0 = R1 + R2;
RTS;
.size ___umulsi3_highpart, .-___umulsi3_highpart
/*
* File: arch/blackfin/mach-bf533/boards/cm_bf533.c
* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
* Author: Aidan Williams <aidan@nicta.com.au> Copright 2005
* Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
*
* Created: 2005
* Description: Board description file
......
/*
* File: arch/blackfin/mach-bf533/ezkit.c
* Based on: Orginal Work
* Based on: Original Work
* Author: Aidan Williams <aidan@nicta.com.au>
*
* Created: 2005
......
......@@ -28,6 +28,7 @@
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
......@@ -45,19 +46,19 @@
#define INITIAL_STACK 0xFFB01000
.text
__INIT
ENTRY(__start)
ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
/* Set the SYSCFG register */
/* Set the SYSCFG register:
* Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
*/
R0 = 0x36;
/*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
SYSCFG = R0;
R0 = 0;
/*Clear Out All the data and pointer Registers*/
/* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
......@@ -79,7 +80,7 @@ ENTRY(__stext)
L2 = r0;
L3 = r0;
/* Clear Out All the DAG Registers*/
/* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
......@@ -265,6 +266,7 @@ ENTRY(__stext)
.LWAIT_HERE:
jump .LWAIT_HERE;
ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
......@@ -303,7 +305,7 @@ ENTRY(_real_start)
.L_clear_zero:
W[p1++] = r0;
/* pass the uboot arguments to the global value command line */
/* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
......@@ -333,9 +335,10 @@ ENTRY(_real_start)
sp = r1;
usp = sp;
fp = sp;
call _start_kernel;
.L_exit:
jump.s .L_exit;
jump.l _start_kernel;
ENDPROC(_real_start)
__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
......@@ -439,12 +442,13 @@ ENTRY(_start_dma_code)
p0.h = hi(SIC_IWR);
p0.l = lo(SIC_IWR);
r0.l = lo(IWR_ENABLE_ALL)
r0.h = hi(IWR_ENABLE_ALL)
r0.l = lo(IWR_ENABLE_ALL);
r0.h = hi(IWR_ENABLE_ALL);
[p0] = r0;
SSYNC;
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
......
......@@ -4,7 +4,7 @@
* Author: Michael Hennerich
*
* Created: ?
* Description: Set up the interupt priorities
* Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
......
......@@ -55,7 +55,7 @@ static struct resource bfin_pcmcia_cf_resources[] = {
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
.start = 0x20311000, /* Attribute Memeory */
.start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
......
......@@ -59,7 +59,7 @@ static struct resource bfin_pcmcia_cf_resources[] = {
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
.start = 0x20311000, /* Attribute Memeory */
.start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
......
......@@ -108,7 +108,7 @@ static struct resource bfin_pcmcia_cf_resources[] = {
.end = 0x20312000,
.flags = IORESOURCE_MEM,
},{
.start = 0x20311000, /* Attribute Memeory */
.start = 0x20311000, /* Attribute Memory */
.end = 0x20311FFF,
.flags = IORESOURCE_MEM,
},{
......
......@@ -28,6 +28,7 @@
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
......@@ -42,18 +43,19 @@
#define INITIAL_STACK 0xFFB01000
.text
__INIT
ENTRY(__start)
ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
/* Set the SYSCFG register */
/* Set the SYSCFG register:
* Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
*/
R0 = 0x36;
SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
SYSCFG = R0;
R0 = 0;
/* Clear Out All the data and pointer Registers*/
/* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
......@@ -75,7 +77,7 @@ ENTRY(__stext)
L2 = r0;
L3 = r0;
/* Clear Out All the DAG Registers*/
/* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
......@@ -191,7 +193,7 @@ ENTRY(__stext)
p0.h = hi(UART_DLL);
p0.l = lo(UART_DLL);
r0 = 0x00(Z);
r0 = 0x0(Z);
w[p0] = r0.L;
ssync;
......@@ -218,6 +220,7 @@ ENTRY(__stext)
#if CONFIG_BFIN_KERNEL_CLOCK
call _start_dma_code;
#endif
/* Code for initializing Async memory banks */
p2.h = hi(EBIU_AMBCTL1);
......@@ -272,6 +275,7 @@ ENTRY(__stext)
.LWAIT_HERE:
jump .LWAIT_HERE;
ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
......@@ -291,7 +295,7 @@ ENTRY(_real_start)
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
......@@ -306,7 +310,7 @@ ENTRY(_real_start)
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
......@@ -328,7 +332,6 @@ ENTRY(_real_start)
r1 = p3;
[p1] = r1;
/*
* load the current thread pointer and stack
*/
......@@ -341,9 +344,10 @@ ENTRY(_real_start)
sp = r1;
usp = sp;
fp = sp;
call _start_kernel;
.L_exit:
jump.s .L_exit;
jump.l _start_kernel;
ENDPROC(_real_start)
__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
......@@ -462,6 +466,7 @@ ENTRY(_start_dma_code)
SSYNC;
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
......
......@@ -4,7 +4,7 @@
* Author: Michael Hennerich
*
* Created:
* Description: Set up the interupt priorities
* Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
......
/*
* File: arch/blackfin/mach-bf533/boards/cm_bf561.c
* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
* Author: Aidan Williams <aidan@nicta.com.au> Copright 2005
* Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
*
* Created: 2006
* Description: Board description file
......@@ -43,7 +43,7 @@
char *bfin_board_name = "Bluetechnix CM BF561";
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI perpherals info goes here */
/* all SPI peripherals info goes here */
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
......
......@@ -28,6 +28,7 @@
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
#if CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach/mem_init.h>
......@@ -42,18 +43,19 @@
#define INITIAL_STACK 0xFFB01000
.text
__INIT
ENTRY(__start)
ENTRY(__stext)
/* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
/* Set the SYSCFG register */
/* Set the SYSCFG register:
* Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
*/
R0 = 0x36;
SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
SYSCFG = R0;
R0 = 0;
/*Clear Out All the data and pointer Registers*/
/* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
......@@ -75,7 +77,7 @@ ENTRY(__stext)
L2 = r0;
L3 = r0;
/* Clear Out All the DAG Registers*/
/* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
......@@ -219,6 +221,7 @@ ENTRY(__stext)
.LWAIT_HERE:
jump .LWAIT_HERE;
ENDPROC(__start)
ENTRY(_real_start)
[ -- sp ] = reti;
......@@ -238,7 +241,7 @@ ENTRY(_real_start)
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
......@@ -253,11 +256,11 @@ ENTRY(_real_start)
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
/* pass the uboot arguments to the global value command line */
/* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
......@@ -287,9 +290,10 @@ ENTRY(_real_start)
sp = r1;
usp = sp;
fp = sp;
call _start_kernel;
.L_exit:
jump.s .L_exit;
jump.l _start_kernel;
ENDPROC(_real_start)
__FINIT
.section .l1.text
#if CONFIG_BFIN_KERNEL_CLOCK
......@@ -391,6 +395,7 @@ ENTRY(_start_dma_code)
SSYNC;
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
ENTRY(_bfin_reset)
......
......@@ -4,7 +4,7 @@
* Author: Michael Hennerich
*
* Created:
* Description: Set up the interupt priorities
* Description: Set up the interrupt priorities
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
......
......@@ -70,6 +70,7 @@ ENTRY(_cache_invalidate)
.Lno_dcache_b:
R7 = [SP++];
RTS;
ENDPROC(_cache_invalidate)
/* Invalidate the Entire Instruction cache by
* disabling IMC bit
......@@ -106,6 +107,8 @@ ENTRY(_invalidate_entire_icache)
( R7:5) = [SP++];
RTS;
ENDPROC(_invalidate_entire_icache)
ENDPROC(_icache_invalidate)
/*
* blackfin_cache_flush_range(start, end)
......@@ -129,6 +132,7 @@ ENTRY(_blackfin_icache_flush_range)
IFLUSH [P0];
SSYNC;
RTS;
ENDPROC(_blackfin_icache_flush_range)
/*
* blackfin_icache_dcache_flush_range(start, end)
......@@ -155,6 +159,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
FLUSH [P0];
SSYNC;
RTS;
ENDPROC(_blackfin_icache_dcache_flush_range)
/* Throw away all D-cached data in specified region without any obligation to
* write them back. However, we must clean the D-cached entries around the
......@@ -183,6 +188,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
FLUSHINV[P0];
SSYNC;
RTS;
ENDPROC(_blackfin_dcache_invalidate_range)
/* Invalidate the Entire Data cache by
* clearing DMC[1:0] bits
......@@ -221,6 +227,8 @@ ENTRY(_dcache_invalidate)
( R7:6) = [SP++];
RTS;
ENDPROC(_dcache_invalidate)
ENDPROC(_invalidate_entire_dcache)
ENTRY(_blackfin_dcache_flush_range)
R2 = -L1_CACHE_BYTES;
......@@ -241,6 +249,7 @@ ENTRY(_blackfin_dcache_flush_range)
FLUSH[P0];
SSYNC;
RTS;
ENDPROC(_blackfin_dcache_flush_range)
ENTRY(_blackfin_dflush_page)
P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
......@@ -251,3 +260,4 @@ ENTRY(_blackfin_dflush_page)
.Lfl1: FLUSH [P0++];
SSYNC;
RTS;
ENDPROC(_blackfin_dflush_page)
......@@ -86,6 +86,8 @@ ENTRY(_bfin_icache_init)
SSYNC;
STI R2;
RTS;
ENDPROC(_bfin_icache_init)
#endif
#if defined(CONFIG_BLKFIN_DCACHE)
......@@ -134,4 +136,6 @@ ENTRY(_bfin_dcache_init)
SSYNC;
STI R2;
RTS;
ENDPROC(_bfin_dcache_init)
#endif
......@@ -42,8 +42,6 @@
.align 2
.global __cplb_hdr;
.type __cplb_hdr, STT_FUNC;
ENTRY(__cplb_hdr)
R2 = SEQSTAT;
......@@ -128,3 +126,5 @@ ENTRY(__cplb_hdr)
call _panic_cplb_error;
SP += 12;
JUMP _handle_bad_cplb;
ENDPROC(__cplb_hdr)
......@@ -82,7 +82,7 @@ static char *cplb_print_entry(char *buf, int type)
int entry = 0, used_cplb = 0;
if (type == CPLB_I) {
buf += sprintf(buf, "Instrction CPLB entry:\n");
buf += sprintf(buf, "Instruction CPLB entry:\n");
p_addr = ipdt_table;
p_data = ipdt_table + 1;
p_icount = ipdt_swapcount_table;
......
......@@ -592,6 +592,7 @@ ENTRY(_cplb_mgr)
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
ENDPROC(_cplb_mgr)
.data
.align 4;
......
......@@ -103,6 +103,7 @@ ENTRY(_ex_dcplb)
if !cc jump _return_from_exception;
/* fall through */
#endif
ENDPROC(_ex_dcplb)
ENTRY(_ex_icplb)
(R7:6,P5:4) = [sp++];
......@@ -113,6 +114,7 @@ ENTRY(_ex_icplb)
RESTORE_ALL_SYS
SP = RETN;
rtx;
ENDPROC(_ex_icplb)
ENTRY(_ex_spinlock)
/* Transform this into a syscall - twiddle the syscall vector. */
......@@ -123,6 +125,7 @@ ENTRY(_ex_spinlock)
[p5] = r7;
csync;
/* Fall through. */
ENDPROC(_ex_spinlock)
ENTRY(_ex_syscall)
DEBUG_START_HWTRACE
......@@ -131,6 +134,7 @@ ENTRY(_ex_syscall)
raise 15; /* invoked by TRAP #0, for sys call */
sp = retn;
rtx
ENDPROC(_ex_syscall)
ENTRY(_spinlock_bh)
SAVE_ALL_SYS
......@@ -150,12 +154,14 @@ ENTRY(_spinlock_bh)
[SP + PT_R0] = R0;
RESTORE_ALL_SYS
rti;
ENDPROC(_spinlock_bh)
ENTRY(_ex_soft_bp)
r7 = retx;
r7 += -2;
retx = r7;
jump.s _ex_trap_c;
ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
r7 = retx;
......@@ -191,6 +197,7 @@ _return_from_exception:
ASTAT = [sp++];
sp = retn;
rtx;
ENDPROC(_ex_soft_bp)
ENTRY(_handle_bad_cplb)
/* To get here, we just tried and failed to change a CPLB
......@@ -250,6 +257,7 @@ ENTRY(_ex_trap_c)
SP = RETN;
raise 5;
rtx;
ENDPROC(_ex_trap_c)
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
......@@ -314,6 +322,7 @@ ENTRY(_exception_to_level5)
call _ret_from_exception;
RESTORE_ALL_SYS
rti;
ENDPROC(_exception_to_level5)
ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
/* Since the kernel stack can be anywhere, it's not guaranteed to be
......@@ -342,6 +351,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
r7 = -ENOSYS; /* signextending enough */
[sp + PT_R0] = r7; /* return value from system call */
jump .Lsyscall_really_exit;
ENDPROC(_trap)
ENTRY(_kernel_execve)
link SIZEOF_PTREGS;
......@@ -396,6 +406,7 @@ ENTRY(_kernel_execve)
1:
unlink;
rts;
ENDPROC(_kernel_execve)
ENTRY(_system_call)
/* Store IPEND */
......@@ -503,6 +514,7 @@ ENTRY(_system_call)
r5 = [sp + PT_RESERVED];
rets = r5;
rts;
ENDPROC(_system_call)
_sys_trace:
call _syscall_trace;
......@@ -531,6 +543,7 @@ _sys_trace:
call _syscall_trace;
jump .Lresume_userspace;
ENDPROC(_sys_trace)
ENTRY(_resume)
/*
......@@ -580,6 +593,7 @@ _new_old_task:
* in "new" task.
*/
rts;
ENDPROC(_resume)
ENTRY(_ret_from_exception)
p2.l = lo(IPEND);
......@@ -638,6 +652,7 @@ ENTRY(_ret_from_exception)
syscfg = r0;
5:
rts;
ENDPROC(_ret_from_exception)
ENTRY(_return_from_int)
/* If someone else already raised IRQ 15, do nothing. */
......@@ -680,6 +695,7 @@ ENTRY(_return_from_int)
rti;
2:
rts;
ENDPROC(_return_from_int)
ENTRY(_lower_to_irq14)
#if defined(ANOMALY_05000281)
......@@ -745,6 +761,7 @@ _schedule_and_signal:
1:
RESTORE_CONTEXT
rti;
ENDPROC(_lower_to_irq14)
/* Make sure when we start, that the circular buffer is initialized properly
* R0 and P0 are call clobbered, so we can use them here.
......@@ -758,6 +775,7 @@ ENTRY(_init_exception_buff)
p0.l = _out_ptr_excause;
[p0] = r0;
rts;
ENDPROC(_init_exception_buff)
/*
* Put these in the kernel data section - that should always be covered by
......
......@@ -66,6 +66,7 @@ ENTRY(_evt_emulation)
SP += 12;
/* - GDB stub fills this in by itself (if defined) */
rte;
ENDPROC(_evt_emulation)
#endif
/* Common interrupt entry code. First we do CLI, then push
......@@ -251,3 +252,4 @@ ENTRY(_evt_system_call)
#endif
call _system_call;
jump .Lcommon_restore_context;
ENDPROC(_evt_system_call)
......@@ -4,7 +4,7 @@
* Author:
*
* Created: ?
* Description: Set up the interupt priorities
* Description: Set up the interrupt priorities
*
* Modified:
* 1996 Roman Zippel
......
......@@ -4,7 +4,7 @@
* Author:
*
* Created: ?
* Description: Set up the interupt priorities
* Description: Set up the interrupt priorities
*
* Modified:
* 1996 Roman Zippel
......
......@@ -155,6 +155,7 @@ ENTRY(_cache_grab_lock)
( R7:0,P5:0 ) = [SP++];
RTS;
ENDPROC(_cache_grab_lock)
/* After the execution of critical code, the code is now locked into
* the cache way. Now we need to set ILOC.
......@@ -186,6 +187,7 @@ ENTRY(_cache_lock)
( R7:0,P5:0 ) = [SP++];
RTS;
ENDPROC(_cache_lock)
#endif /* BLKFIN_CACHE_LOCK */
......@@ -193,7 +195,6 @@ ENTRY(_cache_lock)
*/
ENTRY(_read_iloc)
P1.H = (IMEM_CONTROL >> 16);
P1.L = (IMEM_CONTROL & 0xFFFF);
R1 = 0xF;
......@@ -202,3 +203,4 @@ ENTRY(_read_iloc)
R0 = R0 & R1;
RTS;
ENDPROC(_read_iloc)
......@@ -39,7 +39,7 @@
#include <asm/io.h>
#include <asm/dpmc.h>
#include <asm/irq.h>
#include <asm/gpio.h>
#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_H
#define WAKEUP_TYPE PM_WAKE_HIGH
......
......@@ -7,7 +7,7 @@
* Description: SRAM driver for Blackfin ADSP-BF5xx
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
......@@ -63,6 +63,7 @@ struct l1_sram_piece {
void *paddr;
int size;
int flag;
pid_t pid;
};
static struct l1_sram_piece l1_ssram[CONFIG_L1_MAX_PIECE];
......@@ -80,7 +81,7 @@ static struct l1_sram_piece l1_inst_sram[CONFIG_L1_MAX_PIECE];
#endif
/* L1 Scratchpad SRAM initialization function */
void l1sram_init(void)
void __init l1sram_init(void)
{
printk(KERN_INFO "Blackfin Scratchpad data SRAM: %d KB\n",
L1_SCRATCH_LENGTH >> 10);
......@@ -94,42 +95,43 @@ void l1sram_init(void)
spin_lock_init(&l1sram_lock);
}
void l1_data_sram_init(void)
void __init l1_data_sram_init(void)
{
#if L1_DATA_A_LENGTH != 0
printk(KERN_INFO "Blackfin DATA_A SRAM: %d KB\n",
L1_DATA_A_LENGTH >> 10);
memset(&l1_data_A_sram, 0x00, sizeof(l1_data_A_sram));
l1_data_A_sram[0].paddr = (void*)L1_DATA_A_START +
l1_data_A_sram[0].paddr = (void *)L1_DATA_A_START +
(_ebss_l1 - _sdata_l1);
l1_data_A_sram[0].size = L1_DATA_A_LENGTH - (_ebss_l1 - _sdata_l1);
l1_data_A_sram[0].flag = SRAM_SLT_FREE;
printk(KERN_INFO "Blackfin Data A SRAM: %d KB (%d KB free)\n",
L1_DATA_A_LENGTH >> 10, l1_data_A_sram[0].size >> 10);
#endif
#if L1_DATA_B_LENGTH != 0
printk(KERN_INFO "Blackfin DATA_B SRAM: %d KB\n",
L1_DATA_B_LENGTH >> 10);
memset(&l1_data_B_sram, 0x00, sizeof(l1_data_B_sram));
l1_data_B_sram[0].paddr = (void*)L1_DATA_B_START;
l1_data_B_sram[0].size = L1_DATA_B_LENGTH;
l1_data_B_sram[0].paddr = (void *)L1_DATA_B_START +
(_ebss_b_l1 - _sdata_b_l1);
l1_data_B_sram[0].size = L1_DATA_B_LENGTH - (_ebss_b_l1 - _sdata_b_l1);
l1_data_B_sram[0].flag = SRAM_SLT_FREE;
printk(KERN_INFO "Blackfin Data B SRAM: %d KB (%d KB free)\n",
L1_DATA_B_LENGTH >> 10, l1_data_B_sram[0].size >> 10);
#endif
/* mutex initialize */
spin_lock_init(&l1_data_sram_lock);
}
void l1_inst_sram_init(void)
void __init l1_inst_sram_init(void)
{
#if L1_CODE_LENGTH != 0
printk(KERN_INFO "Blackfin Instruction SRAM: %d KB\n",
L1_CODE_LENGTH >> 10);
memset(&l1_inst_sram, 0x00, sizeof(l1_inst_sram));
l1_inst_sram[0].paddr = (void*)L1_CODE_START + (_etext_l1 - _stext_l1);
l1_inst_sram[0].size = L1_CODE_LENGTH - (_etext_l1 - _stext_l1);
l1_inst_sram[0].flag = SRAM_SLT_FREE;
printk(KERN_INFO "Blackfin Instruction SRAM: %d KB (%d KB free)\n",
L1_CODE_LENGTH >> 10, l1_inst_sram[0].size >> 10);
#endif
/* mutex initialize */
......@@ -149,12 +151,13 @@ static void *_l1_sram_alloc(size_t size, struct l1_sram_piece *pfree, int count)
size = (size + 3) & ~3;
/* not use the good method to match the best slot !!! */
/* search an available memeory slot */
/* search an available memory slot */
for (i = 0; i < count; i++) {
if ((pfree[i].flag == SRAM_SLT_FREE)
&& (pfree[i].size >= size)) {
addr = pfree[i].paddr;
pfree[i].flag = SRAM_SLT_ALLOCATED;
pfree[i].pid = current->pid;
index = i;
break;
}
......@@ -162,10 +165,11 @@ static void *_l1_sram_alloc(size_t size, struct l1_sram_piece *pfree, int count)
if (i >= count)
return NULL;
/* updated the NULL memeory slot !!! */
/* updated the NULL memory slot !!! */
if (pfree[i].size > size) {
for (i = 0; i < count; i++) {
if (pfree[i].flag == SRAM_SLT_NULL) {
pfree[i].pid = 0;
pfree[i].flag = SRAM_SLT_FREE;
pfree[i].paddr = addr + size;
pfree[i].size = pfree[index].size - size;
......@@ -186,7 +190,7 @@ static void *_l1_sram_alloc_max(struct l1_sram_piece *pfree, int count,
int i, index = -1;
void *addr = NULL;
/* search an available memeory slot */
/* search an available memory slot */
for (i = 0; i < count; i++) {
if (pfree[i].flag == SRAM_SLT_FREE && pfree[i].size > best) {
addr = pfree[i].paddr;
......@@ -198,13 +202,15 @@ static void *_l1_sram_alloc_max(struct l1_sram_piece *pfree, int count,
return NULL;
*psize = best;
pfree[index].pid = current->pid;
pfree[index].flag = SRAM_SLT_ALLOCATED;
return addr;
}
/* L1 memory free function */
static int _l1_sram_free(const void *addr,
struct l1_sram_piece *pfree, int count)
struct l1_sram_piece *pfree,
int count)
{
int i, index = 0;
......@@ -222,12 +228,14 @@ static int _l1_sram_free(const void *addr,
if (i >= count)
return -1;
pfree[index].pid = 0;
pfree[index].flag = SRAM_SLT_FREE;
/* link the next address slot */
for (i = 0; i < count; i++) {
if (((pfree[index].paddr + pfree[index].size) == pfree[i].paddr)
&& (pfree[i].flag == SRAM_SLT_FREE)) {
pfree[i].pid = 0;
pfree[i].flag = SRAM_SLT_NULL;
pfree[index].size += pfree[i].size;
pfree[index].flag = SRAM_SLT_FREE;
......@@ -538,3 +546,64 @@ void *sram_alloc_with_lsl(size_t size, unsigned long flags)
return addr;
}
EXPORT_SYMBOL(sram_alloc_with_lsl);
#ifdef CONFIG_PROC_FS
/* Once we get a real allocator, we'll throw all of this away.
* Until then, we need some sort of visibility into the L1 alloc.
*/
static void _l1sram_proc_read(char *buf, int *len, const char *desc,
struct l1_sram_piece *pfree, const int array_size)
{
int i;
*len += sprintf(&buf[*len], "--- L1 %-14s Size PID State\n", desc);
for (i = 0; i < array_size; ++i) {
const char *alloc_type;
switch (pfree[i].flag) {
case SRAM_SLT_NULL: alloc_type = "NULL"; break;
case SRAM_SLT_FREE: alloc_type = "FREE"; break;
case SRAM_SLT_ALLOCATED: alloc_type = "ALLOCATED"; break;
default: alloc_type = "????"; break;
}
*len += sprintf(&buf[*len], "%p-%p %8i %4i %s\n",
pfree[i].paddr, pfree[i].paddr + pfree[i].size,
pfree[i].size, pfree[i].pid, alloc_type);
}
}
static int l1sram_proc_read(char *buf, char **start, off_t offset, int count,
int *eof, void *data)
{
int len = 0;
_l1sram_proc_read(buf, &len, "Scratchpad",
l1_ssram, ARRAY_SIZE(l1_ssram));
#if L1_DATA_A_LENGTH != 0
_l1sram_proc_read(buf, &len, "Data A",
l1_data_A_sram, ARRAY_SIZE(l1_data_A_sram));
#endif
#if L1_DATA_B_LENGTH != 0
_l1sram_proc_read(buf, &len, "Data B",
l1_data_B_sram, ARRAY_SIZE(l1_data_B_sram));
#endif
#if L1_CODE_LENGTH != 0
_l1sram_proc_read(buf, &len, "Instruction",
l1_inst_sram, ARRAY_SIZE(l1_inst_sram));
#endif
return len;
}
static int __init l1sram_proc_init(void)
{
struct proc_dir_entry *ptr;
ptr = create_proc_entry("sram", S_IFREG | S_IRUGO, NULL);
if (!ptr) {
printk(KERN_WARNING "unable to create /proc/sram\n");
return -1;
}
ptr->owner = THIS_MODULE;
ptr->read_proc = l1sram_proc_read;
return 0;
}
late_initcall(l1sram_proc_init);
#endif
......@@ -7,7 +7,7 @@
* Description:
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
......@@ -53,7 +53,7 @@ static unsigned long empty_bad_page;
unsigned long empty_zero_page;
void show_mem(void)
void __init show_mem(void)
{
unsigned long i;
int free = 0, total = 0, reserved = 0, shared = 0;
......@@ -86,7 +86,7 @@ void show_mem(void)
* The parameters are pointers to where to stick the starting and ending
* addresses of available kernel virtual memory.
*/
void paging_init(void)
void __init paging_init(void)
{
/*
* make sure start_mem is page aligned, otherwise bootmem and
......@@ -125,7 +125,7 @@ void paging_init(void)
}
}
void mem_init(void)
void __init mem_init(void)
{
unsigned int codek = 0, datak = 0, initk = 0;
unsigned long tmp;
......@@ -169,7 +169,7 @@ void mem_init(void)
}
#ifdef CONFIG_BLK_DEV_INITRD
void free_initrd_mem(unsigned long start, unsigned long end)
void __init free_initrd_mem(unsigned long start, unsigned long end)
{
int pages = 0;
for (; start < end; start += PAGE_SIZE) {
......@@ -183,11 +183,11 @@ void free_initrd_mem(unsigned long start, unsigned long end)
}
#endif
void free_initmem(void)
void __init free_initmem(void)
{
#ifdef CONFIG_RAMKERNEL
unsigned long addr;
/*
/*
* the following code should be cool even if these sections
* are not page aligned.
*/
......
......@@ -58,6 +58,8 @@
#elif defined(CONFIG_BFIN)
#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
#define RPC_LSA_DEFAULT RPC_LED_100_10
#define RPC_LSB_DEFAULT RPC_LED_TX_RX
# if defined (CONFIG_BFIN561_EZKIT)
#define SMC_CAN_USE_8BIT 0
......
......@@ -185,6 +185,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
uart->port.icount.brk++;
if (uart_handle_break(&uart->port))
goto ignore_char;
status &= ~(PE | FE);
}
if (status & PE)
uart->port.icount.parity++;
......@@ -341,6 +342,7 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
uart->port.icount.brk++;
if (uart_handle_break(&uart->port))
goto dma_ignore_char;
status &= ~(PE | FE);
}
if (status & PE)
uart->port.icount.parity++;
......@@ -517,6 +519,14 @@ static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
*/
static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
u16 lcr = UART_GET_LCR(uart);
if (break_state)
lcr |= SB;
else
lcr &= ~SB;
UART_PUT_LCR(uart, lcr);
SSYNC();
}
static int bfin_serial_startup(struct uart_port *port)
......@@ -625,11 +635,12 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
if (termios->c_cflag & CSTOPB)
lcr |= STB;
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARENB)
lcr |= PEN;
if (!(termios->c_cflag & PARODD))
lcr |= EPS;
}
if (termios->c_cflag & CMSPAR)
lcr |= STP;
port->read_status_mask = OE;
if (termios->c_iflag & INPCK)
......
......@@ -582,14 +582,19 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
clear_dma_irqstat(CH_SPI);
/* Wait for DMA to complete */
while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN)
continue;
/*
* wait for the last transaction shifted out. yes, these two
* while loops are supposed to be the same (see the HRM).
* wait for the last transaction shifted out. HRM states:
* at this point there may still be data in the SPI DMA FIFO waiting
* to be transmitted ... software needs to poll TXS in the SPI_STAT
* register until it goes low for 2 successive reads
*/
if (drv_data->tx != NULL) {
while (bfin_read_SPI_STAT() & TXS)
continue;
while (bfin_read_SPI_STAT() & TXS)
while ((bfin_read_SPI_STAT() & TXS) ||
(bfin_read_SPI_STAT() & TXS))
continue;
}
......@@ -1082,7 +1087,7 @@ static int setup(struct spi_device *spi)
*/
static void cleanup(struct spi_device *spi)
{
struct chip_data *chip = spi_get_ctldata((struct spi_device *)spi);
struct chip_data *chip = spi_get_ctldata(spi);
kfree(chip);
}
......
......@@ -6,7 +6,11 @@
#ifndef _BLACKFIN_H_
#define _BLACKFIN_H_
#include <asm/macros.h>
#define LO(con32) ((con32) & 0xFFFF)
#define lo(con32) ((con32) & 0xFFFF)
#define HI(con32) (((con32) >> 16) & 0xFFFF)
#define hi(con32) (((con32) >> 16) & 0xFFFF)
#include <asm/mach/blackfin.h>
#include <asm/bfin-global.h>
......
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