Commit 920f8a39 authored by Max Filippov's avatar Max Filippov

xtensa: sort 'select' statements in Kconfig

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 8a9de059
...@@ -4,24 +4,24 @@ config ZONE_DMA ...@@ -4,24 +4,24 @@ config ZONE_DMA
config XTENSA config XTENSA
def_bool y def_bool y
select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_FRAME_POINTERS
select HAVE_IDE
select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
select VIRT_TO_BUS
select GENERIC_IRQ_SHOW
select GENERIC_SCHED_CLOCK
select MODULES_USE_ELF_RELA
select GENERIC_PCI_IOMAP
select ARCH_WANT_IPC_PARSE_VERSION select ARCH_WANT_IPC_PARSE_VERSION
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select BUILDTIME_EXTABLE_SORT select BUILDTIME_EXTABLE_SORT
select CLONE_BACKWARDS select CLONE_BACKWARDS
select IRQ_DOMAIN select COMMON_CLK
select HAVE_OPROFILE select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP
select GENERIC_SCHED_CLOCK
select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACER
select HAVE_IDE
select HAVE_IRQ_TIME_ACCOUNTING select HAVE_IRQ_TIME_ACCOUNTING
select HAVE_OPROFILE
select HAVE_PERF_EVENTS select HAVE_PERF_EVENTS
select COMMON_CLK select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select VIRT_TO_BUS
help help
Xtensa processors are 32-bit RISC machines designed by Tensilica Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both primarily for embedded systems. These processors are both
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