Commit 935477ed authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k_hw: make support for PC-OEM cards optional

The initvals use up quite a bit of space, and PC-OEM support is
typically not needed on embedded systems
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 6424b036
...@@ -148,6 +148,11 @@ config ATH9K_CHANNEL_CONTEXT ...@@ -148,6 +148,11 @@ config ATH9K_CHANNEL_CONTEXT
for multi-channel concurrency. Enable this if P2P PowerSave support for multi-channel concurrency. Enable this if P2P PowerSave support
is required. is required.
config ATH9K_PCOEM
bool "Atheros ath9k support for PC OEM cards" if EXPERT
depends on ATH9K
default y
config ATH9K_HTC config ATH9K_HTC
tristate "Atheros HTC based wireless cards support" tristate "Atheros HTC based wireless cards support"
depends on USB && MAC80211 depends on USB && MAC80211
......
...@@ -32,7 +32,6 @@ ath9k_hw-y:= \ ...@@ -32,7 +32,6 @@ ath9k_hw-y:= \
ar5008_phy.o \ ar5008_phy.o \
ar9002_calib.o \ ar9002_calib.o \
ar9003_calib.o \ ar9003_calib.o \
ar9003_rtt.o \
calib.o \ calib.o \
eeprom.o \ eeprom.o \
eeprom_def.o \ eeprom_def.o \
...@@ -50,6 +49,8 @@ ath9k_hw-$(CONFIG_ATH9K_WOW) += ar9003_wow.o ...@@ -50,6 +49,8 @@ ath9k_hw-$(CONFIG_ATH9K_WOW) += ar9003_wow.o
ath9k_hw-$(CONFIG_ATH9K_BTCOEX_SUPPORT) += btcoex.o \ ath9k_hw-$(CONFIG_ATH9K_BTCOEX_SUPPORT) += btcoex.o \
ar9003_mci.o ar9003_mci.o
ath9k_hw-$(CONFIG_ATH9K_PCOEM) += ar9003_rtt.o
ath9k_hw-$(CONFIG_ATH9K_DYNACK) += dynack.o ath9k_hw-$(CONFIG_ATH9K_DYNACK) += dynack.o
obj-$(CONFIG_ATH9K_HW) += ath9k_hw.o obj-$(CONFIG_ATH9K_HW) += ath9k_hw.o
......
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#ifndef AR9003_RTT_H #ifndef AR9003_RTT_H
#define AR9003_RTT_H #define AR9003_RTT_H
#ifdef CONFIG_ATH9K_PCOEM
void ar9003_hw_rtt_enable(struct ath_hw *ah); void ar9003_hw_rtt_enable(struct ath_hw *ah);
void ar9003_hw_rtt_disable(struct ath_hw *ah); void ar9003_hw_rtt_disable(struct ath_hw *ah);
void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask); void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
...@@ -25,5 +26,40 @@ void ar9003_hw_rtt_load_hist(struct ath_hw *ah); ...@@ -25,5 +26,40 @@ void ar9003_hw_rtt_load_hist(struct ath_hw *ah);
void ar9003_hw_rtt_fill_hist(struct ath_hw *ah); void ar9003_hw_rtt_fill_hist(struct ath_hw *ah);
void ar9003_hw_rtt_clear_hist(struct ath_hw *ah); void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan); bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan);
#else
static inline void ar9003_hw_rtt_enable(struct ath_hw *ah)
{
}
static inline void ar9003_hw_rtt_disable(struct ath_hw *ah)
{
}
static inline void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask)
{
}
static inline bool ar9003_hw_rtt_force_restore(struct ath_hw *ah)
{
return false;
}
static inline void ar9003_hw_rtt_load_hist(struct ath_hw *ah)
{
}
static inline void ar9003_hw_rtt_fill_hist(struct ath_hw *ah)
{
}
static inline void ar9003_hw_rtt_clear_hist(struct ath_hw *ah)
{
}
static inline bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)
{
return false;
}
#endif
#endif #endif
...@@ -244,13 +244,20 @@ enum ath9k_hw_caps { ...@@ -244,13 +244,20 @@ enum ath9k_hw_caps {
ATH9K_HW_CAP_2GHZ = BIT(11), ATH9K_HW_CAP_2GHZ = BIT(11),
ATH9K_HW_CAP_5GHZ = BIT(12), ATH9K_HW_CAP_5GHZ = BIT(12),
ATH9K_HW_CAP_APM = BIT(13), ATH9K_HW_CAP_APM = BIT(13),
#ifdef CONFIG_ATH9K_PCOEM
ATH9K_HW_CAP_RTT = BIT(14), ATH9K_HW_CAP_RTT = BIT(14),
ATH9K_HW_CAP_MCI = BIT(15), ATH9K_HW_CAP_MCI = BIT(15),
ATH9K_HW_CAP_DFS = BIT(16), ATH9K_HW_WOW_DEVICE_CAPABLE = BIT(16),
ATH9K_HW_WOW_DEVICE_CAPABLE = BIT(17), ATH9K_HW_CAP_BT_ANT_DIV = BIT(17),
ATH9K_HW_CAP_PAPRD = BIT(18), #else
ATH9K_HW_CAP_FCC_BAND_SWITCH = BIT(19), ATH9K_HW_CAP_RTT = 0,
ATH9K_HW_CAP_BT_ANT_DIV = BIT(20), ATH9K_HW_CAP_MCI = 0,
ATH9K_HW_WOW_DEVICE_CAPABLE = 0,
ATH9K_HW_CAP_BT_ANT_DIV = 0,
#endif
ATH9K_HW_CAP_DFS = BIT(18),
ATH9K_HW_CAP_PAPRD = BIT(19),
ATH9K_HW_CAP_FCC_BAND_SWITCH = BIT(20),
}; };
/* /*
......
...@@ -362,6 +362,9 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc) ...@@ -362,6 +362,9 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
struct ath9k_hw_capabilities *pCap = &ah->caps; struct ath9k_hw_capabilities *pCap = &ah->caps;
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
if (!IS_ENABLED(CONFIG_ATH9K_PCOEM))
return;
if (common->bus_ops->ath_bus_type != ATH_PCI) if (common->bus_ops->ath_bus_type != ATH_PCI)
return; return;
......
...@@ -30,6 +30,7 @@ static const struct pci_device_id ath_pci_id_table[] = { ...@@ -30,6 +30,7 @@ static const struct pci_device_id ath_pci_id_table[] = {
{ PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */ { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
{ PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */ { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
#ifdef CONFIG_ATH9K_PCOEM
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS, { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x002A, 0x002A,
PCI_VENDOR_ID_AZWAVE, PCI_VENDOR_ID_AZWAVE,
...@@ -82,6 +83,7 @@ static const struct pci_device_id ath_pci_id_table[] = { ...@@ -82,6 +83,7 @@ static const struct pci_device_id ath_pci_id_table[] = {
PCI_VENDOR_ID_AZWAVE, PCI_VENDOR_ID_AZWAVE,
0x2C37), 0x2C37),
.driver_data = ATH9K_PCI_BT_ANT_DIV }, .driver_data = ATH9K_PCI_BT_ANT_DIV },
#endif
{ PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */ { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
{ PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */ { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
...@@ -102,6 +104,7 @@ static const struct pci_device_id ath_pci_id_table[] = { ...@@ -102,6 +104,7 @@ static const struct pci_device_id ath_pci_id_table[] = {
{ PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
#ifdef CONFIG_ATH9K_PCOEM
/* PCI-E CUS198 */ /* PCI-E CUS198 */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS, { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0032, 0x0032,
...@@ -294,10 +297,12 @@ static const struct pci_device_id ath_pci_id_table[] = { ...@@ -294,10 +297,12 @@ static const struct pci_device_id ath_pci_id_table[] = {
PCI_VENDOR_ID_ASUSTEK, PCI_VENDOR_ID_ASUSTEK,
0x850D), 0x850D),
.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE }, .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
#endif
{ PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
{ PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */ { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
#ifdef CONFIG_ATH9K_PCOEM
/* PCI-E CUS217 */ /* PCI-E CUS217 */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS, { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0034, 0x0034,
...@@ -657,6 +662,7 @@ static const struct pci_device_id ath_pci_id_table[] = { ...@@ -657,6 +662,7 @@ static const struct pci_device_id ath_pci_id_table[] = {
/* PCI-E AR9565 (WB335) */ /* PCI-E AR9565 (WB335) */
{ PCI_VDEVICE(ATHEROS, 0x0036), { PCI_VDEVICE(ATHEROS, 0x0036),
.driver_data = ATH9K_PCI_BT_ANT_DIV }, .driver_data = ATH9K_PCI_BT_ANT_DIV },
#endif
{ 0 } { 0 }
}; };
......
...@@ -892,10 +892,21 @@ ...@@ -892,10 +892,21 @@
(AR_SREV_9330((_ah)) && \ (AR_SREV_9330((_ah)) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_12)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_12))
#ifdef CONFIG_ATH9K_PCOEM
#define AR_SREV_9462(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462))
#define AR_SREV_9485(_ah) \ #define AR_SREV_9485(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485)) (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485))
#define AR_SREV_9565(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
#else
#define AR_SREV_9462(_ah) 0
#define AR_SREV_9485(_ah) 0
#define AR_SREV_9565(_ah) 0
#endif
#define AR_SREV_9485_11_OR_LATER(_ah) \ #define AR_SREV_9485_11_OR_LATER(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485) && \ (AR_SREV_9485(_ah) && \
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9485_11)) ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9485_11))
#define AR_SREV_9485_OR_LATER(_ah) \ #define AR_SREV_9485_OR_LATER(_ah) \
(((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9485)) (((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9485))
...@@ -915,34 +926,30 @@ ...@@ -915,34 +926,30 @@
(AR_SREV_9285_12_OR_LATER(_ah) && \ (AR_SREV_9285_12_OR_LATER(_ah) && \
((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
#define AR_SREV_9462(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462))
#define AR_SREV_9462_20(_ah) \ #define AR_SREV_9462_20(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \ (AR_SREV_9462(_ah) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_20)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_20))
#define AR_SREV_9462_21(_ah) \ #define AR_SREV_9462_21(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \ (AR_SREV_9462(_ah) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_21)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_21))
#define AR_SREV_9462_20_OR_LATER(_ah) \ #define AR_SREV_9462_20_OR_LATER(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \ (AR_SREV_9462(_ah) && \
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_20)) ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_20))
#define AR_SREV_9462_21_OR_LATER(_ah) \ #define AR_SREV_9462_21_OR_LATER(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \ (AR_SREV_9462(_ah) && \
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_21)) ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_21))
#define AR_SREV_9565(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
#define AR_SREV_9565_10(_ah) \ #define AR_SREV_9565_10(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \ (AR_SREV_9565(_ah) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10))
#define AR_SREV_9565_101(_ah) \ #define AR_SREV_9565_101(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \ (AR_SREV_9565(_ah) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101))
#define AR_SREV_9565_11(_ah) \ #define AR_SREV_9565_11(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \ (AR_SREV_9565(_ah) && \
((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11)) ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11))
#define AR_SREV_9565_11_OR_LATER(_ah) \ #define AR_SREV_9565_11_OR_LATER(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \ (AR_SREV_9565(_ah) && \
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11)) ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11))
#define AR_SREV_9550(_ah) \ #define AR_SREV_9550(_ah) \
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment