Commit 94bbdb63 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here are the first arm-soc bug fixes.  Most of these are OMAP related
  fixes for regressions or minor bugs.  Aside from that, there are a few
  defconfig changes for various platforms"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  iommu/exynos: Fix arm64 allmodconfig build
  ARM: defconfigs: use CONFIG_CPUFREQ_DT
  ARM: omap2plus_defconfig: Enable AHCI_PLATFORM driver
  ARM: dts: am437x-sk-evm.dts: fix LCD timings
  ARM: dts: dra7-evm: Update SMPS7 (VDD_CORE) max voltage to match DM
  ARM: dts: dra7-evm: Fix typo in SMPS6 (VDD_GPU) max voltage
  ARM: OMAP2+: AM43x: Add ID for ES1.2
  ARM: dts: am437x-sk: fix lcd enable pin mux data
  ARM: dts: Fix gpmc regression for omap 2430sdp smc91x
  Revert "ARM: shmobile: multiplatform: add Audo DMAC peri peri support on defconfig"
  ARM: dts: dra7: fix DSS PLL clock mux registers
  ARM: dts: DRA7: wdt: Fix compatible property for watchdog node
  ARM: OMAP2+: clock: remove unused function prototype
parents 36c0a48f 5f1b2953
...@@ -100,7 +100,7 @@ led@3 { ...@@ -100,7 +100,7 @@ led@3 {
}; };
lcd0: display { lcd0: display {
compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
label = "lcd"; label = "lcd";
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -112,11 +112,11 @@ panel-timing { ...@@ -112,11 +112,11 @@ panel-timing {
clock-frequency = <9000000>; clock-frequency = <9000000>;
hactive = <480>; hactive = <480>;
vactive = <272>; vactive = <272>;
hfront-porch = <8>; hfront-porch = <2>;
hback-porch = <43>; hback-porch = <2>;
hsync-len = <4>; hsync-len = <41>;
vback-porch = <12>; vfront-porch = <2>;
vfront-porch = <4>; vback-porch = <2>;
vsync-len = <10>; vsync-len = <10>;
hsync-active = <0>; hsync-active = <0>;
vsync-active = <0>; vsync-active = <0>;
...@@ -320,8 +320,7 @@ mcasp1_pins: mcasp1_pins { ...@@ -320,8 +320,7 @@ mcasp1_pins: mcasp1_pins {
lcd_pins: lcd_pins { lcd_pins: lcd_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
/* GPIO 5_8 to select LCD / HDMI */ 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
>; >;
}; };
}; };
......
...@@ -304,7 +304,7 @@ smps6_reg: smps6 { ...@@ -304,7 +304,7 @@ smps6_reg: smps6 {
/* VDD_GPU - over VDD_SMPS6 */ /* VDD_GPU - over VDD_SMPS6 */
regulator-name = "smps6"; regulator-name = "smps6";
regulator-min-microvolt = <850000>; regulator-min-microvolt = <850000>;
regulator-max-microvolt = <12500000>; regulator-max-microvolt = <1250000>;
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
...@@ -313,7 +313,7 @@ smps7_reg: smps7 { ...@@ -313,7 +313,7 @@ smps7_reg: smps7 {
/* CORE_VDD */ /* CORE_VDD */
regulator-name = "smps7"; regulator-name = "smps7";
regulator-min-microvolt = <850000>; regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>; regulator-max-microvolt = <1060000>;
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
......
...@@ -742,7 +742,7 @@ timer16: timer@4882e000 { ...@@ -742,7 +742,7 @@ timer16: timer@4882e000 {
}; };
wdt2: wdt@4ae14000 { wdt2: wdt@4ae14000 {
compatible = "ti,omap4-wdt"; compatible = "ti,omap3-wdt";
reg = <0x4ae14000 0x80>; reg = <0x4ae14000 0x80>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "wd_timer2"; ti,hwmods = "wd_timer2";
......
...@@ -160,7 +160,7 @@ smps2_reg: smps2 { ...@@ -160,7 +160,7 @@ smps2_reg: smps2 {
/* VDD_CORE */ /* VDD_CORE */
regulator-name = "smps2"; regulator-name = "smps2";
regulator-min-microvolt = <850000>; regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>; regulator-max-microvolt = <1060000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
......
...@@ -1042,7 +1042,7 @@ hdmi_dpll_clk_mux: hdmi_dpll_clk_mux { ...@@ -1042,7 +1042,7 @@ hdmi_dpll_clk_mux: hdmi_dpll_clk_mux {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,mux-clock"; compatible = "ti,mux-clock";
clocks = <&sys_clkin1>, <&sys_clkin2>; clocks = <&sys_clkin1>, <&sys_clkin2>;
reg = <0x01a4>; reg = <0x0164>;
}; };
mlb_clk: mlb_clk { mlb_clk: mlb_clk {
...@@ -1084,14 +1084,14 @@ video1_dpll_clk_mux: video1_dpll_clk_mux { ...@@ -1084,14 +1084,14 @@ video1_dpll_clk_mux: video1_dpll_clk_mux {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,mux-clock"; compatible = "ti,mux-clock";
clocks = <&sys_clkin1>, <&sys_clkin2>; clocks = <&sys_clkin1>, <&sys_clkin2>;
reg = <0x01d0>; reg = <0x0168>;
}; };
video2_dpll_clk_mux: video2_dpll_clk_mux { video2_dpll_clk_mux: video2_dpll_clk_mux {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,mux-clock"; compatible = "ti,mux-clock";
clocks = <&sys_clkin1>, <&sys_clkin2>; clocks = <&sys_clkin1>, <&sys_clkin2>;
reg = <0x01d4>; reg = <0x016c>;
}; };
wkupaon_iclk_mux: wkupaon_iclk_mux { wkupaon_iclk_mux: wkupaon_iclk_mux {
......
...@@ -48,22 +48,22 @@ ethernet@gpmc { ...@@ -48,22 +48,22 @@ ethernet@gpmc {
gpmc,device-width = <1>; gpmc,device-width = <1>;
gpmc,cycle2cycle-samecsen = <1>; gpmc,cycle2cycle-samecsen = <1>;
gpmc,cycle2cycle-diffcsen = <1>; gpmc,cycle2cycle-diffcsen = <1>;
gpmc,cs-on-ns = <7>; gpmc,cs-on-ns = <6>;
gpmc,cs-rd-off-ns = <233>; gpmc,cs-rd-off-ns = <187>;
gpmc,cs-wr-off-ns = <233>; gpmc,cs-wr-off-ns = <187>;
gpmc,adv-on-ns = <22>; gpmc,adv-on-ns = <18>;
gpmc,adv-rd-off-ns = <60>; gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <60>; gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <67>; gpmc,oe-on-ns = <60>;
gpmc,oe-off-ns = <210>; gpmc,oe-off-ns = <169>;
gpmc,we-on-ns = <67>; gpmc,we-on-ns = <66>;
gpmc,we-off-ns = <210>; gpmc,we-off-ns = <169>;
gpmc,rd-cycle-ns = <233>; gpmc,rd-cycle-ns = <187>;
gpmc,wr-cycle-ns = <233>; gpmc,wr-cycle-ns = <187>;
gpmc,access-ns = <233>; gpmc,access-ns = <187>;
gpmc,page-burst-access-ns = <30>; gpmc,page-burst-access-ns = <24>;
gpmc,bus-turnaround-ns = <30>; gpmc,bus-turnaround-ns = <24>;
gpmc,cycle2cycle-delay-ns = <30>; gpmc,cycle2cycle-delay-ns = <24>;
gpmc,wait-monitoring-ns = <0>; gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <0>; gpmc,clk-activation-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>; gpmc,wr-data-mux-bus-ns = <0>;
......
...@@ -479,4 +479,4 @@ CONFIG_DEBUG_FS=y ...@@ -479,4 +479,4 @@ CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_LOCKUP_DETECTOR=y CONFIG_LOCKUP_DETECTOR=y
CONFIG_CRYPTO_DEV_TEGRA_AES=y CONFIG_CRYPTO_DEV_TEGRA_AES=y
CONFIG_GENERIC_CPUFREQ_CPU0=y CONFIG_CPUFREQ_DT=y
...@@ -127,6 +127,8 @@ CONFIG_SRAM=y ...@@ -127,6 +127,8 @@ CONFIG_SRAM=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_ATA=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_MD=y CONFIG_MD=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
......
...@@ -146,7 +146,6 @@ CONFIG_RTC_CLASS=y ...@@ -146,7 +146,6 @@ CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_S35390A=y CONFIG_RTC_DRV_S35390A=y
CONFIG_DMADEVICES=y CONFIG_DMADEVICES=y
CONFIG_SH_DMAE=y CONFIG_SH_DMAE=y
CONFIG_RCAR_AUDMAC_PP=y
CONFIG_RCAR_DMAC=y CONFIG_RCAR_DMAC=y
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
CONFIG_PWM=y CONFIG_PWM=y
...@@ -178,5 +177,5 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y ...@@ -178,5 +177,5 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_THERMAL=y CONFIG_CPU_THERMAL=y
CONFIG_GENERIC_CPUFREQ_CPU0=y CONFIG_CPUFREQ_DT=y
CONFIG_REGULATOR_DA9210=y CONFIG_REGULATOR_DA9210=y
...@@ -270,8 +270,6 @@ extern const struct clksel_rate div31_1to31_rates[]; ...@@ -270,8 +270,6 @@ extern const struct clksel_rate div31_1to31_rates[];
extern void __iomem *clk_memmaps[]; extern void __iomem *clk_memmaps[];
extern int am33xx_clk_init(void);
extern int omap2_clkops_enable_clkdm(struct clk_hw *hw); extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
extern void omap2_clkops_disable_clkdm(struct clk_hw *hw); extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
......
...@@ -471,11 +471,15 @@ void __init omap3xxx_check_revision(void) ...@@ -471,11 +471,15 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.0"; cpu_rev = "1.0";
break; break;
case 1: case 1:
/* FALLTHROUGH */
default:
omap_revision = AM437X_REV_ES1_1; omap_revision = AM437X_REV_ES1_1;
cpu_rev = "1.1"; cpu_rev = "1.1";
break; break;
case 2:
/* FALLTHROUGH */
default:
omap_revision = AM437X_REV_ES1_2;
cpu_rev = "1.2";
break;
} }
break; break;
case 0xb8f2: case 0xb8f2:
......
...@@ -446,6 +446,7 @@ IS_OMAP_TYPE(3430, 0x3430) ...@@ -446,6 +446,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define AM437X_CLASS 0x43700000 #define AM437X_CLASS 0x43700000
#define AM437X_REV_ES1_0 (AM437X_CLASS | (0x10 << 8)) #define AM437X_REV_ES1_0 (AM437X_CLASS | (0x10 << 8))
#define AM437X_REV_ES1_1 (AM437X_CLASS | (0x11 << 8)) #define AM437X_REV_ES1_1 (AM437X_CLASS | (0x11 << 8))
#define AM437X_REV_ES1_2 (AM437X_CLASS | (0x12 << 8))
#define OMAP443X_CLASS 0x44300044 #define OMAP443X_CLASS 0x44300044
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
......
...@@ -187,7 +187,7 @@ config TEGRA_IOMMU_SMMU ...@@ -187,7 +187,7 @@ config TEGRA_IOMMU_SMMU
config EXYNOS_IOMMU config EXYNOS_IOMMU
bool "Exynos IOMMU Support" bool "Exynos IOMMU Support"
depends on ARCH_EXYNOS depends on ARCH_EXYNOS && ARM
select IOMMU_API select IOMMU_API
select ARM_DMA_USE_IOMMU select ARM_DMA_USE_IOMMU
help help
......
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