Commit 968a2978 authored by Thierry Reding's avatar Thierry Reding Committed by David S. Miller

net: stmmac: Only enable enhanced addressing mode when needed

Enhanced addressing mode is only required when more than 32 bits need to
be addressed. Add a DMA configuration parameter to enable this mode only
when needed.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 151ea094
...@@ -27,7 +27,10 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr, ...@@ -27,7 +27,10 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr,
if (dma_cfg->aal) if (dma_cfg->aal)
value |= XGMAC_AAL; value |= XGMAC_AAL;
writel(value | XGMAC_EAME, ioaddr + XGMAC_DMA_SYSBUS_MODE); if (dma_cfg->eame)
value |= XGMAC_EAME;
writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE);
} }
static void dwxgmac2_dma_init_chan(void __iomem *ioaddr, static void dwxgmac2_dma_init_chan(void __iomem *ioaddr,
......
...@@ -4514,6 +4514,13 @@ int stmmac_dvr_probe(struct device *device, ...@@ -4514,6 +4514,13 @@ int stmmac_dvr_probe(struct device *device,
if (!ret) { if (!ret) {
dev_info(priv->device, "Using %d bits DMA width\n", dev_info(priv->device, "Using %d bits DMA width\n",
priv->dma_cap.addr64); priv->dma_cap.addr64);
/*
* If more than 32 bits can be addressed, make sure to
* enable enhanced addressing mode.
*/
if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))
priv->plat->dma_cfg->eame = true;
} else { } else {
ret = dma_set_mask_and_coherent(device, DMA_BIT_MASK(32)); ret = dma_set_mask_and_coherent(device, DMA_BIT_MASK(32));
if (ret) { if (ret) {
......
...@@ -92,6 +92,7 @@ struct stmmac_dma_cfg { ...@@ -92,6 +92,7 @@ struct stmmac_dma_cfg {
int fixed_burst; int fixed_burst;
int mixed_burst; int mixed_burst;
bool aal; bool aal;
bool eame;
}; };
#define AXI_BLEN 7 #define AXI_BLEN 7
......
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