Commit 9af7d94f authored by Abhilash Kesavan's avatar Abhilash Kesavan Committed by Kukjin Kim

ARM: S5P6440: Change the name for MMC Special Clock

Change the name of mmc spcial clock from mmc_bus to sclk_mmc to be
in line with the naming across the S5P SoCs
Signed-off-by: default avatarAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: default avatarSangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent f85cbea9
...@@ -419,7 +419,7 @@ static struct clksrc_sources clkset_audio = { ...@@ -419,7 +419,7 @@ static struct clksrc_sources clkset_audio = {
static struct clksrc_clk clksrcs[] = { static struct clksrc_clk clksrcs[] = {
{ {
.clk = { .clk = {
.name = "mmc_bus", .name = "sclk_mmc",
.id = 0, .id = 0,
.ctrlbit = (1 << 24), .ctrlbit = (1 << 24),
.enable = s5p64x0_sclk_ctrl, .enable = s5p64x0_sclk_ctrl,
...@@ -429,7 +429,7 @@ static struct clksrc_clk clksrcs[] = { ...@@ -429,7 +429,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
}, { }, {
.clk = { .clk = {
.name = "mmc_bus", .name = "sclk_mmc",
.id = 1, .id = 1,
.ctrlbit = (1 << 25), .ctrlbit = (1 << 25),
.enable = s5p64x0_sclk_ctrl, .enable = s5p64x0_sclk_ctrl,
...@@ -439,7 +439,7 @@ static struct clksrc_clk clksrcs[] = { ...@@ -439,7 +439,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
}, { }, {
.clk = { .clk = {
.name = "mmc_bus", .name = "sclk_mmc",
.id = 2, .id = 2,
.ctrlbit = (1 << 26), .ctrlbit = (1 << 26),
.enable = s5p64x0_sclk_ctrl, .enable = s5p64x0_sclk_ctrl,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment