Commit 9af9fe5b authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher

drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid.

Add support to force and unforce MCLK or SOCCLK to dpm limit value.
Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7cf70047
...@@ -945,6 +945,8 @@ static int sienna_cichlid_force_dpm_limit_value(struct smu_context *smu, bool hi ...@@ -945,6 +945,8 @@ static int sienna_cichlid_force_dpm_limit_value(struct smu_context *smu, bool hi
enum smu_clk_type clks[] = { enum smu_clk_type clks[] = {
SMU_GFXCLK, SMU_GFXCLK,
SMU_MCLK,
SMU_SOCCLK,
}; };
for (i = 0; i < ARRAY_SIZE(clks); i++) { for (i = 0; i < ARRAY_SIZE(clks); i++) {
...@@ -970,6 +972,8 @@ static int sienna_cichlid_unforce_dpm_levels(struct smu_context *smu) ...@@ -970,6 +972,8 @@ static int sienna_cichlid_unforce_dpm_levels(struct smu_context *smu)
enum smu_clk_type clks[] = { enum smu_clk_type clks[] = {
SMU_GFXCLK, SMU_GFXCLK,
SMU_MCLK,
SMU_SOCCLK,
}; };
for (i = 0; i < ARRAY_SIZE(clks); i++) { for (i = 0; i < ARRAY_SIZE(clks); i++) {
......
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