drm/i915: Ignore fenced commands for gpu access on gen4

Userspace should not have been declaring that it needed fenced GPU
access with gen4+ as those GPUs have no fenced commands, but to be on
the safe side it is easier to ignore userspace in case they did.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

drivers/gpu/drm/i915/i915_gem_execbuffer.c

@@ -432,6 +432,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 	struct drm_i915_gem_object *obj;
 	struct drm_i915_gem_exec_object2 *entry;
 	int ret, retry;
+	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 
 	/* Attempt to pin all of the buffers into the GTT.
 	 * This is done in 3 phases:
@@ -460,6 +461,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 			}
 
 			need_fence =
+				has_fenced_gpu_access &&
 				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 				obj->tiling_mode != I915_TILING_NONE;
 			need_mappable =
@@ -484,6 +486,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 			bool need_fence;
 
 			need_fence =
+				has_fenced_gpu_access &&
 				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 				obj->tiling_mode != I915_TILING_NONE;
 
@@ -498,6 +501,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 					break;
 			}
 
+			if (has_fenced_gpu_access) {
 				if (need_fence) {
 					ret = i915_gem_object_get_fence(obj, ring, 1);
 					if (ret)
@@ -510,6 +514,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 						break;
 				}
 				obj->pending_fenced_gpu_access = need_fence;
+			}
 
 			entry->offset = obj->gtt_offset;
 			entry++;