Commit 9b7117e2 authored by Tomi Valkeinen's avatar Tomi Valkeinen

drm/omap: cleanup OMAP_BO flags

Reorder OMAP_BO flags and improve the comments.
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: default avatarJean-Jacques Hiblot <jjhiblot@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191010120000.1421-5-jjhiblot@ti.com
parent d6e52e28
...@@ -38,19 +38,20 @@ struct drm_omap_param { ...@@ -38,19 +38,20 @@ struct drm_omap_param {
__u64 value; /* in (set_param), out (get_param) */ __u64 value; /* in (set_param), out (get_param) */
}; };
#define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */ /* Scanout buffer, consumable by DSS */
#define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */ #define OMAP_BO_SCANOUT 0x00000001
#define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
/* cache modes */ /* Buffer CPU caching mode: cached, write-combining or uncached. */
#define OMAP_BO_CACHED 0x00000000 /* default */ #define OMAP_BO_CACHED 0x00000000
#define OMAP_BO_WC 0x00000002 /* write-combine */ #define OMAP_BO_WC 0x00000002
#define OMAP_BO_UNCACHED 0x00000004 /* strongly-ordered (uncached) */ #define OMAP_BO_UNCACHED 0x00000004
#define OMAP_BO_CACHE_MASK 0x00000006
/* tiled modes */ /* Use TILER for the buffer. The TILER container unit can be 8, 16 or 32 bits. */
#define OMAP_BO_TILED_8 0x00000100 #define OMAP_BO_TILED_8 0x00000100
#define OMAP_BO_TILED_16 0x00000200 #define OMAP_BO_TILED_16 0x00000200
#define OMAP_BO_TILED_32 0x00000300 #define OMAP_BO_TILED_32 0x00000300
#define OMAP_BO_TILED_MASK 0x00000f00
#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32) #define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
union omap_gem_size { union omap_gem_size {
......
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