drm/amd/display: move clk_mgr files to right place

[Why]
Better organization

[How]
Move clk_mgr files under dc/clk_mgr
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/Makefile

@@ -28,6 +28,7 @@ AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
 
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
+subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/inc
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/freesync
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/color

drivers/gpu/drm/amd/display/dc/Makefile

@@ -23,7 +23,7 @@
 # Makefile for Display Core (dc) component.
 #
 
-DC_LIBS = basics bios calcs dce gpio irq virtual
+DC_LIBS = basics bios calcs clk_mgr dce gpio irq virtual
 
 ifdef CONFIG_DRM_AMD_DC_DCN1_0
 DC_LIBS += dcn10 dml

drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile

+#
+# Copyright 2017 Advanced Micro Devices, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+# OTHER DEALINGS IN THE SOFTWARE.
+#
+#
+# Makefile for the 'clk_mgr' sub-component of DAL.
+# It provides the control and status of HW CLK_MGR pins.
+
+CLK_MGR = clk_mgr.o
+
+AMD_DAL_CLK_MGR = $(addprefix $(AMDDALPATH)/dc/clk_mgr/,$(CLK_MGR))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR)
+
+
+###############################################################################
+# DCE 100 and DCE8x
+###############################################################################
+CLK_MGR_DCE100 = dce_clk_mgr.o
+
+AMD_DAL_CLK_MGR_DCE100 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce100/,$(CLK_MGR_DCE100))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCE100)
+
+###############################################################################
+# DCE 100 and DCE8x
+###############################################################################
+CLK_MGR_DCE110 = dce110_clk_mgr.o
+
+AMD_DAL_CLK_MGR_DCE110 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce110/,$(CLK_MGR_DCE110))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCE110)
+###############################################################################
+# DCE 112
+###############################################################################
+CLK_MGR_DCE112 = dce112_clk_mgr.o
+
+AMD_DAL_CLK_MGR_DCE112 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce112/,$(CLK_MGR_DCE112))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCE112)
+###############################################################################
+# DCE 120
+###############################################################################
+CLK_MGR_DCE120 = dce120_clk_mgr.o
+
+AMD_DAL_CLK_MGR_DCE120 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce120/,$(CLK_MGR_DCE120))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCE120)
+ifdef CONFIG_DRM_AMD_DC_DCN1_0
+###############################################################################
+# DCN10
+###############################################################################
+CLK_MGR_DCN10 = rv1_clk_mgr.o rv1_clk_mgr_vbios_smu.o rv2_clk_mgr.o
+
+AMD_DAL_CLK_MGR_DCN10 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dcn10/,$(CLK_MGR_DCN10))
+
+AMD_DISPLAY_FILES += $(AMD_DAL_CLK_MGR_DCN10)
+endif

drivers/gpu/drm/amd/display/dc/dcn10/clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

@@ -28,12 +28,12 @@
 #include "dccg.h"
 #include "clk_mgr_internal.h"
 
-#include "dce/dce_clk_mgr.h"
-#include "dce/dce110_clk_mgr.h"
-#include "dce/dce112_clk_mgr.h"
-#include "dce/dce120_clk_mgr.h"
-#include "rv1_clk_mgr.h"
-#include "rv2_clk_mgr.h"
+#include "dce100/dce_clk_mgr.h"
+#include "dce110/dce110_clk_mgr.h"
+#include "dce112/dce112_clk_mgr.h"
+#include "dce120/dce120_clk_mgr.h"
+#include "dcn10/rv1_clk_mgr.h"
+#include "dcn10/rv2_clk_mgr.h"
 
 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg *dccg)
 {
@@ -110,3 +110,4 @@ void dc_destroy_clk_mgr(struct clk_mgr *clk_mgr_base)
 
 	kfree(clk_mgr);
 }
+

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

@@ -22,11 +22,13 @@
  * Authors: AMD
  *
  */
+
+
 #include "dccg.h"
 #include "clk_mgr_internal.h"
 #include "dce_clk_mgr.h"
-#include "dce110_clk_mgr.h"
-#include "dce112_clk_mgr.h"
+#include "dce110/dce110_clk_mgr.h"
+#include "dce112/dce112_clk_mgr.h"
 #include "reg_helper.h"
 #include "dmcu.h"
 #include "core_types.h"
@@ -423,6 +425,12 @@ static void dce_update_clocks(struct clk_mgr *clk_mgr_base,
 }
 
 
+
+
+
+
+
+
 static struct clk_mgr_funcs dce_funcs = {
 	.get_dp_ref_clk_frequency = dce_get_dp_ref_freq_khz,
 	.update_clocks = dce_update_clocks
@@ -460,3 +468,4 @@ void dce_clk_mgr_construct(
 	dce_clock_read_integrated_info(clk_mgr);
 	dce_clock_read_ss_info(clk_mgr);
 }
+

drivers/gpu/drm/amd/display/dc/dce/dce110_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

@@ -28,8 +28,8 @@
 
 #include "dce/dce_11_0_d.h"
 #include "dce/dce_11_0_sh_mask.h"
-#include "dce_clk_mgr.h"
 #include "dce110_clk_mgr.h"
+#include "../clk_mgr/dce100/dce_clk_mgr.h"
 
 /* set register offset */
 #define SR(reg_name)\

drivers/gpu/drm/amd/display/dc/dce/dce112_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

@@ -28,8 +28,8 @@
 
 #include "dce/dce_11_2_d.h"
 #include "dce/dce_11_2_sh_mask.h"
-#include "dce_clk_mgr.h"
-#include "dce110_clk_mgr.h"
+#include "dce100/dce_clk_mgr.h"
+#include "dce110/dce110_clk_mgr.h"
 #include "dce112_clk_mgr.h"
 #include "dal_asic_id.h"
 

drivers/gpu/drm/amd/display/dc/dce/dce120_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c

@@ -26,10 +26,10 @@
 #include "core_types.h"
 #include "clk_mgr_internal.h"
 
-#include "dce_clk_mgr.h"
-#include "dce112_clk_mgr.h"
-#include "dce110_clk_mgr.h"
+#include "dce112/dce112_clk_mgr.h"
+#include "dce110/dce110_clk_mgr.h"
 #include "dce120_clk_mgr.h"
+#include "dce100/dce_clk_mgr.h"
 
 static const struct state_dependent_clocks dce120_max_clks_by_state[] = {
 /*ClocksStateInvalid - should not be used*/

drivers/gpu/drm/amd/display/dc/dcn10/rv1_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

@@ -26,8 +26,8 @@
 #include "core_types.h"
 #include "clk_mgr_internal.h"
 #include "rv1_clk_mgr.h"
-#include "dce/dce_clk_mgr.h"
-#include "dce/dce112_clk_mgr.h"
+#include "dce100/dce_clk_mgr.h"
+#include "dce112/dce112_clk_mgr.h"
 #include "rv1_clk_mgr_vbios_smu.h"
 #include "rv1_clk_mgr_clk.h"
 

drivers/gpu/drm/amd/display/dc/dcn10/rv1_clk_mgr_clk.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c

@@ -34,7 +34,7 @@
 #include "ip/CLK/clk_10_0_reg.h"
 #include "ip/CLK/clk_10_0_sh_mask.h"
 
-#include "dce/dce_clk_mgr.h"
+#include "dce100/dce_clk_mgr.h"
 
 #define CLK_BASE_INNER(inst) \
 	CLK_BASE__INST ## inst ## _SEG0

drivers/gpu/drm/amd/display/dc/dcn10/rv2_clk_mgr.c → drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv2_clk_mgr.c

@@ -27,7 +27,7 @@
 #include "clk_mgr_internal.h"
 #include "rv1_clk_mgr.h"
 #include "rv2_clk_mgr.h"
-#include "dce/dce112_clk_mgr.h"
+#include "dce112/dce112_clk_mgr.h"
 
 static struct clk_mgr_internal_funcs rv2_clk_internal_funcs = {
 	.set_dispclk = dce112_set_dispclk,

drivers/gpu/drm/amd/display/dc/dce/Makefile

@@ -28,7 +28,7 @@
 
 DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \
 dce_mem_input.o dce_clock_source.o dce_scl_filters.o dce_transform.o \
-dce_clk_mgr.o dce110_clk_mgr.o dce112_clk_mgr.o dce120_clk_mgr.o dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \
+dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \
 dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o
 
 AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))

drivers/gpu/drm/amd/display/dc/dcn10/Makefile

@@ -25,7 +25,6 @@
 DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o dcn10_hw_sequencer_debug.o \
 		dcn10_dpp.o dcn10_opp.o dcn10_optc.o \
 		dcn10_hubp.o dcn10_mpc.o \
-		clk_mgr.o rv1_clk_mgr.o rv1_clk_mgr_vbios_smu.o rv2_clk_mgr.o\
 		dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o \
 		dcn10_hubbub.o dcn10_stream_encoder.o dcn10_link_encoder.o