Commit 9bed8b41 authored by Shawn Lin's avatar Shawn Lin Committed by Heiko Stuebner

ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform

Pl330 integrated in rk3xxx platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent e7d6c9b1
...@@ -78,6 +78,7 @@ dmac1_s: dma-controller@20018000 { ...@@ -78,6 +78,7 @@ dmac1_s: dma-controller@20018000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA1>; clocks = <&cru ACLK_DMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
...@@ -88,6 +89,7 @@ dmac1_ns: dma-controller@2001c000 { ...@@ -88,6 +89,7 @@ dmac1_ns: dma-controller@2001c000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA1>; clocks = <&cru ACLK_DMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
status = "disabled"; status = "disabled";
...@@ -99,6 +101,7 @@ dmac2: dma-controller@20078000 { ...@@ -99,6 +101,7 @@ dmac2: dma-controller@20078000 {
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMA2>; clocks = <&cru ACLK_DMA2>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
......
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