Commit 9e040216 authored by Kenneth Feng's avatar Kenneth Feng Committed by Alex Deucher

drm/amd/amdgpu: fw version check with gfxoff

1. check the firmware version when enabling gfxoff
2. overwrite the pptable to make sure gfxoff is really
enabled on navi10
Signed-off-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bca32528
...@@ -331,7 +331,6 @@ static int smu_set_funcs(struct amdgpu_device *adev) ...@@ -331,7 +331,6 @@ static int smu_set_funcs(struct amdgpu_device *adev)
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_VEGA20: case CHIP_VEGA20:
case CHIP_NAVI10: case CHIP_NAVI10:
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) if (adev->pm.pp_feature & PP_OVERDRIVE_MASK)
smu->od_enabled = true; smu->od_enabled = true;
smu_v11_0_set_smu_funcs(smu); smu_v11_0_set_smu_funcs(smu);
......
...@@ -117,6 +117,8 @@ static int ...@@ -117,6 +117,8 @@ static int
navi10_get_allowed_feature_mask(struct smu_context *smu, navi10_get_allowed_feature_mask(struct smu_context *smu,
uint32_t *feature_mask, uint32_t num) uint32_t *feature_mask, uint32_t num)
{ {
struct amdgpu_device *adev = smu->adev;
if (num > 2) if (num > 2)
return -EINVAL; return -EINVAL;
...@@ -139,6 +141,10 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, ...@@ -139,6 +141,10 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
| FEATURE_MASK(FEATURE_MMHUB_PG) | FEATURE_MASK(FEATURE_MMHUB_PG)
| FEATURE_MASK(FEATURE_ATHUB_PG); | FEATURE_MASK(FEATURE_ATHUB_PG);
if (adev->pm.pp_feature & PP_GFXOFF_MASK)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_SS_BIT)
| FEATURE_MASK(FEATURE_GFXOFF_BIT);
return 0; return 0;
} }
...@@ -149,6 +155,7 @@ static int navi10_check_powerplay_table(struct smu_context *smu) ...@@ -149,6 +155,7 @@ static int navi10_check_powerplay_table(struct smu_context *smu)
static int navi10_append_powerplay_table(struct smu_context *smu) static int navi10_append_powerplay_table(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
struct smu_table_context *table_context = &smu->smu_table; struct smu_table_context *table_context = &smu->smu_table;
PPTable_t *smc_pptable = table_context->driver_pptable; PPTable_t *smc_pptable = table_context->driver_pptable;
struct atom_smc_dpm_info_v4_5 *smc_dpm_table; struct atom_smc_dpm_info_v4_5 *smc_dpm_table;
...@@ -234,6 +241,10 @@ static int navi10_append_powerplay_table(struct smu_context *smu) ...@@ -234,6 +241,10 @@ static int navi10_append_powerplay_table(struct smu_context *smu)
/* Mvdd Svi2 Div Ratio Setting */ /* Mvdd Svi2 Div Ratio Setting */
smc_pptable->MvddRatio = smc_dpm_table->MvddRatio; smc_pptable->MvddRatio = smc_dpm_table->MvddRatio;
if (adev->pm.pp_feature & PP_GFXOFF_MASK)
*(uint64_t *)smc_pptable->FeaturesToRun |= FEATURE_MASK(FEATURE_GFX_SS_BIT)
| FEATURE_MASK(FEATURE_GFXOFF_BIT);
return 0; return 0;
} }
......
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