Commit 9ff5052f authored by Olliver Schinagl's avatar Olliver Schinagl Committed by Maxime Ripard

ARM: dts: sunxi: enable otg port on the sun7i-a20-olinuxino-lime2

This patch enables the musb-otg USB controller on the Lime2. The Lime2
differs from the Lime1 series in pins used for usb0 power.

Tested on a OlinuXino Lime2-4GB.
Signed-off-by: default avatarOlliver Schinagl <oliver@schinagl.nl>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent bcbf506d
...@@ -190,6 +190,10 @@ &ohci1 { ...@@ -190,6 +190,10 @@ &ohci1 {
status = "okay"; status = "okay";
}; };
&otg_sram {
status = "okay";
};
&pio { &pio {
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
allwinner,pins = "PC3"; allwinner,pins = "PC3";
...@@ -204,6 +208,27 @@ led_pins_olinuxinolime: led_pins@0 { ...@@ -204,6 +208,27 @@ led_pins_olinuxinolime: led_pins@0 {
allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,drive = <SUN4I_PINCTRL_20_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
}; };
usb0_id_detect_pin: usb0_id_detect_pin@0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
};
usb0_vbus_pin_lime2: usb0_vbus_pin@0 {
allwinner,pins = "PC17";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
}; };
&reg_ahci_5v { &reg_ahci_5v {
...@@ -212,6 +237,12 @@ &reg_ahci_5v { ...@@ -212,6 +237,12 @@ &reg_ahci_5v {
status = "okay"; status = "okay";
}; };
&reg_usb0_vbus {
pinctrl-0 = <&usb0_vbus_pin_lime2>;
gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&reg_usb1_vbus { &reg_usb1_vbus {
status = "okay"; status = "okay";
}; };
...@@ -226,7 +257,17 @@ &uart0 { ...@@ -226,7 +257,17 @@ &uart0 {
status = "okay"; status = "okay";
}; };
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy { &usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
usb0_vbus-supply = <&reg_usb0_vbus>;
usb1_vbus-supply = <&reg_usb1_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>;
usb2_vbus-supply = <&reg_usb2_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay"; status = "okay";
......
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