Commit a077c52f authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Will Deacon

arm-cci: Refactor CCI PMU enable/disable methods

This patch refactors the CCI PMU driver code a little bit to
make it easier share the code for enabling/disabling the CCI
PMU. This will be used by the hooks to work around the special cases
where writing to a counter is not always that easy(e.g, CCI-500)

No functional changes.

Cc: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: default avatarOlof Johansson <olof@lixom.net>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent a53eb5c6
...@@ -606,6 +606,26 @@ static int cci500_validate_hw_event(struct cci_pmu *cci_pmu, ...@@ -606,6 +606,26 @@ static int cci500_validate_hw_event(struct cci_pmu *cci_pmu,
} }
#endif /* CONFIG_ARM_CCI500_PMU */ #endif /* CONFIG_ARM_CCI500_PMU */
/* Should be called with cci_pmu->hw_events->pmu_lock held */
static void __cci_pmu_enable(void)
{
u32 val;
/* Enable all the PMU counters. */
val = readl_relaxed(cci_ctrl_base + CCI_PMCR) | CCI_PMCR_CEN;
writel(val, cci_ctrl_base + CCI_PMCR);
}
/* Should be called with cci_pmu->hw_events->pmu_lock held */
static void __cci_pmu_disable(void)
{
u32 val;
/* Disable all the PMU counters. */
val = readl_relaxed(cci_ctrl_base + CCI_PMCR) & ~CCI_PMCR_CEN;
writel(val, cci_ctrl_base + CCI_PMCR);
}
static ssize_t cci_pmu_format_show(struct device *dev, static ssize_t cci_pmu_format_show(struct device *dev,
struct device_attribute *attr, char *buf) struct device_attribute *attr, char *buf)
{ {
...@@ -895,16 +915,12 @@ static void cci_pmu_enable(struct pmu *pmu) ...@@ -895,16 +915,12 @@ static void cci_pmu_enable(struct pmu *pmu)
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events; struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
int enabled = bitmap_weight(hw_events->used_mask, cci_pmu->num_cntrs); int enabled = bitmap_weight(hw_events->used_mask, cci_pmu->num_cntrs);
unsigned long flags; unsigned long flags;
u32 val;
if (!enabled) if (!enabled)
return; return;
raw_spin_lock_irqsave(&hw_events->pmu_lock, flags); raw_spin_lock_irqsave(&hw_events->pmu_lock, flags);
__cci_pmu_enable();
/* Enable all the PMU counters. */
val = readl_relaxed(cci_ctrl_base + CCI_PMCR) | CCI_PMCR_CEN;
writel(val, cci_ctrl_base + CCI_PMCR);
raw_spin_unlock_irqrestore(&hw_events->pmu_lock, flags); raw_spin_unlock_irqrestore(&hw_events->pmu_lock, flags);
} }
...@@ -914,13 +930,9 @@ static void cci_pmu_disable(struct pmu *pmu) ...@@ -914,13 +930,9 @@ static void cci_pmu_disable(struct pmu *pmu)
struct cci_pmu *cci_pmu = to_cci_pmu(pmu); struct cci_pmu *cci_pmu = to_cci_pmu(pmu);
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events; struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
unsigned long flags; unsigned long flags;
u32 val;
raw_spin_lock_irqsave(&hw_events->pmu_lock, flags); raw_spin_lock_irqsave(&hw_events->pmu_lock, flags);
__cci_pmu_disable();
/* Disable all the PMU counters. */
val = readl_relaxed(cci_ctrl_base + CCI_PMCR) & ~CCI_PMCR_CEN;
writel(val, cci_ctrl_base + CCI_PMCR);
raw_spin_unlock_irqrestore(&hw_events->pmu_lock, flags); raw_spin_unlock_irqrestore(&hw_events->pmu_lock, flags);
} }
......
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