Commit a60acb22 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Tvrtko Ursulin

drm/i915: init per-engine WAs for all engines

commit 4a15c75c ("drm/i915: Introduce per-engine workarounds")
refactored the workaround code to have functions per-engine, but didn't
call any of them from logical_xcs_ring_init. Since we do have a non-RCS
workaround for KBL (WaKBLVECSSemaphoreWaitPoll) we do need to call
intel_engine_init_workarounds for non-RCS engines.
Note that whitelist is still RCS-only.

v2: move the call to logical_ring_init (Chris)

Fixes: 4a15c75c ("drm/i915: Introduce per-engine workarounds")
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190110013232.8972-2-daniele.ceraolospurio@intel.com
parent f663b0ca
...@@ -2234,6 +2234,8 @@ static int logical_ring_init(struct intel_engine_cs *engine) ...@@ -2234,6 +2234,8 @@ static int logical_ring_init(struct intel_engine_cs *engine)
if (ret) if (ret)
return ret; return ret;
intel_engine_init_workarounds(engine);
if (HAS_LOGICAL_RING_ELSQ(i915)) { if (HAS_LOGICAL_RING_ELSQ(i915)) {
execlists->submit_reg = i915->regs + execlists->submit_reg = i915->regs +
i915_mmio_reg_offset(RING_EXECLIST_SQ_CONTENTS(engine)); i915_mmio_reg_offset(RING_EXECLIST_SQ_CONTENTS(engine));
...@@ -2296,7 +2298,6 @@ int logical_render_ring_init(struct intel_engine_cs *engine) ...@@ -2296,7 +2298,6 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
} }
intel_engine_init_whitelist(engine); intel_engine_init_whitelist(engine);
intel_engine_init_workarounds(engine);
return 0; return 0;
} }
......
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