Commit a83aeb38 authored by Russell King's avatar Russell King Committed by Gregory CLEMENT

ARM: dts: armada388-clearfog: increase speed of i2c0 to 400kHz

All the devices on I2C0 support fast mode, so increase the bus speed
to match.  The Armada 388 is known to have a timing issue when in
standard mode, which we believe causes the ficticious device at 0x64
to appear.

[gregory.clement@bootlin.com: Note that since the commit fbffee74
("ARM: dts: Fix I2C repeated start issue on Armada-38x") in 4.14, the
timing issue is managed for the Armada 38x SoCs.]
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent e662e70f
...@@ -143,8 +143,7 @@ fixed-link { ...@@ -143,8 +143,7 @@ fixed-link {
}; };
&i2c0 { &i2c0 {
/* Is there anything on this? */ clock-frequency = <400000>;
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>; pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
...@@ -239,13 +238,11 @@ sfp_mod_def0 { ...@@ -239,13 +238,11 @@ sfp_mod_def0 {
}; };
}; };
/* The MCP3021 is 100kHz clock only */ /* The MCP3021 supports standard and fast modes */
mikrobus_adc: mcp3021@4c { mikrobus_adc: mcp3021@4c {
compatible = "microchip,mcp3021"; compatible = "microchip,mcp3021";
reg = <0x4c>; reg = <0x4c>;
}; };
/* Also something at 0x64 */
}; };
&i2c1 { &i2c1 {
......
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